connect LEDs on IDE board to main FPGA and let them blink
[raggedstone] / common / Makefile.common
CommitLineData
81dcfdfd 1PWD := $(shell pwd)
2
3#auto|lpt1|lpt2|lpt3|com1|com2|com3|com4|usb0|usb1|usb2|usb21|ttya|ttyb|tty00|tty01
4CABLE ?= auto
5
bd0f9a9a 6#DRIVER = /home/michael/Raggedstone/usb-driver/libusb-driver.so
7
81dcfdfd 8INTSTYLE := silent
9
10SOURCES = $(wildcard sources/*.v source/*.vhd)
f026519d 11PART ?= xc3s1500-fg456-4
12TARGET ?= bit
81dcfdfd 13
bd0f9a9a 14ifdef DRIVER
15PRELOAD = LD_PRELOAD=$(DRIVER)
16endif
17
f026519d 18all: $(PROJECT).$(TARGET) final
81dcfdfd 19
20log:
21 time make all &>build.log
22
23xst: $(PROJECT).ngc
24
25ngdbuild: $(PROJECT).ngd
26
f026519d 27$(PROJECT).ngc: $(SOURCES) $(PROJECT).prj $(PROJECT).ucf $(PROJECT).xst
81dcfdfd 28 @# echo synclib > $(PROJECT).lso # hmm. things are different in ise 9.1
29 echo work > $(PROJECT).lso
30 xst -intstyle $(INTSTYLE) -ifn $(PROJECT).xst -ofn $(PROJECT).syr
31 @#cat $(PROJECT).syr
32
33$(PROJECT).ngd: $(PROJECT).ngc
f026519d 34 ngdbuild -intstyle $(INTSTYLE) -dd "$(PWD)/_ngo" -nt timestamp -uc $(PROJECT).ucf -p $(PART) $(PROJECT).ngc $(PROJECT).ngd
81dcfdfd 35
36$(PROJECT)_map.ngm $(PROJECT).pcf: $(PROJECT).ngd
f026519d 37 map -intstyle $(INTSTYLE) -p $(PART) -cm area -pr b -k 4 -c 100 -o $(PROJECT)_map.ncd $(PROJECT).ngd $(PROJECT).pcf
81dcfdfd 38
39$(PROJECT).ncd: $(PROJECT)_map.ngm $(PROJECT).pcf
40 @#par -w -intstyle $(INTSTYLE) -ol std -n 4 -t 1 $(PROJECT)_map.ncd $(PROJECT).dir $(PROJECT).pcf
41 par -w -intstyle $(INTSTYLE) -ol std -t 1 $(PROJECT)_map.ncd $(PROJECT).ncd $(PROJECT).pcf
42
43$(PROJECT).twx: $(PROJECT).ncd
44 trce -intstyle $(INTSTYLE) -e 3 -l 3 -s 4 -xml $(PROJECT) $(PROJECT).ncd -o $(PROJECT).twr $(PROJECT).pcf
45 @#cat $(PROJECT).twr
46
47$(PROJECT).bit: $(PROJECT).ncd
48 bitgen -intstyle $(INTSTYLE) -f $(PROJECT).ut $(PROJECT).ncd
49 @# cp $(PROJECT).bit ../jcarr_last.bit
50 @#cat $(PROJECT).drc
51 @#cat $(PROJECT).bgn
52
f026519d 53$(PROJECT).vm6: $(PROJECT).ngd
54 cpldfit -intstyle $(INTSTYLE) -p $(PART) -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper $(PROJECT).ngd
55
56$(PROJECT).jed: $(PROJECT).vm6
57 hprep6 -intstyle $(INTSTYLE) -s IEEE1149 -n $(PROJECT) -i $(PROJECT)
58
81dcfdfd 59$(PROJECT)-xcf02s.mcs $(PROJECT)-xcf04s.mcs: $(PROJECT).bit
60 promgen -intstyle $(INTSTYLE) -w -p mcs -u 0 $(PROJECT) -o $(PROJECT)-xcf02s $(PROJECT)-xcf04s -x xcf02s xcf04s
61
62final:
63 -@grep -A 8 -B 1 ^Selected\ Device $(PROJECT).syr
64 -@grep -A 8 -B 1 ^Timing\ Summary $(PROJECT).syr
65 -@grep -A 21 -B 1 ^Design\ Summary $(PROJECT)_map.map
66
67burn: $(PROJECT).bit
68 xc3sprog $(PROJECT).bit
69
70load: $(PROJECT).bit
b983c58b 71 @sed -e "s|%CABLE%|$(CABLE)|g" -e "s|%PROJECT%|$(PROJECT)|g" ../common/xc3s1500.batch >xc3s1500.batch.tmp
bd0f9a9a 72 $(PRELOAD) impact -batch xc3s1500.batch.tmp
81dcfdfd 73 @rm xc3s1500.batch.tmp
74
75flash: $(PROJECT)-xcf02s.mcs $(PROJECT)-xcf04s.mcs
b983c58b 76 @sed -e "s|%CABLE%|$(CABLE)|g" -e "s|%PROJECT%|$(PROJECT)|g" ../common/xcf.batch >xcf.batch.tmp
bd0f9a9a 77 $(PRELOAD) impact -batch xcf.batch.tmp
81dcfdfd 78 @rm xcf.batch.tmp
79
80clean:
81 @rm -rf *.bit *.bgn *.mcs *.prm *.bld *.drc *.mcs *.ncd *.ngc *.ngd \
82 *.ngr *.pad *.par *.pcf *.prm *.syr *.twr *.twx *.xpi *.lso *.prm *.mcs _impact* \
f026519d 83 *.vm6 *.jed *.gyd *.mfd *.pnx *.rpt *.err \
81dcfdfd 84 $(PROJECT)_map.* $(PROJECT)_pad.* \
85 _ngo xst \
86 build.log \
87 $(PROJECT).unroutes *.xml
88
89.PHONY: all final burn load flash clean xst ngdbuild log
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