update to EDK 9.1 SP2
[raggedstone] / xps / raggedstone.mhs
CommitLineData
7fb867f8 1# ##############################################################################
2# Created by Base System Builder Wizard for Xilinx EDK 8.2.02 Build EDK_Im_Sp2.4
3# Thu Mar 22 21:42:23 2007
4# Target Board: Custom
5# Family: spartan3
6# Device: xc3s1500
7# Package: fg456
8# Speed Grade: -4
9# Processor: Microblaze
10# System clock frequency: 50.000000 MHz
11# Debug interface: On-Chip HW Debug Module
12# On Chip Memory : 64 KB
13# ##############################################################################
14
15
16 PARAMETER VERSION = 2.1.0
17
18
19 PORT fpga_0_RS232_req_to_send_pin = net_gnd, DIR = O
20 PORT fpga_0_RS232_RX_pin = fpga_0_RS232_RX, DIR = I
21 PORT fpga_0_RS232_TX_pin = fpga_0_RS232_TX, DIR = O
22 PORT sys_clk_pin = dcm_clk_s, DIR = I, SIGIS = CLK, CLK_FREQ = 50000000
23 PORT sys_rst_pin = sys_rst_s, DIR = I, RST_POLARITY = 0, SIGIS = RST
24 PORT RS232foff = net_vcc, DIR = O
25 PORT LED_out = GPIO_LED_out, VEC = [0:3], DIR = O
26 PORT MEM_FLASH_DQ = FLASH_DQ, DIR = IO, VEC = [7:0]
27 PORT MEM_FLASH_ADDR = FLASH_ADDR, DIR = O, VEC = [18:0]
28 PORT MEM_FLASH_CE = FLASH_CEN, DIR = O, VEC = [0:0]
29 PORT MEM_FLASH_OE = FLASH_OEN, DIR = O, VEC = [0:0]
30 PORT MEM_FLASH_WE = FLASH_WEN, DIR = O
31 PORT SEVENSEG_out = GPIO_7SEG_OUT, DIR = O, VEC = [0:12]
32 PORT DBG_FLASH_ADDR = FLASH_ADDR_split, DIR = O, VEC = [0:31]
33
34
7fb867f8 35BEGIN opb_v20
36 PARAMETER INSTANCE = mb_opb
37 PARAMETER HW_VER = 1.10.c
38 PARAMETER C_EXT_RESET_HIGH = 0
39 PORT SYS_Rst = sys_rst_s
40 PORT OPB_Clk = sys_clk_s
41END
42
43BEGIN opb_mdm
44 PARAMETER INSTANCE = debug_module
45 PARAMETER HW_VER = 2.00.a
46 PARAMETER C_MB_DBG_PORTS = 1
47 PARAMETER C_USE_UART = 0
48 PARAMETER C_BASEADDR = 0x41400000
49 PARAMETER C_HIGHADDR = 0x4140ffff
50 BUS_INTERFACE SOPB = mb_opb
7fb867f8 51END
52
53BEGIN lmb_v10
54 PARAMETER INSTANCE = ilmb
55 PARAMETER HW_VER = 1.00.a
56 PARAMETER C_EXT_RESET_HIGH = 0
57 PORT SYS_Rst = sys_rst_s
58 PORT LMB_Clk = sys_clk_s
59END
60
61BEGIN lmb_v10
62 PARAMETER INSTANCE = dlmb
63 PARAMETER HW_VER = 1.00.a
64 PARAMETER C_EXT_RESET_HIGH = 0
65 PORT SYS_Rst = sys_rst_s
66 PORT LMB_Clk = sys_clk_s
67END
68
7fb867f8 69BEGIN bram_block
70 PARAMETER INSTANCE = lmb_bram
71 PARAMETER HW_VER = 1.00.a
4a1b2ca0 72 BUS_INTERFACE PORTA = dlmb_cntlr_BRAM_PORT
73 BUS_INTERFACE PORTB = ilmb_cntlr_BRAM_PORT
7fb867f8 74END
75
76BEGIN opb_uartlite
77 PARAMETER INSTANCE = RS232
78 PARAMETER HW_VER = 1.00.b
79 PARAMETER C_BAUDRATE = 115200
80 PARAMETER C_DATA_BITS = 8
81 PARAMETER C_ODD_PARITY = 1
82 PARAMETER C_USE_PARITY = 0
83 PARAMETER C_CLK_FREQ = 50000000
84 PARAMETER C_BASEADDR = 0x40600000
85 PARAMETER C_HIGHADDR = 0x4060ffff
86 BUS_INTERFACE SOPB = mb_opb
87 PORT RX = fpga_0_RS232_RX
88 PORT TX = fpga_0_RS232_TX
89END
90
91BEGIN dcm_module
92 PARAMETER INSTANCE = dcm_0
92155206 93 PARAMETER HW_VER = 1.00.c
7fb867f8 94 PARAMETER C_CLK0_BUF = TRUE
95 PARAMETER C_CLKIN_PERIOD = 20.000000
96 PARAMETER C_CLK_FEEDBACK = 1X
97 PARAMETER C_DLL_FREQUENCY_MODE = LOW
98 PARAMETER C_EXT_RESET_HIGH = 1
99 PORT CLKIN = dcm_clk_s
100 PORT CLK0 = sys_clk_s
101 PORT CLKFB = sys_clk_s
102 PORT RST = net_gnd
103 PORT LOCKED = dcm_0_lock
104END
105
106BEGIN opb_gpio
107 PARAMETER INSTANCE = LEDS
108 PARAMETER HW_VER = 3.01.b
109 PARAMETER C_GPIO_WIDTH = 4
110 PARAMETER C_IS_BIDIR = 0
111 PARAMETER C_BASEADDR = 0x40020000
112 PARAMETER C_HIGHADDR = 0x4002ffff
113 BUS_INTERFACE SOPB = mb_opb
114 PORT GPIO_d_out = GPIO_LED_out
115END
116
117BEGIN opb_emc
118 PARAMETER INSTANCE = FLASH
119 PARAMETER HW_VER = 2.00.a
120 PARAMETER C_NUM_BANKS_MEM = 1
121 PARAMETER C_MAX_MEM_WIDTH = 8
122 PARAMETER C_MEM0_WIDTH = 8
123 PARAMETER C_TCEDV_PS_MEM_0 = 70000
124 PARAMETER C_TAVDV_PS_MEM_0 = 70000
125 PARAMETER C_THZCE_PS_MEM_0 = 25000
126 PARAMETER C_TWC_PS_MEM_0 = 110000
127 PARAMETER C_TWP_PS_MEM_0 = 70000
128 PARAMETER C_TLZWE_PS_MEM_0 = 15000
129 PARAMETER C_OPB_CLK_PERIOD_PS = 20000
130 PARAMETER C_THZOE_PS_MEM_0 = 25000
131 PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 1
132 PARAMETER C_MEM0_BASEADDR = 0x20000000
133 PARAMETER C_MEM0_HIGHADDR = 0x2007FFFF
134 PARAMETER C_INCLUDE_NEGEDGE_IOREGS = 0
135 BUS_INTERFACE SOPB = mb_opb
136 PORT Mem_A = FLASH_ADDR_split
137 PORT Mem_CEN = FLASH_CEN
138 PORT Mem_OEN = FLASH_OEN
139 PORT Mem_WEN = FLASH_WEN
140 PORT Mem_DQ = FLASH_DQ
141END
142
143BEGIN opb_gpio
144 PARAMETER INSTANCE = SEVENSEG
145 PARAMETER HW_VER = 3.01.b
146 PARAMETER C_GPIO_WIDTH = 13
147 PARAMETER C_BASEADDR = 0x40000000
148 PARAMETER C_HIGHADDR = 0x4000ffff
149 BUS_INTERFACE SOPB = mb_opb
150 PORT GPIO_d_out = GPIO_7SEG_OUT
151END
152
153BEGIN chipscope_icon
154 PARAMETER INSTANCE = chipscope_icon_0
155 PARAMETER HW_VER = 1.01.a
156 PORT control0 = ila_control0
157END
158
159BEGIN chipscope_ila
160 PARAMETER INSTANCE = chipscope_ila_0
161 PARAMETER HW_VER = 1.01.a
162 PARAMETER C_NUM_DATA_SAMPLES = 1024
163 PARAMETER C_TRIG0_TRIGGER_IN_WIDTH = 19
0c85ad8f 164 PARAMETER C_TRIG1_UNITS = 0
165 PARAMETER C_TRIG2_UNITS = 0
166 PARAMETER C_TRIG0_UNITS = 1
7fb867f8 167 PORT CHIPSCOPE_ILA_CONTROL = ila_control0
168 PORT CLK = sys_clk_s
169 PORT TRIG0 = FLASH_ADDR
170END
171
172BEGIN util_bus_split
173 PARAMETER INSTANCE = flash_split
174 PARAMETER HW_VER = 1.00.a
175 PARAMETER C_SIZE_IN = 32
176 PARAMETER C_SPLIT = 13
177 PORT Sig = FLASH_ADDR_split
178 PORT Out2 = FLASH_ADDR
179END
180
4a1b2ca0 181BEGIN microblaze
182 PARAMETER INSTANCE = microblaze_0
183 PARAMETER HW_VER = 6.00.b
184 PARAMETER C_DEBUG_ENABLED = 1
185 PARAMETER C_NUMBER_OF_PC_BRK = 2
186 BUS_INTERFACE DOPB = mb_opb
187 BUS_INTERFACE IOPB = mb_opb
188 BUS_INTERFACE ILMB = ilmb
189 BUS_INTERFACE DLMB = dlmb
190END
191
192BEGIN lmb_bram_if_cntlr
193 PARAMETER INSTANCE = dlmb_cntlr
194 PARAMETER HW_VER = 2.00.a
195 PARAMETER C_BASEADDR = 0x00000000
196 PARAMETER C_HIGHADDR = 0x00007FFF
197 BUS_INTERFACE SLMB = dlmb
198 BUS_INTERFACE BRAM_PORT = dlmb_cntlr_BRAM_PORT
199END
200
201BEGIN lmb_bram_if_cntlr
202 PARAMETER INSTANCE = ilmb_cntlr
203 PARAMETER HW_VER = 2.00.a
204 PARAMETER C_BASEADDR = 0x00000000
205 PARAMETER C_HIGHADDR = 0x00007FFF
206 BUS_INTERFACE SLMB = ilmb
207 BUS_INTERFACE BRAM_PORT = ilmb_cntlr_BRAM_PORT
208END
209
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