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[raggedstone] / ethernet / ethernet.prj
1 vhdl work "source/top.vhd"
2 verilog work "source/ethernet/eth_crc.v"
3 verilog work "source/ethernet/eth_cop.v"
4 verilog work "source/ethernet/eth_maccontrol.v"
5 verilog work "source/ethernet/eth_register.v"
6 verilog work "source/ethernet/eth_fifo.v"
7 verilog work "source/ethernet/eth_rxstatem.v"
8 verilog work "source/ethernet/eth_txcounters.v"
9 verilog work "source/ethernet/eth_random.v"
10 verilog work "source/ethernet/eth_rxcounters.v"
11 verilog work "source/ethernet/eth_top.v"
12 verilog work "source/ethernet/eth_shiftreg.v"
13 verilog work "source/ethernet/eth_miim.v"
14 verilog work "source/ethernet/eth_wishbone.v"
15 verilog work "source/ethernet/eth_rxaddrcheck.v"
16 verilog work "source/ethernet/xilinx_dist_ram_16x32.v"
17 verilog work "source/ethernet/eth_spram_256x32.v"
18 verilog work "source/ethernet/eth_txethmac.v"
19 verilog work "source/ethernet/timescale.v"
20 verilog work "source/ethernet/eth_registers.v"
21 verilog work "source/ethernet/eth_defines.v"
22 verilog work "source/ethernet/eth_rxethmac.v"
23 verilog work "source/ethernet/eth_receivecontrol.v"
24 verilog work "source/ethernet/eth_outputcontrol.v"
25 verilog work "source/ethernet/eth_txstatem.v"
26 verilog work "source/ethernet/eth_transmitcontrol.v"
27 verilog work "source/ethernet/eth_macstatus.v"
28 verilog work "source/ethernet/eth_clockgen.v"
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