# ############################################################################## # Created by Base System Builder Wizard for Xilinx EDK 8.2.02 Build EDK_Im_Sp2.4 # Thu Mar 22 21:42:23 2007 # Target Board: Custom # Family: spartan3 # Device: xc3s1500 # Package: fg456 # Speed Grade: -4 # Processor: Microblaze # System clock frequency: 50.000000 MHz # Debug interface: On-Chip HW Debug Module # On Chip Memory : 64 KB # ############################################################################## PARAMETER VERSION = 2.1.0 PORT fpga_0_RS232_req_to_send_pin = net_gnd, DIR = O PORT fpga_0_RS232_RX_pin = fpga_0_RS232_RX, DIR = I PORT fpga_0_RS232_TX_pin = fpga_0_RS232_TX, DIR = O PORT sys_clk_pin = dcm_clk_s, DIR = I, SIGIS = CLK, CLK_FREQ = 50000000 PORT sys_rst_pin = sys_rst_s, DIR = I, RST_POLARITY = 0, SIGIS = RST PORT RS232foff = net_vcc, DIR = O PORT MEM_FLASH_DQ = FLASH_DQ, DIR = IO, VEC = [7:0] PORT MEM_FLASH_ADDR = FLASH_ADDR, DIR = O, VEC = [18:0] PORT MEM_FLASH_CE = FLASH_CEN, DIR = O, VEC = [0:0] PORT MEM_FLASH_OE = FLASH_OEN, DIR = O, VEC = [0:0] PORT MEM_FLASH_WE = FLASH_WEN, DIR = O PORT SEVENSEG_out = GPIO_7SEG_OUT, DIR = O, VEC = [0:12] PORT DBG_FLASH_ADDR = FLASH_ADDR_split, DIR = O, VEC = [0:31] PORT LED_out = LEDS_GPIO_d_out, DIR = O, VEC = [0:3] BEGIN lmb_v10 PARAMETER INSTANCE = ilmb PARAMETER HW_VER = 1.00.a PORT SYS_Rst = sys_bus_reset PORT LMB_Clk = sys_clk_s END BEGIN lmb_v10 PARAMETER INSTANCE = dlmb PARAMETER HW_VER = 1.00.a PORT SYS_Rst = sys_bus_reset PORT LMB_Clk = sys_clk_s END BEGIN bram_block PARAMETER INSTANCE = lmb_bram PARAMETER HW_VER = 1.00.a BUS_INTERFACE PORTA = dlmb_cntlr_BRAM_PORT BUS_INTERFACE PORTB = ilmb_cntlr_BRAM_PORT END BEGIN chipscope_icon PARAMETER INSTANCE = chipscope_icon_0 PARAMETER HW_VER = 1.01.a PORT control0 = ila_control0 END BEGIN chipscope_ila PARAMETER INSTANCE = chipscope_ila_0 PARAMETER HW_VER = 1.01.a PARAMETER C_NUM_DATA_SAMPLES = 1024 PARAMETER C_TRIG0_TRIGGER_IN_WIDTH = 19 PARAMETER C_TRIG1_UNITS = 0 PARAMETER C_TRIG2_UNITS = 0 PARAMETER C_TRIG0_UNITS = 1 PORT CHIPSCOPE_ILA_CONTROL = ila_control0 PORT CLK = sys_clk_s PORT TRIG0 = FLASH_ADDR END BEGIN util_bus_split PARAMETER INSTANCE = flash_split PARAMETER HW_VER = 1.00.a PARAMETER C_SIZE_IN = 32 PARAMETER C_SPLIT = 13 PORT Sig = FLASH_ADDR_split PORT Out2 = FLASH_ADDR END BEGIN microblaze PARAMETER INSTANCE = microblaze_0 PARAMETER HW_VER = 7.00.a PARAMETER C_DEBUG_ENABLED = 1 PARAMETER C_NUMBER_OF_PC_BRK = 2 PARAMETER C_FAMILY = spartan3 PARAMETER C_INSTANCE = microblaze_0 PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 0 PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 0 BUS_INTERFACE DEBUG = mdm_0_MBDEBUG_0 BUS_INTERFACE IPLB = mb_plb BUS_INTERFACE DPLB = mb_plb BUS_INTERFACE DLMB = dlmb BUS_INTERFACE ILMB = ilmb PORT MB_RESET = mb_reset END BEGIN lmb_bram_if_cntlr PARAMETER INSTANCE = dlmb_cntlr PARAMETER HW_VER = 2.10.a PARAMETER C_BASEADDR = 0x00000000 PARAMETER C_HIGHADDR = 0x00007fff BUS_INTERFACE SLMB = dlmb BUS_INTERFACE BRAM_PORT = dlmb_cntlr_BRAM_PORT END BEGIN lmb_bram_if_cntlr PARAMETER INSTANCE = ilmb_cntlr PARAMETER HW_VER = 2.10.a PARAMETER C_BASEADDR = 0x00000000 PARAMETER C_HIGHADDR = 0x00007fff BUS_INTERFACE SLMB = ilmb BUS_INTERFACE BRAM_PORT = ilmb_cntlr_BRAM_PORT END BEGIN mdm PARAMETER INSTANCE = debug_module PARAMETER HW_VER = 1.00.a PARAMETER C_BASEADDR = 0x84400000 PARAMETER C_HIGHADDR = 0x8440ffff PARAMETER C_MB_DBG_PORTS = 1 BUS_INTERFACE MBDEBUG_0 = mdm_0_MBDEBUG_0 BUS_INTERFACE SPLB = mb_plb PORT Debug_SYS_Rst = MB_Debug_Sys_Rst END BEGIN plb_v46 PARAMETER INSTANCE = mb_plb PARAMETER HW_VER = 1.00.a PORT SYS_Rst = sys_bus_reset PORT PLB_Clk = sys_clk_s END BEGIN xps_gpio PARAMETER INSTANCE = LEDS PARAMETER HW_VER = 1.00.a PARAMETER C_GPIO_WIDTH = 4 PARAMETER C_BASEADDR = 0x84418000 PARAMETER C_HIGHADDR = 0x844181ff BUS_INTERFACE SPLB = mb_plb PORT GPIO_d_out = LEDS_GPIO_d_out END BEGIN xps_uartlite PARAMETER INSTANCE = RS232 PARAMETER HW_VER = 1.00.a PARAMETER C_BAUDRATE = 115200 PARAMETER C_USE_PARITY = 0 PARAMETER C_BASEADDR = 0x84000000 PARAMETER C_HIGHADDR = 0x8400ffff PARAMETER C_SPLB_CLK_FREQ_HZ = 50000000 BUS_INTERFACE SPLB = mb_plb PORT TX = fpga_0_RS232_TX PORT RX = fpga_0_RS232_RX END BEGIN proc_sys_reset PARAMETER INSTANCE = proc_sys_reset_0 PARAMETER HW_VER = 2.00.a PARAMETER C_EXT_RESET_HIGH = 0 PORT MB_Debug_Sys_Rst = MB_Debug_Sys_Rst PORT Bus_Struct_Reset = sys_bus_reset PORT MB_Reset = mb_reset PORT Ext_Reset_In = sys_rst_s PORT Slowest_sync_clk = sys_clk_s PORT Dcm_locked = dcm_locked END BEGIN xps_mch_emc PARAMETER INSTANCE = FLASH PARAMETER HW_VER = 1.00.a PARAMETER C_MEM0_BASEADDR = 0x20000000 PARAMETER C_MEM0_HIGHADDR = 0x2007FFFF PARAMETER C_NUM_CHANNELS = 0 PARAMETER C_MAX_MEM_WIDTH = 8 PARAMETER C_MEM0_WIDTH = 8 PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 1 PARAMETER C_TCEDV_PS_MEM_0 = 70000 PARAMETER C_TAVDV_PS_MEM_0 = 70000 PARAMETER C_THZCE_PS_MEM_0 = 25000 PARAMETER C_THZOE_PS_MEM_0 = 25000 PARAMETER C_TWC_PS_MEM_0 = 110000 PARAMETER C_TWP_PS_MEM_0 = 70000 PARAMETER C_TLZWE_PS_MEM_0 = 15000 BUS_INTERFACE SPLB = mb_plb PORT Mem_DQ = FLASH_DQ PORT Mem_WEN = FLASH_WEN PORT Mem_OEN = FLASH_OEN PORT Mem_CEN = FLASH_CEN PORT Mem_A = FLASH_ADDR_split END BEGIN xps_gpio PARAMETER INSTANCE = SEVENSEG PARAMETER HW_VER = 1.00.a PARAMETER C_BASEADDR = 0x40000000 PARAMETER C_HIGHADDR = 0x400001FF PARAMETER C_GPIO_WIDTH = 13 BUS_INTERFACE SPLB = mb_plb PORT GPIO_d_out = GPIO_7SEG_OUT END BEGIN clock_generator PARAMETER INSTANCE = clock_generator_0 PARAMETER HW_VER = 1.00.a PARAMETER C_CLKIN_FREQ = 50000000 PARAMETER C_EXT_RESET_HIGH = 1 PARAMETER C_CLKOUT0_FREQ = 50000000 PARAMETER C_CLKOUT0_PHASE = 0 PARAMETER C_CLKOUT0_GROUP = NONE PORT CLKIN = dcm_clk_s PORT CLKOUT0 = sys_clk_s PORT RST = net_gnd PORT LOCKED = dcm_locked END