Update ChipScope coregeneration to coregen as used in ISE Design Suite 10.1

[raggedstone] / dhwk / Makefile

diff --git a/dhwk/Makefile b/dhwk/Makefile
index 875f05af0c6cb860fc3f6035e730692cf3790016..fed955350bdfeae0a6d6764a64f6fccaa81318b8 100644 (file)
--- a/dhwk/Makefile
+++ b/dhwk/Makefile
@@ -1,17 +1,30 @@
 PROJECT := dhwk
-CLEANFILES := fifo_generator_*
+CLEANFILES := dhwk_fifo* fifo_generator_* param.opt icon.vhd icon.vho icon_flist.txt icon_readme.txt icon_xmdf.tcl ila.vhd ila.vho ila_flist.txt ila_readme.txt ila_xmdf.tcl vio.vhd vio.vho vio_flist.txt vio_readme.txt vio_xmdf.tcl
 
 dhwk_all: ip all
 
-ip: icon.edn ila.edn fifo_generator_v3_2.ngc
+ip: icon.ngc ila.ngc vio.ngc dhwk_fifo.ngc
 
-icon.edn: icon.arg
-       $(CHIPSCOPE)/bin/lin/generate.sh icon -f=$<
+icon.ngc: icon.xco
+       coregen -b $<
+       -rmdir -p tmp/_cg
 
-ila.edn: ila.arg
-       $(CHIPSCOPE)/bin/lin/generate.sh ila -f=$<
+ila.ngc: ila.xco
+       coregen -b $<
+       -rmdir -p tmp/_cg
 
-fifo_generator_v3_2.ngc: fifo.xco
+vio.ngc: vio.xco
        coregen -b $<
+       -rmdir -p tmp/_cg
+
+dhwk_fifo.ngc: fifo.xco
+       coregen -b $<
+       -rmdir -p tmp/_cg
+
+test:
+       grep -q dhwk /proc/modules || (cd driver; ./build; sudo insmod dhwk.ko; sudo mknod -m 666 /dev/dhwk c 42 0)
+       dd if=/dev/urandom of=/tmp/in bs=1024 count=1024
+       (dd if=/dev/dhwk    of=/tmp/out bs=1024 count=1024; md5sum /tmp/in /tmp/out)&
+       dd if=/tmp/in      of=/dev/dhwk bs=1024 count=1024
 
 include ../common/Makefile.common