revert PCI_CLOCK in heartbeat project

[raggedstone] / dhwk / source / pci / config_04h.vhd

diff --git a/dhwk/source/pci/config_04h.vhd b/dhwk/source/pci/config_04h.vhd
index 70d0c9f26b3005c74994698c6e6a7345b2de2baf..5e26083da73ec9eb0ec0da4e3d9a2e363579d3c5 100644 (file)
--- a/dhwk/source/pci/config_04h.vhd
+++ b/dhwk/source/pci/config_04h.vhd
@@ -52,7 +52,7 @@ begin
                 CONF_STATUS(30) <= '0';
                 CONF_STATUS(31) <= '0';
 
-        elsif (PCI_CLOCK'event and PCI_CLOCK = '1') then
+        elsif (rising_edge(PCI_CLOCK)) then
                 if CONF_WR_04H = '1' and CBE_REGn(3) = '0' then
                         CONF_STATUS(30) <= not (AD_REG(30) and CONF_STATUS(30));
                         CONF_STATUS(31) <= not (AD_REG(31) and CONF_STATUS(31));
@@ -92,7 +92,7 @@ begin
                 CONF_COMMAND(15 downto 8) <= (others =>'0');
                 CONF_COMMAND( 6 downto 0) <= (others =>'0');
 
-        elsif (PCI_CLOCK'event and PCI_CLOCK = '1') then
+        elsif (rising_edge(PCI_CLOCK)) then
 
                 if CONF_WR_04H = '1'and CBE_REGn(1) = '0' then
                         CONF_COMMAND(15 downto 8) <= AD_REG(15 downto 8);