move config space header into pci core directory
[raggedstone] / dhwk / source / Parity_4.vhd
index 768816038e74c2d2dde11280e46f8cdd43be63da..0942c2633245582c3096287fa2322711be84b088 100644 (file)
@@ -1,23 +1,23 @@
--- J.STELZNER\r
--- INFORMATIK-3 LABOR\r
--- 23.08.2006\r
--- File: PARITY_4.VHD\r
-\r
-library ieee;\r
-use ieee.std_logic_1164.all;\r
-\r
-entity PARITY_4 is\r
-       port\r
-       (\r
-       PAR_IN  :in             std_logic_vector(3 downto 0);   \r
-       PAR_OUT :out    std_logic\r
-       );\r
-end entity PARITY_4 ; \r
-\r
-architecture PARITY_4_DESIGN of PARITY_4 is\r
-\r
-begin\r
-\r
-       PAR_OUT <= PAR_IN(3) xor PAR_IN(2) xor PAR_IN(1) xor PAR_IN(0) ;\r
-\r
-end architecture PARITY_4_DESIGN;\r
+-- J.STELZNER
+-- INFORMATIK-3 LABOR
+-- 23.08.2006
+-- File: PARITY_4.VHD
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity PARITY_4 is
+        port
+        (
+                PAR_IN :in std_logic_vector(3 downto 0);
+                PAR_OUT :out std_logic
+        );
+end entity PARITY_4;
+
+architecture PARITY_4_DESIGN of PARITY_4 is
+
+begin
+
+        PAR_OUT <= PAR_IN(3) xor PAR_IN(2) xor PAR_IN(1) xor PAR_IN(0);
+
+end architecture PARITY_4_DESIGN;
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