fix chipscope signals

[raggedstone] / ethernet / source / top.vhd

diff --git a/ethernet/source/top.vhd b/ethernet/source/top.vhd
index 9bb2d48c81aa88abf73c4055bd0b0b33869ca8e5..022a47626af97ac6659993dcb9d0507084f229da 100644 (file)
--- a/ethernet/source/top.vhd
+++ b/ethernet/source/top.vhd
@@ -269,13 +269,13 @@ wb_adr_i(7 downto 2)  <= wbm_adr_o (7 downto 2);
 wb_clk_i <= PCI_CLOCK;
 
 data(31 downto 0)  <= wbm_adr_o;
-data(40 downto 33) <= wbm_adr_o (7 downto 0);
-data(41) <= MD_PAD_IO;
-data(42) <= md_pad_o;
-data(43) <= md_padoe_o;
-data(44) <= mdc_pad_o_watch;
+data(39 downto 32) <= wbm_adr_o (7 downto 0);
+data(40) <= MD_PAD_IO;
+data(41) <= md_pad_o;
+data(42) <= md_padoe_o;
+data(43) <= mdc_pad_o_watch;
 MDC_PAD_O <= mdc_pad_o_watch;
-data(63 downto 45) <= (others => '0');
+data(63 downto 44) <= (others => '0');
 
 trig0(31 downto 0) <= (
        0 => wb_stb_i,