-constant STATE_END :std_logic_vector(3 downto 0) := "0001";
-constant STATE_SEND :std_logic_vector(3 downto 0) := "0010";
-constant STATE_SEND_BIT_0 :std_logic_vector(3 downto 0) := "0011";
-constant STATE_SEND_BIT_1 :std_logic_vector(3 downto 0) := "0100";
-constant STATE_SEND_BIT_2 :std_logic_vector(3 downto 0) := "0101";
-constant STATE_SEND_BIT_3 :std_logic_vector(3 downto 0) := "0110";
-constant STATE_SEND_BIT_4 :std_logic_vector(3 downto 0) := "0111";
-constant STATE_SEND_BIT_5 :std_logic_vector(3 downto 0) := "1000";
-constant STATE_SEND_BIT_6 :std_logic_vector(3 downto 0) := "1001";
-constant STATE_SEND_BIT_7 :std_logic_vector(3 downto 0) := "1010";
-
-signal COUNT :std_logic_vector (3 downto 0);
-signal STATE :std_logic_vector (3 downto 0);
-signal DATUM :std_logic_vector (7 downto 0);
-signal SYNC :std_logic; -- make SPC_RDY_IN stable
-
-attribute syn_state_machine:boolean;
-attribute syn_state_machine of STATE: signal is false;
-attribute syn_state_machine of COUNT: signal is false;
+ constant STATE_END :std_logic_vector(3 downto 0) := "0001";
+ constant STATE_SEND :std_logic_vector(3 downto 0) := "0010";
+ constant STATE_SEND_BIT_0 :std_logic_vector(3 downto 0) := "0011";
+ constant STATE_SEND_BIT_1 :std_logic_vector(3 downto 0) := "0100";
+ constant STATE_SEND_BIT_2 :std_logic_vector(3 downto 0) := "0101";
+ constant STATE_SEND_BIT_3 :std_logic_vector(3 downto 0) := "0110";
+ constant STATE_SEND_BIT_4 :std_logic_vector(3 downto 0) := "0111";
+ constant STATE_SEND_BIT_5 :std_logic_vector(3 downto 0) := "1000";
+ constant STATE_SEND_BIT_6 :std_logic_vector(3 downto 0) := "1001";
+ constant STATE_SEND_BIT_7 :std_logic_vector(3 downto 0) := "1010";
+
+ signal COUNT :std_logic_vector (3 downto 0);
+ signal STATE :std_logic_vector (3 downto 0);
+ signal DATUM :std_logic_vector (7 downto 0);
+ signal SYNC :std_logic; -- make SPC_RDY_IN stable
+
+ attribute syn_state_machine:boolean;
+ attribute syn_state_machine of STATE: signal is false;
+ attribute syn_state_machine of COUNT: signal is false;