move config space header into pci core directory

[raggedstone] / dhwk / source / ven_rev_id.vhd

diff --git a/dhwk/source/ven_rev_id.vhd b/dhwk/source/ven_rev_id.vhd
index 669264e0f578689474ed946650d28184c1b54a09..ad904615ebe0e4e80d4011f9a48aaff237e9203a 100644 (file)
--- a/dhwk/source/ven_rev_id.vhd
+++ b/dhwk/source/ven_rev_id.vhd
@@ -7,18 +7,18 @@ library IEEE;
 use IEEE.std_logic_1164.all;
 
 entity VEN_REV_ID is
-       port
-       (
-       VEN_ID  :out    std_logic_vector(15 downto 0);
-       REV_ID  :out    std_logic_vector( 7 downto 0)
-       );
+        port
+        (
+                VEN_ID :out std_logic_vector(15 downto 0);
+                REV_ID :out std_logic_vector( 7 downto 0)
+        );
 end entity VEN_REV_ID;
 
 architecture VEN_REV_ID_DESIGN of VEN_REV_ID is
 
 begin
 
-       VEN_ID  <= X"2222";
-       REV_ID  <= X"01";
+        VEN_ID <= X"2222";
+        REV_ID <= X"01";
 
 end architecture VEN_REV_ID_DESIGN;