- SYNC_FLAG <= SYNC_FLAG_DUMMY;
-
- RESERVE <= gnd;
- I23 : SER_PAR_CON
- Port Map ( PCI_CLOCK=>PCI_CLOCK, RESET=>RESET,
- SERIAL_IN=>SERIAL_IN, SPC_ENABLE=>SPC_ENABLE,
- SYNC_R_FIFO_FFn=>SYNC_FLAG_DUMMY(3),
- PAR_OUT(7 downto 0)=>R_FIFO_D_IN(7 downto 0),
- R_FIFO_WRITEn=>R_FIFO_WRITEn, SPC_RDY_OUT=>SPC_RDY_OUT );
- I22 : PAR_SER_CON
- Port Map ( PAR_IN(7 downto 0)=>S_FIFO_Q_OUT(7 downto 0),
- PCI_CLOCK=>PCI_CLOCK, PSC_ENABLE=>PSC_ENABLE,
- RESET=>RESET, SPC_RDY_IN=>SPC_RDY_IN,
- SYNC_S_FIFO_EFn=>SYNC_FLAG_DUMMY(5),
- S_FIFO_READn=>S_FIFO_READn, SER_OUT=>SERIAL_OUT );
- I21 : FIFO_IO_CONTROL
- Port Map ( FIFO_RDn=>FIFO_RDn, PCI_CLOCK=>PCI_CLOCK, RESET=>RESET,
- SYNC_FLAG_1=>SYNC_FLAG_DUMMY(1),
- SYNC_FLAG_7=>SYNC_FLAG_DUMMY(7),
- WRITE_XX1_0=>WRITE_XX1_0, R_ERROR=>R_ERROR,
- R_FIFO_READn=>R_FIFO_READn,
- R_FIFO_RESETn=>R_FIFO_RESETn,
- R_FIFO_RETRANSMITn=>R_FIFO_RETRANSMITn,
- S_ERROR=>S_ERROR, S_FIFO_RESETn=>S_FIFO_RESETn,
- S_FIFO_RETRANSMITn=>S_FIFO_RETRANSMITn,
- S_FIFO_WRITEn=>S_FIFO_WRITEn, SR_ERROR=>SR_ERROR );
- I20 : CONNECTING_FSM
- Port Map ( PCI_CLOCK=>PCI_CLOCK, PSC_ENABLE=>PSC_ENABLE,
- RESET=>RESET,
- S_FIFO_Q_OUT(7 downto 0)=>S_FIFO_Q_OUT(7 downto 0),
- SPC_ENABLE=>SPC_ENABLE,
- SYNC_R_FIFO_FFn=>SYNC_FLAG_DUMMY(3),
- SYNC_S_FIFO_EFn=>SYNC_FLAG_DUMMY(5),
- R_FIFO_D_IN(7 downto 0)=>XXXR_FIFO_D_IN(7 downto 0),
- R_FIFO_WRITEn=>XXXR_FIFO_WRITEn,
- S_FIFO_READn=>XXXS_FIFO_READn );
- I19 : FLAG_BUS
- Port Map ( FLAG_IN_0=>FLAG_IN_0, FLAG_IN_4=>FLAG_IN_4, HOLD=>HOLD,
- KONS_1=>KONST_1, PCI_CLOCK=>PCI_CLOCK, R_EFn=>R_EFn,
- R_FFn=>R_FFn, R_HFn=>R_HFn, S_EFn=>S_EFn, S_FFn=>S_FFn,
- S_HFn=>S_HFn,
- SYNC_FLAG(7 downto 0)=>SYNC_FLAG_DUMMY(7 downto 0) );
+ SYNC_FLAG <= SYNC_FLAG_DUMMY;
+
+ RESERVE <= gnd;
+ I23 : SER_PAR_CON
+ Port Map ( PCI_CLOCK=>PCI_CLOCK, RESET=>RESET,
+ SERIAL_IN=>SERIAL_IN, SPC_ENABLE=>SPC_ENABLE,
+ SYNC_R_FIFO_FFn=>SYNC_FLAG_DUMMY(3),
+ PAR_OUT(7 downto 0)=>R_FIFO_D_IN(7 downto 0),
+ R_FIFO_WRITEn=>R_FIFO_WRITEn, SPC_RDY_OUT=>SPC_RDY_OUT );
+ I22 : PAR_SER_CON
+ Port Map ( PAR_IN(7 downto 0)=>S_FIFO_Q_OUT(7 downto 0),
+ PCI_CLOCK=>PCI_CLOCK, PSC_ENABLE=>PSC_ENABLE,
+ RESET=>RESET, SPC_RDY_IN=>SPC_RDY_IN,
+ SYNC_S_FIFO_EFn=>SYNC_FLAG_DUMMY(5),
+ S_FIFO_READn=>S_FIFO_READn, SER_OUT=>SERIAL_OUT );
+ I21 : FIFO_IO_CONTROL
+ Port Map ( FIFO_RDn=>FIFO_RDn, PCI_CLOCK=>PCI_CLOCK, RESET=>RESET,
+ SYNC_FLAG_1=>SYNC_FLAG_DUMMY(1),
+ SYNC_FLAG_7=>SYNC_FLAG_DUMMY(7),
+ WRITE_XX1_0=>WRITE_XX1_0, R_ERROR=>R_ERROR,
+ R_FIFO_READn=>R_FIFO_READn,
+ R_FIFO_RESETn=>R_FIFO_RESETn,
+ R_FIFO_RETRANSMITn=>R_FIFO_RETRANSMITn,
+ S_ERROR=>S_ERROR, S_FIFO_RESETn=>S_FIFO_RESETn,
+ S_FIFO_RETRANSMITn=>S_FIFO_RETRANSMITn,
+ S_FIFO_WRITEn=>S_FIFO_WRITEn, SR_ERROR=>SR_ERROR );
+ I20 : CONNECTING_FSM
+ Port Map ( PCI_CLOCK=>PCI_CLOCK, PSC_ENABLE=>PSC_ENABLE,
+ RESET=>RESET,
+ S_FIFO_Q_OUT(7 downto 0)=>S_FIFO_Q_OUT(7 downto 0),
+ SPC_ENABLE=>SPC_ENABLE,
+ SYNC_R_FIFO_FFn=>SYNC_FLAG_DUMMY(3),
+ SYNC_S_FIFO_EFn=>SYNC_FLAG_DUMMY(5),
+ R_FIFO_D_IN(7 downto 0)=>XXXR_FIFO_D_IN(7 downto 0),
+ R_FIFO_WRITEn=>XXXR_FIFO_WRITEn,
+ S_FIFO_READn=>XXXS_FIFO_READn );
+ I19 : FLAG_BUS
+ Port Map ( FLAG_IN_0=>FLAG_IN_0, FLAG_IN_4=>FLAG_IN_4, HOLD=>HOLD,
+ KONS_1=>KONST_1, PCI_CLOCK=>PCI_CLOCK, R_EFn=>R_EFn,
+ R_FFn=>R_FFn, R_HFn=>R_HFn, S_EFn=>S_EFn, S_FFn=>S_FFn,
+ S_HFn=>S_HFn,
+ SYNC_FLAG(7 downto 0)=>SYNC_FLAG_DUMMY(7 downto 0) );