identing

[raggedstone] / dhwk / source / Io_mux.vhd

diff --git a/dhwk/source/Io_mux.vhd b/dhwk/source/Io_mux.vhd
index 5c9537d508cca619a97dd32244a9802d06b602a3..14dc42e70616d7ccbb937f8acf5b12c3cd807be2 100644 (file)
--- a/dhwk/source/Io_mux.vhd
+++ b/dhwk/source/Io_mux.vhd
@@ -7,30 +7,30 @@ library IEEE;
 use IEEE.std_logic_1164.all;
 
 entity IO_MUX is
-       port
-       (
-       READ_SEL                        :in             std_logic_vector ( 1 downto 0);
-       USER_DATA                       :in             std_logic_vector (31 downto 0);
-       CONFIG_DATA             :in             std_logic_vector (31 downto 0);
-       PCI_AD                          :in             std_logic_vector (31 downto 0);
-       IO_DATA                         :out    std_logic_vector (31 downto 0)
-       );
+        port
+        (
+                READ_SEL :in std_logic_vector ( 1 downto 0);
+                USER_DATA :in std_logic_vector (31 downto 0);
+                CONFIG_DATA :in std_logic_vector (31 downto 0);
+                PCI_AD :in std_logic_vector (31 downto 0);
+                IO_DATA :out std_logic_vector (31 downto 0)
+        );
 end entity IO_MUX;
 
 architecture IO_MUX_DESIGN of IO_MUX is
 
-       signal  MUX             :std_logic_vector (31 downto 0); 
+        signal MUX :std_logic_vector (31 downto 0);
 
-begin 
+begin
 
-       MUX     <=      PCI_AD                  when    READ_SEL        =       "00"    else    -- WRITE_CONFIG 
-                                       PCI_AD                  when    READ_SEL        =       "01"    else    -- WRITE_IO
-                                       CONFIG_DATA     when    READ_SEL        =       "10"    else    -- READ_CONFIG 
-                                       USER_DATA               when    READ_SEL        =       "11"    else    -- READ_IO      
-                                       CONFIG_DATA;
+        MUX <= PCI_AD when READ_SEL = "00" else -- WRITE_CONFIG
+               PCI_AD when READ_SEL = "01" else -- WRITE_IO
+               CONFIG_DATA when READ_SEL = "10" else -- READ_CONFIG
+               USER_DATA when READ_SEL = "11" else -- READ_IO
+               CONFIG_DATA;
 
---                                     MUX;
+ -- MUX;
 
-       IO_DATA <= MUX;
+        IO_DATA <= MUX;
 
 end architecture IO_MUX_DESIGN;