- signal REG :std_logic_vector(7 downto 0);
- signal HELP_0,HELP_1 :std_logic;
- signal SIG_LOAD :std_logic;
-
-
---**********************************************************
---*** CONNECTING FSM CODIERUNG ***
---**********************************************************
---
---
--- ---------- HELP_0
--- |--------- HELP_1
--- ||-------- LOAD
--- |||------- WRITE
--- ||||------ READ
--- |||||
- constant S0 :std_logic_vector(4 downto 0) := "00011";--
- constant S1 :std_logic_vector(4 downto 0) := "01010";--READ
- constant S2 :std_logic_vector(4 downto 0) := "10010";--READ
- constant S3 :std_logic_vector(4 downto 0) := "11110";--READ,LOAD
- constant S4 :std_logic_vector(4 downto 0) := "11011";--
- constant S5 :std_logic_vector(4 downto 0) := "01001";--WRITE
- constant S6 :std_logic_vector(4 downto 0) := "10001";--WRITE
- constant S7 :std_logic_vector(4 downto 0) := "11001";--WRITE
-
- signal STATES :std_logic_vector(4 downto 0);
+ signal REG :std_logic_vector(7 downto 0);
+ signal HELP_0,HELP_1 :std_logic;
+ signal SIG_LOAD :std_logic;
+
+
+ --**********************************************************
+ --*** CONNECTING FSM CODIERUNG ***
+ --**********************************************************
+ --
+ --
+ -- ---------- HELP_0
+ -- |--------- HELP_1
+ -- ||-------- LOAD
+ -- |||------- WRITE
+ -- ||||------ READ
+ -- |||||
+ constant S0 :std_logic_vector(4 downto 0) := "00011";--
+ constant S1 :std_logic_vector(4 downto 0) := "01010";--READ
+ constant S2 :std_logic_vector(4 downto 0) := "10010";--READ
+ constant S3 :std_logic_vector(4 downto 0) := "11110";--READ,LOAD
+ constant S4 :std_logic_vector(4 downto 0) := "11011";--
+ constant S5 :std_logic_vector(4 downto 0) := "01001";--WRITE
+ constant S6 :std_logic_vector(4 downto 0) := "10001";--WRITE
+ constant S7 :std_logic_vector(4 downto 0) := "11001";--WRITE
+
+ signal STATES :std_logic_vector(4 downto 0);
+
+ --************************************************************
+ --*** FSM SPEICHER-AUTOMAT ***
+ --************************************************************
+
+ attribute syn_state_machine : boolean;
+ attribute syn_state_machine of STATES : signal is false;