replace microblaze 4.0 with new microblaze 6.0

[raggedstone] / xps / raggedstone.mhs

diff --git a/xps/raggedstone.mhs b/xps/raggedstone.mhs
index db12b74a69b604f761262066081c41a2c58a772d..6e8a2a1eebbb990331d2eede77963a545fde87f3 100644 (file)
--- a/xps/raggedstone.mhs
+++ b/xps/raggedstone.mhs
@@ -32,27 +32,6 @@
  PORT DBG_FLASH_ADDR = FLASH_ADDR_split, DIR = O, VEC = [0:31]
 
 
-BEGIN microblaze
- PARAMETER INSTANCE = microblaze_0
- PARAMETER HW_VER = 4.00.b
- PARAMETER C_USE_FPU = 0
- PARAMETER C_DEBUG_ENABLED = 1
- PARAMETER C_NUMBER_OF_PC_BRK = 2
- PARAMETER C_FSL_DATA_SIZE = 32
- PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 0
- PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 0
- BUS_INTERFACE DLMB = dlmb
- BUS_INTERFACE ILMB = ilmb
- BUS_INTERFACE DOPB = mb_opb
- BUS_INTERFACE IOPB = mb_opb
- PORT DBG_CAPTURE = DBG_CAPTURE_s
- PORT DBG_CLK = DBG_CLK_s
- PORT DBG_REG_EN = DBG_REG_EN_s
- PORT DBG_TDI = DBG_TDI_s
- PORT DBG_TDO = DBG_TDO_s
- PORT DBG_UPDATE = DBG_UPDATE_s
-END
-
 BEGIN opb_v20
  PARAMETER INSTANCE = mb_opb
  PARAMETER HW_VER = 1.10.c
@@ -69,12 +48,6 @@ BEGIN opb_mdm
  PARAMETER C_BASEADDR = 0x41400000
  PARAMETER C_HIGHADDR = 0x4140ffff
  BUS_INTERFACE SOPB = mb_opb
- PORT DBG_CAPTURE_0 = DBG_CAPTURE_s
- PORT DBG_CLK_0 = DBG_CLK_s
- PORT DBG_REG_EN_0 = DBG_REG_EN_s
- PORT DBG_TDI_0 = DBG_TDI_s
- PORT DBG_TDO_0 = DBG_TDO_s
- PORT DBG_UPDATE_0 = DBG_UPDATE_s
 END
 
 BEGIN lmb_v10
@@ -93,29 +66,11 @@ BEGIN lmb_v10
  PORT LMB_Clk = sys_clk_s
 END
 
-BEGIN lmb_bram_if_cntlr
- PARAMETER INSTANCE = dlmb_cntlr
- PARAMETER HW_VER = 1.00.b
- PARAMETER C_BASEADDR = 0x00000000
- PARAMETER C_HIGHADDR = 0x00007FFF
- BUS_INTERFACE SLMB = dlmb
- BUS_INTERFACE BRAM_PORT = dlmb_port
-END
-
-BEGIN lmb_bram_if_cntlr
- PARAMETER INSTANCE = ilmb_cntlr
- PARAMETER HW_VER = 1.00.b
- PARAMETER C_BASEADDR = 0x00000000
- PARAMETER C_HIGHADDR = 0x00007FFF
- BUS_INTERFACE SLMB = ilmb
- BUS_INTERFACE BRAM_PORT = ilmb_port
-END
-
 BEGIN bram_block
  PARAMETER INSTANCE = lmb_bram
  PARAMETER HW_VER = 1.00.a
- BUS_INTERFACE PORTA = ilmb_port
- BUS_INTERFACE PORTB = dlmb_port
+ BUS_INTERFACE PORTA = dlmb_cntlr_BRAM_PORT
+ BUS_INTERFACE PORTB = ilmb_cntlr_BRAM_PORT
 END
 
 BEGIN opb_uartlite
@@ -135,7 +90,7 @@ END
 
 BEGIN dcm_module
  PARAMETER INSTANCE = dcm_0
- PARAMETER HW_VER = 1.00.a
+ PARAMETER HW_VER = 1.00.b
  PARAMETER C_CLK0_BUF = TRUE
  PARAMETER C_CLKIN_PERIOD = 20.000000
  PARAMETER C_CLK_FEEDBACK = 1X
@@ -206,8 +161,9 @@ BEGIN chipscope_ila
  PARAMETER HW_VER = 1.01.a
  PARAMETER C_NUM_DATA_SAMPLES = 1024
  PARAMETER C_TRIG0_TRIGGER_IN_WIDTH = 19
- PARAMETER C_TRIG1_UNITS = 1
- PARAMETER C_TRIG2_UNITS = 1
+ PARAMETER C_TRIG1_UNITS = 0
+ PARAMETER C_TRIG2_UNITS = 0
+ PARAMETER C_TRIG0_UNITS = 1
  PORT CHIPSCOPE_ILA_CONTROL = ila_control0
  PORT CLK = sys_clk_s
  PORT TRIG0 = FLASH_ADDR
@@ -222,3 +178,32 @@ BEGIN util_bus_split
  PORT Out2 = FLASH_ADDR
 END
 
+BEGIN microblaze
+ PARAMETER INSTANCE = microblaze_0
+ PARAMETER HW_VER = 6.00.b
+ PARAMETER C_DEBUG_ENABLED = 1
+ PARAMETER C_NUMBER_OF_PC_BRK = 2
+ BUS_INTERFACE DOPB = mb_opb
+ BUS_INTERFACE IOPB = mb_opb
+ BUS_INTERFACE ILMB = ilmb
+ BUS_INTERFACE DLMB = dlmb
+END
+
+BEGIN lmb_bram_if_cntlr
+ PARAMETER INSTANCE = dlmb_cntlr
+ PARAMETER HW_VER = 2.00.a
+ PARAMETER C_BASEADDR = 0x00000000
+ PARAMETER C_HIGHADDR = 0x00007FFF
+ BUS_INTERFACE SLMB = dlmb
+ BUS_INTERFACE BRAM_PORT = dlmb_cntlr_BRAM_PORT
+END
+
+BEGIN lmb_bram_if_cntlr
+ PARAMETER INSTANCE = ilmb_cntlr
+ PARAMETER HW_VER = 2.00.a
+ PARAMETER C_BASEADDR = 0x00000000
+ PARAMETER C_HIGHADDR = 0x00007FFF
+ BUS_INTERFACE SLMB = ilmb
+ BUS_INTERFACE BRAM_PORT = ilmb_cntlr_BRAM_PORT
+END
+