use internal clock

[raggedstone] / heartbeat / source / heartbeat.vhd

diff --git a/heartbeat/source/heartbeat.vhd b/heartbeat/source/heartbeat.vhd
index cae72cd9a4e4f6042fa4cac8a6a5647e8f26e0cc..a3961603e20e9a03a9e19a92681c8a9aa37cdb03 100644 (file)
--- a/heartbeat/source/heartbeat.vhd
+++ b/heartbeat/source/heartbeat.vhd
@@ -46,7 +46,7 @@ if (rising_edge(clk_i)) then
                led9_o <= state(7);
                counter := counter + 1;
                if counter = divider then
-                       if state(7) = '1' then
+                       if state(3) = '1' then
                                direction := '1';
                        end if;