Update ChipScope coregeneration to coregen as used in ISE Design Suite 10.1

[raggedstone] / dhwk / Makefile

diff --git a/dhwk/Makefile b/dhwk/Makefile
index f63f36c9255588296e8be79d90c440cf3715e1bd..fed955350bdfeae0a6d6764a64f6fccaa81318b8 100644 (file)
--- a/dhwk/Makefile
+++ b/dhwk/Makefile
@@ -1,18 +1,21 @@
 PROJECT := dhwk
-CLEANFILES := dhwk_fifo* fifo_generator_* param.opt
+CLEANFILES := dhwk_fifo* fifo_generator_* param.opt icon.vhd icon.vho icon_flist.txt icon_readme.txt icon_xmdf.tcl ila.vhd ila.vho ila_flist.txt ila_readme.txt ila_xmdf.tcl vio.vhd vio.vho vio_flist.txt vio_readme.txt vio_xmdf.tcl
 
 dhwk_all: ip all
 
-ip: icon.edn ila.edn vio.edn dhwk_fifo.ngc
+ip: icon.ngc ila.ngc vio.ngc dhwk_fifo.ngc
 
-icon.edn: icon.arg
-       $(CHIPSCOPE)/bin/lin/generate.sh icon -f=$<
+icon.ngc: icon.xco
+       coregen -b $<
+       -rmdir -p tmp/_cg
 
-ila.edn: ila.arg
-       $(CHIPSCOPE)/bin/lin/generate.sh ila -f=$<
+ila.ngc: ila.xco
+       coregen -b $<
+       -rmdir -p tmp/_cg
 
-vio.edn: vio.arg
-       $(CHIPSCOPE)/bin/lin/generate.sh vio -f=$<
+vio.ngc: vio.xco
+       coregen -b $<
+       -rmdir -p tmp/_cg
 
 dhwk_fifo.ngc: fifo.xco
        coregen -b $<