---+-----------------------------------------------------------------------------+\r
---| CONSTANTS |\r
---+-----------------------------------------------------------------------------+\r
---+-----------------------------------------------------------------------------+\r
---| SIGNALS |\r
---+-----------------------------------------------------------------------------+\r
-\r
- signal wb_adr : std_logic_vector(24 downto 1); \r
- signal wb_dat_out : std_logic_vector(15 downto 0);\r
- signal wb_dat_in : std_logic_vector(15 downto 0);\r
- signal wb_sel : std_logic_vector(1 downto 0);\r
- signal wb_we : std_logic;\r
- signal wb_stb : std_logic;\r
- signal wb_cyc : std_logic;\r
- signal wb_ack : std_logic;\r
- signal wb_err : std_logic;\r
- signal wb_int : std_logic;\r
+signal wb_adr : std_logic_vector(24 downto 1); \r
+signal wb_dat_out : std_logic_vector(15 downto 0);\r
+signal wb_dat_in : std_logic_vector(15 downto 0);\r
+signal wb_sel : std_logic_vector(1 downto 0);\r
+signal wb_we : std_logic;\r
+signal wb_stb : std_logic;\r
+signal wb_cyc : std_logic;\r
+signal wb_ack : std_logic;\r
+signal wb_err : std_logic;\r
+signal wb_int : std_logic;\r