X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/blobdiff_plain/1a94112a1a2726536608715514802c453ce2e95b..675f45d062971a8e9a17be7aa2f19b102d60c7b0:/ethernet/source/top.vhd

diff --git a/ethernet/source/top.vhd b/ethernet/source/top.vhd
index c031ae6..1617eee 100644
--- a/ethernet/source/top.vhd
+++ b/ethernet/source/top.vhd
@@ -32,6 +32,8 @@ PORT(
         MD_PAD_IO : INOUT std_logic;
         MDC_PAD_O : OUT std_logic;
 
+	PHY_CLOCK : OUT std_logic;
+
 	LED_2 : OUT std_logic
 );
 end ethernet;
@@ -169,6 +171,14 @@ port (
 	);
 end component;
 
+component phydcm is
+port ( CLKIN_IN        : in    std_logic;
+       RST_IN          : in    std_logic;
+       CLKFX_OUT       : out   std_logic;
+       CLK0_OUT        : out   std_logic;
+       LOCKED_OUT      : out   std_logic);
+end component;
+
 signal pci_rst_o : std_logic;
 signal pci_rst_oe_o : std_logic;
 signal pci_inta_o : std_logic;
@@ -391,4 +401,13 @@ port map (
 	trig0 => trig0
 	);
 
+eth_dcm : phydcm
+port map (
+	CLKIN_IN => PCI_CLOCK,
+	RST_IN => not PCI_RSTn,
+	CLKFX_OUT => PHY_CLOCK,
+	CLK0_OUT => open,
+	LOCKED_OUT => open
+	);
+
 end architecture ethernet_arch;