X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/blobdiff_plain/2245a9fc38ae7959867a57992da382b22117b8a4..40a64bf197a313eb87943d84a985e0d90086729e:/dhwk/icon.xco diff --git a/dhwk/icon.xco b/dhwk/icon.xco new file mode 100644 index 0000000..e501122 --- /dev/null +++ b/dhwk/icon.xco @@ -0,0 +1,31 @@ +# BEGIN Project Options +SET addpads = False +SET asysymbol = False +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = False +SET designentry = VHDL +SET device = xc3s1500 +SET devicefamily = spartan3 +SET flowvendor = Other +SET formalverification = False +SET foundationsym = False +SET implementationfiletype = Ngc +SET package = fg456 +SET removerpms = False +SET simulationfiles = Structural +SET speedgrade = -4 +SET verilogsim = False +SET vhdlsim = True +# END Project Options +# BEGIN Select +SELECT ICON_(ChipScope_Pro_-_Integrated_Controller) family Xilinx,_Inc. 1.02.a +# END Select +# BEGIN Parameters +CSET component_name=icon +CSET number_control_ports=2 +CSET use_ext_bscan=false +CSET use_jtag_bufg=false +CSET use_unused_bscan=false +CSET user_scan_chain=USER1 +# END Parameters +GENERATE