X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/blobdiff_plain/528d015aa19100f9f97b3469ab7d2aafa43b425e..40a1f26c3a09dbd1f71f4fd7f3aca74f387a09db:/ethernet/source/pci/timescale.v

diff --git a/ethernet/source/pci/timescale.v b/ethernet/source/pci/timescale.v
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+//////////////////////////////////////////////////////////////////////
+////                                                              ////
+////  File name "timescale.v"                                     ////
+////                                                              ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: timescale.v,v $
+// Revision 1.1  2007-03-20 17:50:56  sithglan
+// add shit
+//
+// Revision 1.2  2002/02/01 15:25:13  mihad
+// Repaired a few bugs, updated specification, added test bench files and design document
+//
+// Revision 1.1  2001/10/05 08:11:22  mihad
+// Updated all files with inclusion of timescale file for simulation purposes.
+//
+//
+
+// timescale directive is included in all core's modules for simulation purposes
+`timescale 1ns/1ps
\ No newline at end of file