X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/blobdiff_plain/7a6a1ff70fc526bd7f7feacdf2f25ee77f779260..add53bd973ab9a4f62d7deb651edd625de5ff26b:/ethernet/ethernet.ucf

diff --git a/ethernet/ethernet.ucf b/ethernet/ethernet.ucf
index b62ae07..cba18c4 100644
--- a/ethernet/ethernet.ucf
+++ b/ethernet/ethernet.ucf
@@ -49,7 +49,7 @@ NET "PCI_PAR"  LOC = "A9" | IOSTANDARD = PCI33_3  | SLEW = FAST ;
 NET "PCI_REQn"  LOC = "C18" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
 NET "PCI_GNTn"  LOC = "D18" | IOSTANDARD = PCI33_3 ;
 
-NET "MTX_CLK_PAD_I"  LOC = "M2" | IOSTANDARD = LVCMOS33;
+NET "MTX_CLK_PAD_I"  LOC = "M2" | IOSTANDARD = LVCMOS33 | CLOCK_DEDICATED_ROUTE = FALSE;
 
 NET "MTXD_PAD_O<0>"  LOC = "M5" | IOSTANDARD = LVCMOS33;
 NET "MTXD_PAD_O<1>"  LOC = "M6" | IOSTANDARD = LVCMOS33;
@@ -59,7 +59,7 @@ NET "MTXD_PAD_O<3>"  LOC = "T1" | IOSTANDARD = LVCMOS33;
 NET "MTXEN_PAD_O"    LOC = "M1" | IOSTANDARD = LVCMOS33;
 # NET "MTXERR_PAD_O" LOC = "" | IOSTANDARD = LVCMOS33;
 
-NET "MRX_CLK_PAD_I" LOC = "L1" | IOSTANDARD = LVCMOS33;
+NET "MRX_CLK_PAD_I" LOC = "L1" | IOSTANDARD = LVCMOS33 | CLOCK_DEDICATED_ROUTE = FALSE;
 
 NET "MRXD_PAD_I<0>" LOC = "N3" | IOSTANDARD = LVCMOS33;
 NET "MRXD_PAD_I<1>" LOC = "N4" | IOSTANDARD = LVCMOS33;
@@ -77,3 +77,18 @@ NET "MDC_PAD_O"   LOC = "U2" | IOSTANDARD = LVCMOS33;
 NET "PHY_CLOCK"   LOC = "L5" | IOSTANDARD = LVCMOS33;
 
 NET "LED_2"  LOC = "AB5"  | IOSTANDARD = LVTTL | DRIVE = 24 ;
+
+INST "eth_dcm/DCM_INST" CLK_FEEDBACK = 1X;
+INST "eth_dcm/DCM_INST" CLKDV_DIVIDE = 2.0;
+INST "eth_dcm/DCM_INST" CLKFX_DIVIDE = 29;
+INST "eth_dcm/DCM_INST" CLKFX_MULTIPLY = 22;
+INST "eth_dcm/DCM_INST" CLKIN_DIVIDE_BY_2 = FALSE;
+INST "eth_dcm/DCM_INST" CLKIN_PERIOD = 30.303;
+INST "eth_dcm/DCM_INST" CLKOUT_PHASE_SHIFT = NONE;
+INST "eth_dcm/DCM_INST" DESKEW_ADJUST = SYSTEM_SYNCHRONOUS;
+INST "eth_dcm/DCM_INST" DFS_FREQUENCY_MODE = LOW;
+INST "eth_dcm/DCM_INST" DLL_FREQUENCY_MODE = LOW;
+INST "eth_dcm/DCM_INST" DUTY_CYCLE_CORRECTION = TRUE;
+INST "eth_dcm/DCM_INST" FACTORY_JF = 8080;
+INST "eth_dcm/DCM_INST" PHASE_SHIFT = 0;
+INST "eth_dcm/DCM_INST" STARTUP_WAIT = FALSE;