From: sithglan Date: Wed, 21 Mar 2007 11:53:06 +0000 (+0000) Subject: enable address translation X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/commitdiff_plain/230daedd26dd92ec42ae8e91f5071d4218474753 enable address translation --- diff --git a/ethernet/source/pci/pci_user_constants.v b/ethernet/source/pci/pci_user_constants.v index 2415dce..70c9b0e 100644 --- a/ethernet/source/pci/pci_user_constants.v +++ b/ethernet/source/pci/pci_user_constants.v @@ -39,7 +39,10 @@ // CVS Revision History // // $Log: pci_user_constants.v,v $ -// Revision 1.2 2007-03-20 20:56:19 sithglan +// Revision 1.3 2007-03-21 11:53:06 sithglan +// enable address translation +// +// Revision 1.2 2007/03/20 20:56:19 sithglan // changes // // Revision 1.1 2007/03/20 17:50:56 sithglan @@ -281,7 +284,7 @@ // addresses will pass through bridge unchanged, regardles of address translation enable bits. // Address translation also slows down the decoding //When ADDR_TRAN_IMPL this define is present then adress translation is enabled after reset. -//`define ADDR_TRAN_IMPL +`define ADDR_TRAN_IMPL // decode speed for WISHBONE definition - initial cycle on WISHBONE bus will take 1 WS for FAST, 2 WSs for MEDIUM and 3 WSs for slow. // slower decode speed can be used, to provide enough time for address to be decoded.