From: michael <michael>
Date: Sun, 11 Feb 2007 22:31:32 +0000 (+0000)
Subject: old 7seg thingie
X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/commitdiff_plain/2d8e1276d2533e26fcbc241b34dcc0af17eed492

old 7seg thingie
---

diff --git a/dhwk_old/source/top_dhwk.vhd b/dhwk_old/source/top_dhwk.vhd
index 0e03a31..accd1a3 100644
--- a/dhwk_old/source/top_dhwk.vhd
+++ b/dhwk_old/source/top_dhwk.vhd
@@ -109,6 +109,27 @@ port (
 );
 end component;
 
+component wb_7seg_new
+port (
+	clk_i		: in std_logic;
+	nrst_i		: in std_logic;
+	
+	wb_adr_i	: in std_logic_vector(24 downto 1);
+	wb_dat_o	: out std_logic_vector(15 downto 0);
+	wb_dat_i	: in std_logic_vector(15 downto 0);
+	wb_sel_i	: in std_logic_vector(1 downto 0);
+	wb_we_i		: in std_logic;
+	wb_stb_i	: in std_logic;
+	wb_cyc_i	: in std_logic;
+	wb_ack_o	: out std_logic;
+	wb_err_o	: out std_logic;
+	wb_int_o	: out std_logic;
+	
+	DISP_SEL	: inout std_logic_vector(3 downto 0);
+	DISP_LED	: out std_logic_vector(6 downto 0)
+);
+end component;
+
 signal 	wb_adr :		std_logic_vector(24 downto 1);   
 signal	wb_dat_out :	std_logic_vector(15 downto 0);
 signal 	wb_dat_in :		std_logic_vector(15 downto 0);