From: michael Date: Wed, 21 Mar 2007 20:20:05 +0000 (+0000) Subject: more chipscope signals X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/commitdiff_plain/4b4adc0dde97077338e46f8aab675619cf8ab42c?ds=inline more chipscope signals --- diff --git a/ethernet/ethernet.xst b/ethernet/ethernet.xst index 4192582..48caa9c 100644 --- a/ethernet/ethernet.xst +++ b/ethernet/ethernet.xst @@ -8,7 +8,7 @@ run -top ethernet -opt_mode Speed -opt_level 1 --iuc NO +-iuc YES -lso ethernet.lso -keep_hierarchy NO -glob_opt AllClockNets diff --git a/ethernet/source/top.vhd b/ethernet/source/top.vhd index 1617eee..9bb2d48 100644 --- a/ethernet/source/top.vhd +++ b/ethernet/source/top.vhd @@ -230,6 +230,7 @@ signal md_pad_o : std_logic; signal md_padoe_o : std_logic; signal int_o : std_logic; signal wbm_adr_o : std_logic_vector(31 downto 0); +signal mdc_pad_o_watch : std_logic; signal m_wb_cti_o : std_logic_vector(2 downto 0); signal m_wb_bte_o : std_logic_vector(1 downto 0); @@ -269,10 +270,18 @@ wb_clk_i <= PCI_CLOCK; data(31 downto 0) <= wbm_adr_o; data(40 downto 33) <= wbm_adr_o (7 downto 0); -data(63 downto 41) <= (others => '0'); +data(41) <= MD_PAD_IO; +data(42) <= md_pad_o; +data(43) <= md_padoe_o; +data(44) <= mdc_pad_o_watch; +MDC_PAD_O <= mdc_pad_o_watch; +data(63 downto 45) <= (others => '0'); trig0(31 downto 0) <= ( 0 => wb_stb_i, + 1 => MD_PAD_IO, + 2 => md_pad_o, + 3 => md_padoe_o, others => '0' ); @@ -379,7 +388,7 @@ Inst_eth_top: eth_top PORT MAP( mrxerr_pad_i => MRXERR_PAD_I, mcoll_pad_i => MCOLL_PAD_I, mcrs_pad_i => MCRS_PAD_I, - mdc_pad_o => MDC_PAD_O, + mdc_pad_o => mdc_pad_o_watch, md_pad_i => MD_PAD_IO, md_pad_o => md_pad_o, md_padoe_o => md_padoe_o,