From 7b87d14ddc684e6387fea63b0c8551737de13e15 Mon Sep 17 00:00:00 2001 From: michael Date: Sun, 11 Mar 2007 00:52:26 +0000 Subject: [PATCH 1/1] more LA signals --- dhwk/dhwk.cpj | 187 ++++++++++++++++++++------------------ dhwk/dhwk.ucf | 12 +-- dhwk/source/top.vhd | 46 +++++++--- heartbeat/raggedstone.ucf | 2 +- 4 files changed, 139 insertions(+), 108 deletions(-) diff --git a/dhwk/dhwk.cpj b/dhwk/dhwk.cpj index 9b11c9e..92b4b9d 100644 --- a/dhwk/dhwk.cpj +++ b/dhwk/dhwk.cpj @@ -1,5 +1,5 @@ #ChipScope Pro Analyzer Project File, Version 3.0 -#Sat Mar 10 20:16:30 GMT+01:00 2007 +#Sun Mar 11 01:31:38 GMT+01:00 2007 deviceChain.deviceName0=XCF02S deviceChain.deviceName1=XCF04S deviceChain.deviceName2=XC3S1500 @@ -10,21 +10,21 @@ deviceChain.name0=MyDevice0 deviceChain.name1=MyDevice1 deviceChain.name2=MyDevice2 deviceIds=050450930504609301434093 -mdiAreaHeight=0.7993890020366599 -mdiAreaHeightLast=0.7993890020366599 +mdiAreaHeight=0.8269689737470167 +mdiAreaHeightLast=0.8269689737470167 mdiCount=2 mdiDevice0=2 mdiDevice1=2 -mdiType0=0 -mdiType1=1 +mdiType0=1 +mdiType1=0 mdiUnit0=0 mdiUnit1=0 -navigatorHeight=0.17922606924643583 -navigatorHeightLast=0.17922606924643583 -navigatorWidth=0.17993079584775087 -navigatorWidthLast=0.17993079584775087 +navigatorHeight=0.18257756563245822 +navigatorHeightLast=0.18257756563245822 +navigatorWidth=0.18545081967213115 +navigatorWidthLast=0.18545081967213115 unit.-1.-1.username= -unit.2.0.0.HEIGHT0=0.30818415 +unit.2.0.0.HEIGHT0=0.30869564 unit.2.0.0.TriggerRow0=1 unit.2.0.0.TriggerRow1=1 unit.2.0.0.TriggerRow2=1 @@ -33,11 +33,11 @@ unit.2.0.0.X0=0.0 unit.2.0.0.Y0=0.0 unit.2.0.1.HEIGHT1=0.6956522 unit.2.0.1.WIDTH1=1.0 -unit.2.0.1.X1=-0.0010683761 +unit.2.0.1.X1=-0.0012771392 unit.2.0.1.Y1=0.3043478 -unit.2.0.MFBitsA0=0XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +unit.2.0.MFBitsA0=XXXXXXXXXXXXXXXX11111111XXXXXXXX unit.2.0.MFBitsB0=00000000000000000000000000000000 -unit.2.0.MFCompareA0=0 +unit.2.0.MFCompareA0=1 unit.2.0.MFCompareB0=999 unit.2.0.MFCount=1 unit.2.0.MFDisplay0=0 @@ -511,42 +511,42 @@ unit.2.0.port.-1.s.71.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.71.name=DataPort[71] unit.2.0.port.-1.s.71.orderindex=-1 unit.2.0.port.-1.s.71.visible=1 -unit.2.0.port.-1.s.72.alias=DataPort[72] +unit.2.0.port.-1.s.72.alias=IDSEL unit.2.0.port.-1.s.72.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.72.name=DataPort[72] unit.2.0.port.-1.s.72.orderindex=-1 unit.2.0.port.-1.s.72.visible=1 -unit.2.0.port.-1.s.73.alias= +unit.2.0.port.-1.s.73.alias=TRDYn unit.2.0.port.-1.s.73.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.73.name=DataPort[73] unit.2.0.port.-1.s.73.orderindex=-1 unit.2.0.port.-1.s.73.visible=1 -unit.2.0.port.-1.s.74.alias= +unit.2.0.port.-1.s.74.alias=IRDYn unit.2.0.port.-1.s.74.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.74.name=DataPort[74] unit.2.0.port.-1.s.74.orderindex=-1 unit.2.0.port.-1.s.74.visible=1 -unit.2.0.port.-1.s.75.alias= +unit.2.0.port.-1.s.75.alias=STOPn unit.2.0.port.-1.s.75.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.75.name=DataPort[75] unit.2.0.port.-1.s.75.orderindex=-1 unit.2.0.port.-1.s.75.visible=1 -unit.2.0.port.-1.s.76.alias= +unit.2.0.port.-1.s.76.alias=SERRn unit.2.0.port.-1.s.76.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.76.name=DataPort[76] unit.2.0.port.-1.s.76.orderindex=-1 unit.2.0.port.-1.s.76.visible=1 -unit.2.0.port.-1.s.77.alias= +unit.2.0.port.-1.s.77.alias=PERRn unit.2.0.port.-1.s.77.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.77.name=DataPort[77] unit.2.0.port.-1.s.77.orderindex=-1 unit.2.0.port.-1.s.77.visible=1 -unit.2.0.port.-1.s.78.alias= +unit.2.0.port.-1.s.78.alias=REQn unit.2.0.port.-1.s.78.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.78.name=DataPort[78] unit.2.0.port.-1.s.78.orderindex=-1 unit.2.0.port.-1.s.78.visible=1 -unit.2.0.port.-1.s.79.alias= +unit.2.0.port.-1.s.79.alias=GNTn unit.2.0.port.-1.s.79.color=java.awt.Color[r\=0,g\=0,b\=124] unit.2.0.port.-1.s.79.name=DataPort[79] unit.2.0.port.-1.s.79.orderindex=-1 @@ -825,7 +825,7 @@ unit.2.0.triggerWindowCount=1 unit.2.0.triggerWindowDepth=4096 unit.2.0.triggerWindowTS=0 unit.2.0.username=MyILA0 -unit.2.0.waveform.count=25 +unit.2.0.waveform.count=33 unit.2.0.waveform.posn.0.channel=2147483646 unit.2.0.waveform.posn.0.name=PCI unit.2.0.waveform.posn.0.radix=1 @@ -834,129 +834,138 @@ unit.2.0.waveform.posn.1.channel=2147483646 unit.2.0.waveform.posn.1.name=CBE_ADDR unit.2.0.waveform.posn.1.radix=1 unit.2.0.waveform.posn.1.type=bus -unit.2.0.waveform.posn.10.channel=5 -unit.2.0.waveform.posn.10.name=R_RESET +unit.2.0.waveform.posn.10.channel=77 +unit.2.0.waveform.posn.10.name=PERRn unit.2.0.waveform.posn.10.radix=1 unit.2.0.waveform.posn.10.type=signal -unit.2.0.waveform.posn.11.channel=6 -unit.2.0.waveform.posn.11.name=R_RETRANS +unit.2.0.waveform.posn.11.channel=78 +unit.2.0.waveform.posn.11.name=REQn unit.2.0.waveform.posn.11.radix=1 unit.2.0.waveform.posn.11.type=signal -unit.2.0.waveform.posn.12.channel=7 -unit.2.0.waveform.posn.12.name=R_WRITE +unit.2.0.waveform.posn.12.channel=79 +unit.2.0.waveform.posn.12.name=GNTn unit.2.0.waveform.posn.12.radix=1 unit.2.0.waveform.posn.12.type=signal unit.2.0.waveform.posn.13.channel=2147483646 -unit.2.0.waveform.posn.13.name=S_FIFO +unit.2.0.waveform.posn.13.name=R_FIFO unit.2.0.waveform.posn.13.radix=1 unit.2.0.waveform.posn.13.type=bus -unit.2.0.waveform.posn.14.channel=8 -unit.2.0.waveform.posn.14.name=S_Empty +unit.2.0.waveform.posn.14.channel=1 +unit.2.0.waveform.posn.14.name=R_Empty unit.2.0.waveform.posn.14.radix=1 unit.2.0.waveform.posn.14.type=signal -unit.2.0.waveform.posn.15.channel=9 -unit.2.0.waveform.posn.15.name=S_Half +unit.2.0.waveform.posn.15.channel=2 +unit.2.0.waveform.posn.15.name=R_Half +unit.2.0.waveform.posn.15.radix=1 unit.2.0.waveform.posn.15.type=signal -unit.2.0.waveform.posn.16.channel=10 -unit.2.0.waveform.posn.16.name=S_Full +unit.2.0.waveform.posn.16.channel=3 +unit.2.0.waveform.posn.16.name=R_Full +unit.2.0.waveform.posn.16.radix=1 unit.2.0.waveform.posn.16.type=signal -unit.2.0.waveform.posn.17.channel=11 -unit.2.0.waveform.posn.17.name=S_READ +unit.2.0.waveform.posn.17.channel=4 +unit.2.0.waveform.posn.17.name=R_READ +unit.2.0.waveform.posn.17.radix=1 unit.2.0.waveform.posn.17.type=signal -unit.2.0.waveform.posn.18.channel=12 -unit.2.0.waveform.posn.18.name=S_RESET +unit.2.0.waveform.posn.18.channel=5 +unit.2.0.waveform.posn.18.name=R_RESET +unit.2.0.waveform.posn.18.radix=1 unit.2.0.waveform.posn.18.type=signal -unit.2.0.waveform.posn.19.channel=13 -unit.2.0.waveform.posn.19.name=S_RETRANS +unit.2.0.waveform.posn.19.channel=6 +unit.2.0.waveform.posn.19.name=R_RETRANS +unit.2.0.waveform.posn.19.radix=1 unit.2.0.waveform.posn.19.type=signal unit.2.0.waveform.posn.2.channel=2147483646 unit.2.0.waveform.posn.2.name=CBEn unit.2.0.waveform.posn.2.radix=6 unit.2.0.waveform.posn.2.type=bus -unit.2.0.waveform.posn.20.channel=14 -unit.2.0.waveform.posn.20.name=S_WRITE +unit.2.0.waveform.posn.20.channel=7 +unit.2.0.waveform.posn.20.name=R_WRITE +unit.2.0.waveform.posn.20.radix=1 unit.2.0.waveform.posn.20.type=signal -unit.2.0.waveform.posn.21.channel=15 -unit.2.0.waveform.posn.21.name=SER_IN +unit.2.0.waveform.posn.21.channel=2147483646 +unit.2.0.waveform.posn.21.name=S_FIFO unit.2.0.waveform.posn.21.radix=1 -unit.2.0.waveform.posn.21.type=signal -unit.2.0.waveform.posn.22.channel=16 -unit.2.0.waveform.posn.22.name=SPC_RDY_IN +unit.2.0.waveform.posn.21.type=bus +unit.2.0.waveform.posn.22.channel=8 +unit.2.0.waveform.posn.22.name=S_Empty unit.2.0.waveform.posn.22.radix=1 unit.2.0.waveform.posn.22.type=signal -unit.2.0.waveform.posn.23.channel=17 -unit.2.0.waveform.posn.23.name=SER_OUT +unit.2.0.waveform.posn.23.channel=9 +unit.2.0.waveform.posn.23.name=S_Half unit.2.0.waveform.posn.23.radix=1 unit.2.0.waveform.posn.23.type=signal -unit.2.0.waveform.posn.24.channel=18 -unit.2.0.waveform.posn.24.name=SPC_RDY_OUT +unit.2.0.waveform.posn.24.channel=10 +unit.2.0.waveform.posn.24.name=S_Full unit.2.0.waveform.posn.24.radix=1 unit.2.0.waveform.posn.24.type=signal -unit.2.0.waveform.posn.25.channel=18 -unit.2.0.waveform.posn.25.name=SPC_RDY_OUT +unit.2.0.waveform.posn.25.channel=11 +unit.2.0.waveform.posn.25.name=S_READ unit.2.0.waveform.posn.25.radix=1 unit.2.0.waveform.posn.25.type=signal -unit.2.0.waveform.posn.26.channel=72 -unit.2.0.waveform.posn.26.name=DEVSELn +unit.2.0.waveform.posn.26.channel=12 +unit.2.0.waveform.posn.26.name=S_RESET unit.2.0.waveform.posn.26.type=signal -unit.2.0.waveform.posn.27.channel=35 -unit.2.0.waveform.posn.27.name=DataPort[35] +unit.2.0.waveform.posn.27.channel=13 +unit.2.0.waveform.posn.27.name=S_RETRANS unit.2.0.waveform.posn.27.type=signal -unit.2.0.waveform.posn.28.channel=35 -unit.2.0.waveform.posn.28.name=DataPort[35] +unit.2.0.waveform.posn.28.channel=14 +unit.2.0.waveform.posn.28.name=S_WRITE unit.2.0.waveform.posn.28.type=signal -unit.2.0.waveform.posn.29.channel=35 -unit.2.0.waveform.posn.29.name=DataPort[35] +unit.2.0.waveform.posn.29.channel=15 +unit.2.0.waveform.posn.29.name=SER_IN unit.2.0.waveform.posn.29.type=signal unit.2.0.waveform.posn.3.channel=71 unit.2.0.waveform.posn.3.name=FRAMEn unit.2.0.waveform.posn.3.radix=6 unit.2.0.waveform.posn.3.type=signal -unit.2.0.waveform.posn.30.channel=35 -unit.2.0.waveform.posn.30.name=DataPort[35] +unit.2.0.waveform.posn.30.channel=16 +unit.2.0.waveform.posn.30.name=SPC_RDY_IN unit.2.0.waveform.posn.30.type=signal -unit.2.0.waveform.posn.31.channel=35 -unit.2.0.waveform.posn.31.name=DataPort[35] +unit.2.0.waveform.posn.31.channel=17 +unit.2.0.waveform.posn.31.name=SER_OUT unit.2.0.waveform.posn.31.type=signal -unit.2.0.waveform.posn.32.channel=35 -unit.2.0.waveform.posn.32.name=DataPort[35] +unit.2.0.waveform.posn.32.channel=18 +unit.2.0.waveform.posn.32.name=SPC_RDY_OUT unit.2.0.waveform.posn.32.type=signal -unit.2.0.waveform.posn.33.channel=35 -unit.2.0.waveform.posn.33.name=DataPort[35] +unit.2.0.waveform.posn.33.channel=79 +unit.2.0.waveform.posn.33.name=GNTn unit.2.0.waveform.posn.33.type=signal -unit.2.0.waveform.posn.34.channel=35 -unit.2.0.waveform.posn.34.name=DataPort[35] +unit.2.0.waveform.posn.34.channel=18 +unit.2.0.waveform.posn.34.name=SPC_RDY_OUT unit.2.0.waveform.posn.34.type=signal -unit.2.0.waveform.posn.35.channel=35 -unit.2.0.waveform.posn.35.name=DataPort[35] +unit.2.0.waveform.posn.35.channel=18 +unit.2.0.waveform.posn.35.name=SPC_RDY_OUT unit.2.0.waveform.posn.35.type=signal -unit.2.0.waveform.posn.36.channel=35 -unit.2.0.waveform.posn.36.name=DataPort[35] +unit.2.0.waveform.posn.36.channel=18 +unit.2.0.waveform.posn.36.name=SPC_RDY_OUT unit.2.0.waveform.posn.36.type=signal -unit.2.0.waveform.posn.37.channel=35 -unit.2.0.waveform.posn.37.name=DataPort[35] +unit.2.0.waveform.posn.37.channel=77 +unit.2.0.waveform.posn.37.name=PERRn unit.2.0.waveform.posn.37.type=signal +unit.2.0.waveform.posn.38.channel=77 +unit.2.0.waveform.posn.38.name=PERRn +unit.2.0.waveform.posn.38.type=signal unit.2.0.waveform.posn.4.channel=0 unit.2.0.waveform.posn.4.name=INTAn unit.2.0.waveform.posn.4.radix=1 unit.2.0.waveform.posn.4.type=signal -unit.2.0.waveform.posn.5.channel=2147483646 -unit.2.0.waveform.posn.5.name=R_FIFO +unit.2.0.waveform.posn.5.channel=72 +unit.2.0.waveform.posn.5.name=IDSEL unit.2.0.waveform.posn.5.radix=1 -unit.2.0.waveform.posn.5.type=bus -unit.2.0.waveform.posn.6.channel=1 -unit.2.0.waveform.posn.6.name=R_Empty +unit.2.0.waveform.posn.5.type=signal +unit.2.0.waveform.posn.6.channel=73 +unit.2.0.waveform.posn.6.name=TRDYn unit.2.0.waveform.posn.6.radix=1 unit.2.0.waveform.posn.6.type=signal -unit.2.0.waveform.posn.7.channel=2 -unit.2.0.waveform.posn.7.name=R_Half +unit.2.0.waveform.posn.7.channel=74 +unit.2.0.waveform.posn.7.name=IRDYn unit.2.0.waveform.posn.7.radix=1 unit.2.0.waveform.posn.7.type=signal -unit.2.0.waveform.posn.8.channel=3 -unit.2.0.waveform.posn.8.name=R_Full +unit.2.0.waveform.posn.8.channel=75 +unit.2.0.waveform.posn.8.name=STOPn unit.2.0.waveform.posn.8.radix=1 unit.2.0.waveform.posn.8.type=signal -unit.2.0.waveform.posn.9.channel=4 -unit.2.0.waveform.posn.9.name=R_READ +unit.2.0.waveform.posn.9.channel=76 +unit.2.0.waveform.posn.9.name=SERRn unit.2.0.waveform.posn.9.radix=1 unit.2.0.waveform.posn.9.type=signal diff --git a/dhwk/dhwk.ucf b/dhwk/dhwk.ucf index f147e9e..366fcf2 100644 --- a/dhwk/dhwk.ucf +++ b/dhwk/dhwk.ucf @@ -1,13 +1,7 @@ -#NET "KONST_1" LOC="" | IOSTANDARD = PCI33_3 ; #NET "SERIAL_IN" LOC="" | IOSTANDARD = PCI33_3 ; #NET "SPC_RDY_IN" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "TAST_RESn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "TAST_SETn" LOC="" | IOSTANDARD = PCI33_3 ; #NET "SERIAL_OUT" LOC="" | IOSTANDARD = PCI33_3 ; #NET "SPC_RDY_OUT" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "TB_IDSEL" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "TB_nDEVSEL" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "TB_nINTA" LOC="" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<0>" LOC = "A5" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<10>" LOC = "E9" | IOSTANDARD = PCI33_3 ; @@ -57,9 +51,15 @@ NET "PCI_SERRn" LOC = "B12" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_STOPn" LOC = "A12" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_TRDYn" LOC = "B13" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_PAR" LOC = "A9" | IOSTANDARD = PCI33_3 | SLEW = FAST ; +NET "PCI_REQn" LOC = "C18" | IOSTANDARD = PCI33_3 | SLEW = FAST ; +NET "PCI_GNTn" LOC = "D18" | IOSTANDARD = PCI33_3 ; NET "TAST_RESn" LOC = "AA3" | IOSTANDARD = LVTTL | PULLUP ; NET "TAST_SETn" LOC = "Y4" | IOSTANDARD = LVTTL | PULLUP ; NET "LED_2" LOC = "AB5" | IOSTANDARD = LVTTL | DRIVE = 24 ; NET "LED_3" LOC = "AA5" | IOSTANDARD = LVTTL | DRIVE = 24 ; NET "LED_4" LOC = "AA4" | IOSTANDARD = LVTTL | DRIVE = 24 ; NET "LED_5" LOC = "AB4" | IOSTANDARD = LVTTL | DRIVE = 24 ; +NET "KONST_1" LOC = "Y1" | IOSTANDARD = LVCMOS33 ; +NET "TB_IDSEL" LOC = "M6" | IOSTANDARD = LVCMOS33 ; +NET "TB_nDEVSEL" LOC = "M5" | IOSTANDARD = LVCMOS33 ; +NET "TB_nINTA" LOC = "U2" | IOSTANDARD = LVCMOS33 ; diff --git a/dhwk/source/top.vhd b/dhwk/source/top.vhd index bf927d8..a148b38 100644 --- a/dhwk/source/top.vhd +++ b/dhwk/source/top.vhd @@ -32,6 +32,8 @@ entity dhwk is PCI_SERRn : Out std_logic; PCI_STOPn : Out std_logic; PCI_TRDYn : Out std_logic; + PCI_REQn : Out std_logic; + PCI_GNTn : In std_logic; -- SERIAL_OUT : Out std_logic; -- SPC_RDY_OUT : Out std_logic; TB_IDSEL : Out std_logic; @@ -90,7 +92,12 @@ architecture SCHEMATIC of dhwk is signal SPC_RDY_IN : std_logic; signal SERIAL_OUT : std_logic; signal SPC_RDY_OUT : std_logic; - signal watch : std_logic; + signal watch_PCI_INTAn : std_logic; + signal watch_PCI_TRDYn : std_logic; + signal watch_PCI_STOPn : std_logic; + signal watch_PCI_SERRn : std_logic; + signal watch_PCI_PERRn : std_logic; + signal watch_PCI_REQn : std_logic; signal control0 : std_logic_vector(35 downto 0); signal data : std_logic_vector(95 downto 0); signal trig0 : std_logic_vector(31 downto 0); @@ -243,19 +250,21 @@ end component; begin + watch_PCI_REQn <= '1'; SERIAL_IN <= SERIAL_OUT; SPC_RDY_IN <= SPC_RDY_OUT; - LED_2 <= TAST_RESn; - LED_3 <= TAST_SETn; - LED_4 <= '0'; - LED_5 <= not watch; - PCI_INTAn <= watch; + LED_2 <= not PCI_RSTn; + LED_3 <= PCI_IDSEL; + LED_4 <= not PCI_FRAMEn; + LED_5 <= not watch_PCI_INTAn; + PCI_INTAn <= watch_PCI_INTAn; trig0(31 downto 0) <= ( - 0 => watch, + 0 => watch_PCI_INTAn, 1 => R_FIFO_READn, 2 => R_FIFO_WRITEn, 3 => S_FIFO_READn, 4 => S_FIFO_WRITEn, + 5 => PCI_RSTn, 16 => PCI_AD(0), 17 => PCI_AD(1), 18 => PCI_AD(2), @@ -271,7 +280,7 @@ begin 31 => PCI_CBEn(3), others => '0'); - data(0) <= watch; + data(0) <= watch_PCI_INTAn; data(1) <= R_EFn; data(2) <= R_HFn; data(3) <= R_FFn; @@ -295,6 +304,19 @@ begin data(66 downto 35) <= PCI_AD(31 downto 0); data(70 downto 67) <= PCI_CBEn(3 downto 0); data(71) <= PCI_FRAMEn; + data(72) <= PCI_IDSEL; + PCI_TRDYn <= watch_PCI_TRDYn; + data(73) <= watch_PCI_TRDYn; + data(74) <= PCI_IRDYn; + PCI_STOPn <= watch_PCI_STOPn; + data(75) <= watch_PCI_STOPn; + PCI_SERRn <= watch_PCI_SERRn; + data(76) <= watch_PCI_SERRn; + PCI_PERRn <= watch_PCI_PERRn; + data(77) <= watch_PCI_PERRn; + PCI_REQn <= watch_PCI_REQn; + data(78) <= watch_PCI_REQn; + data(79) <= PCI_GNTn; I19 : MESS_1_TB Port Map ( DEVSELn=>DEVSELn, INTAn=>INTAn, KONST_1=>KONST_1, @@ -315,7 +337,7 @@ begin READ_XX5_4=>READ_XX5_4, RESET=>REG_OUT_XX7(0), TAST_RESn=>TAST_RESn, TAST_SETn=>TAST_SETn, TRDYn=>TRDYn, INT_REG(7 downto 0)=>INT_REG(7 downto 0), - INTAn=>INTAn, PCI_INTAn=>watch); + INTAn=>INTAn, PCI_INTAn=>watch_PCI_INTAn); I14 : FIFO_CONTROL Port Map ( FIFO_RDn=>FIFO_RDn, FLAG_IN_0=>R_ERROR, FLAG_IN_4=>S_ERROR, HOLD=>READ_SEL(0), KONST_1=>KONST_1, @@ -351,9 +373,9 @@ begin PCI_PAR=>PCI_PAR, AD_REG(31 downto 0)=>AD_REG(31 downto 0), DEVSELn=>DEVSELn, FIFO_RDn=>FIFO_RDn, - PCI_DEVSELn=>PCI_DEVSELn, PCI_PERRn=>PCI_PERRn, - PCI_SERRn=>PCI_SERRn, PCI_STOPn=>PCI_STOPn, - PCI_TRDYn=>PCI_TRDYn, + PCI_DEVSELn=>PCI_DEVSELn, PCI_PERRn=>watch_PCI_PERRn, + PCI_SERRn=>watch_PCI_SERRn, PCI_STOPn=>watch_PCI_STOPn, + PCI_TRDYn=>watch_PCI_TRDYn, READ_SEL(1 downto 0)=>READ_SEL(1 downto 0), READ_XX1_0=>READ_XX1_0, READ_XX3_2=>READ_XX3_2, READ_XX5_4=>READ_XX5_4, READ_XX7_6=>READ_XX7_6, diff --git a/heartbeat/raggedstone.ucf b/heartbeat/raggedstone.ucf index 1924315..2dd2b3f 100644 --- a/heartbeat/raggedstone.ucf +++ b/heartbeat/raggedstone.ucf @@ -48,7 +48,7 @@ NET "PCI_nSERR" LOC = "B12" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_nSTOP" LOC = "A12" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_nTRDY" LOC = "B13" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "PCI_PAR" LOC = "A9" | IOSTANDARD = PCI33_3 | SLEW = FAST ; -NET "PCI_nREQ" LOC = "C18" | IOSTANDARD = PCI33_3 ; +NET "PCI_nREQ" LOC = "C18" | IOSTANDARD = PCI33_3 | SLEW = FAST ; NET "LED5" LOC = "AB4" | IOSTANDARD = LVCMOS33 ; NET "LED4" LOC = "AA4" | IOSTANDARD = LVCMOS33 ; NET "IDE1" LOC = "Y1" | IOSTANDARD = LVCMOS33 ; -- 2.39.5