From 54fc45085ee9d68eb1f30e286e604f572b77ffee Mon Sep 17 00:00:00 2001
From: michael <michael>
Date: Sat, 17 Mar 2007 19:10:54 +0000
Subject: [PATCH] add other tested software change some parallel port variables

---
 README       |  2 ++
 usb-driver.c | 12 +++++++++---
 usb-driver.h |  3 +++
 3 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/README b/README
index ae60eeb..87fe8be 100644
--- a/README
+++ b/README
@@ -11,8 +11,10 @@ the following software:
 
  * ISE Webpack 9.1SP2
  * ISE Webpack 9.1SP1
+ * ISE Webpack 8.2SP3
  * ISE Webpack 8.1SP3
  * ChipScope 9.1.02i
+ * EDK 8.2.02i
 
 Build the library by calling `make'.
 
diff --git a/usb-driver.c b/usb-driver.c
index 33268f0..209e155 100644
--- a/usb-driver.c
+++ b/usb-driver.c
@@ -307,8 +307,14 @@ int pp_transfer(WD_TRANSFER *tr, int fd, unsigned int request, unsigned char *wd
 				ret = -1;
 				break;
 		}
+	} else if ((port == ecpbase + PP_ECP_CFGA) && ecpbase) {
+		DPRINTF("ECP_CFGA port\n");
+	} else if ((port == ecpbase + PP_ECP_CFGB) && ecpbase) {
+		DPRINTF("ECP_CFGB port\n");
+	} else if ((port == ecpbase + PP_ECP_ECR) && ecpbase) {
+		DPRINTF("ECP_ECR port\n");
 	} else {
-		DPRINTF("access to unsupported address range (probably ECP)!\n");
+		DPRINTF("access to unsupported address range!\n");
 		ret = 0;
 	}
 
@@ -390,9 +396,9 @@ int do_wdioctl(int fd, unsigned int request, unsigned char *wdioctl) {
 					if (ioctl(parportfd, PPNEGOT, &pmode) == -1)
 						return ret;
 					
-					if (cr->Card.dwItems > 1 && cr->Card.Item[1].I.IO.dwBytes) {
+					if (cr->Card.dwItems > 1 && cr->Card.Item[1].I.IO.dwAddr) {
 						DPRINTF("ECP mode requested\n");
-						ecpbase = cr->Card.Item[1].I.IO.dwBytes;
+						ecpbase = (unsigned long)cr->Card.Item[1].I.IO.dwAddr;
 						/* TODO: Implement ECP mode */
 #if 0
 						pmode = IEEE1284_MODE_ECP;
diff --git a/usb-driver.h b/usb-driver.h
index 187be1b..3487b7b 100644
--- a/usb-driver.h
+++ b/usb-driver.h
@@ -25,6 +25,9 @@
 #define PP_DATA			0
 #define PP_STATUS		1
 #define PP_CONTROL		2
+#define PP_ECP_CFGA		0
+#define PP_ECP_CFGB		1
+#define PP_ECP_ECR		2
 #define PP_READ			10
 #define PP_WRITE		13
 
-- 
2.39.5