fix linebreaks

[linexec-j720] / asm / asm-wince.asm

diff --git a/asm/asm-wince.asm b/asm/asm-wince.asm
index a34be6e70ea7b8a69072d2546b219ac60c696dea..0cf3fad66210abeee7ae1b34987aa4cae1392960 100644 (file)
--- a/asm/asm-wince.asm
+++ b/asm/asm-wince.asm
@@ -1,99 +1,99 @@
-       TTL     C:\pocket\test\asm.cpp\r\r
-\r\r
-       AREA    |.drectve|, DRECTVE\r\r
-       DCB     "-defaultlib:coredll.lib "\r\r
-       DCB     "-defaultlib:corelibc.lib "\r\r
-\r\r
-       EXPORT  |?do_it@@YAXXZ|                         ; do_it\r\r
-       AREA    |.pdata|, PDATA\r\r
-|$T222|        DCD     |?do_it@@YAXXZ|\r\r
-       DCD     0x40000100\r\r
-       AREA    |.text|, CODE\r\r
-|?do_it@@YAXXZ| PROC                                   ; do_it\r\r
-|$M220|\r\r
-       \r\r
-       mcr     p15, 0, r0, c7, c5, 0           ;/* invalidate i cache & BTB */\r\r
-                                                                               ;       CPWAIT  r0\r\r
-       mrc     p15, 0, r0, c2, c0, 0\r\r
-       mov     r0, r0\r\r
-       sub     pc, pc, #4              \r\r
-                                                                               ;       ldr     r9, =0xa1300100\r\r
-\r\r
-               mov             r9, r1                                  ;       add             r9, r1, #0x100  \r\r
-               ldr             r5, =0xa0000100                 ;       ldr             r5, =0xa0000100\r\r
-               ldr             r7, =0xa0100000\r\r
-label   ldr     r8, [r9]\r\r
-        str     r8, [r5]\r\r
-               add     r9, r9, #4 \r\r
-               add     r5, r5, #4 \r\r
-               cmp             r5, r7\r\r
-               blt             label\r\r
-\r\r
-crash  b crash\r\r
-\r\r
-       MOV             r4, #0xA0000000\r\r
-       add             r2,r4,#0x8000\r\r
-       \r\r
-       mov     r11,r2\r\r
-       ldr             r10,=337\r\r
-\r\r
-;      mcr     p15, 0, r0, c7, c10, 4 ;/* drain the write buffer*/\r\r
-\r\r
-;      CPWAIT  r0\r\r
-;      mrc     p15, 0, r0, c2, c0, 0\r\r
-;      mov     r0, r0\r\r
-;      sub     pc, pc, #4              \r\r
-\r\r
-\r\r
-       mcr     p15, 0, r0, c8, c7, 0x00        ;/* invalidate I+D TLB */\r\r
-;      CPWAIT  r0\r\r
-       mrc     p15, 0, r0, c2, c0, 0\r\r
-       mov     r0, r0\r\r
-       sub     pc, pc, #4              \r\r
-\r\r
-;      //; they skipped this, unnecessary? seems like we need to do this\r\r
-       mcr     p15, 0, r0, c7, c5, 0           ;/* invalidate i cache & BTB */\r\r
-       \r\r
-; S bit set, p and d bit set (no 26 bit mode)\r\r
-;      mov     r3, #0x120      ; xscale says p needs to be 0 ???\r\r
-;      mcr     p15, 0, r3, c1, c0, 0   ;/* disable the MMU */\r\r
-\r\r
-;      CPWAIT  r0\r\r
-;      mrc     p15, 0, r0, c2, c0, 0\r\r
-;      mov     r0, r0\r\r
-;      sub     pc, pc, #4              \r\r
-\r\r
-\r\r
-;        /*; make sure the pipeline is emptied*/\r\r
-        mov     r0,#0\r\r
-        mov     r0,r0\r\r
-        mov     r0,r0\r\r
-        mov     r0,r0\r\r
-\r\r
-;      /* zero PID in Process ID Virtual Address Map register. */\r\r
-;      mov     r0, #0\r\r
-       mcr     p15, 0, r0, c13, c0, 0\r\r
-\r\r
-\r\r
-;      CPWAIT  r0\r\r
-       mrc     p15, 0, r0, c2, c0, 0\r\r
-       mov     r0, r0\r\r
-       sub     pc, pc, #4              \r\r
-\r\r
-;      ldr     r5, =0xA00512F5\r\r
-;      ldr     r8, =0xefef0000\r\r
-;      str     r8, [r5] \r\r
-\r\r
-\r\r
-       mov     r0, #0\r\r
-    mov     r1, r10\r\r
-       ldr     r2, [r2, #0]\r\r
-       mov     r2, #0\r\r
-       mov     pc, r11 \r\r
-\r\r
-\r\r
-|$M221|\r\r
-\r\r
-       ENDP  ; |?do_it@@YAXXZ|, do_it\r\r
-\r\r
-       END\r\r
+       TTL     C:\pocket\test\asm.cpp\r
+\r
+       AREA    |.drectve|, DRECTVE\r
+       DCB     "-defaultlib:coredll.lib "\r
+       DCB     "-defaultlib:corelibc.lib "\r
+\r
+       EXPORT  |?do_it@@YAXXZ|                         ; do_it\r
+       AREA    |.pdata|, PDATA\r
+|$T222|        DCD     |?do_it@@YAXXZ|\r
+       DCD     0x40000100\r
+       AREA    |.text|, CODE\r
+|?do_it@@YAXXZ| PROC                                   ; do_it\r
+|$M220|\r
+       \r
+       mcr     p15, 0, r0, c7, c5, 0           ;/* invalidate i cache & BTB */\r
+                                                                               ;       CPWAIT  r0\r
+       mrc     p15, 0, r0, c2, c0, 0\r
+       mov     r0, r0\r
+       sub     pc, pc, #4              \r
+                                                                               ;       ldr     r9, =0xa1300100\r
+\r
+               mov             r9, r1                                  ;       add             r9, r1, #0x100  \r
+               ldr             r5, =0xa0000100                 ;       ldr             r5, =0xa0000100\r
+               ldr             r7, =0xa0100000\r
+label   ldr     r8, [r9]\r
+        str     r8, [r5]\r
+               add     r9, r9, #4 \r
+               add     r5, r5, #4 \r
+               cmp             r5, r7\r
+               blt             label\r
+\r
+crash  b crash\r
+\r
+       MOV             r4, #0xA0000000\r
+       add             r2,r4,#0x8000\r
+       \r
+       mov     r11,r2\r
+       ldr             r10,=337\r
+\r
+;      mcr     p15, 0, r0, c7, c10, 4 ;/* drain the write buffer*/\r
+\r
+;      CPWAIT  r0\r
+;      mrc     p15, 0, r0, c2, c0, 0\r
+;      mov     r0, r0\r
+;      sub     pc, pc, #4              \r
+\r
+\r
+       mcr     p15, 0, r0, c8, c7, 0x00        ;/* invalidate I+D TLB */\r
+;      CPWAIT  r0\r
+       mrc     p15, 0, r0, c2, c0, 0\r
+       mov     r0, r0\r
+       sub     pc, pc, #4              \r
+\r
+;      //; they skipped this, unnecessary? seems like we need to do this\r
+       mcr     p15, 0, r0, c7, c5, 0           ;/* invalidate i cache & BTB */\r
+       \r
+; S bit set, p and d bit set (no 26 bit mode)\r
+;      mov     r3, #0x120      ; xscale says p needs to be 0 ???\r
+;      mcr     p15, 0, r3, c1, c0, 0   ;/* disable the MMU */\r
+\r
+;      CPWAIT  r0\r
+;      mrc     p15, 0, r0, c2, c0, 0\r
+;      mov     r0, r0\r
+;      sub     pc, pc, #4              \r
+\r
+\r
+;        /*; make sure the pipeline is emptied*/\r
+        mov     r0,#0\r
+        mov     r0,r0\r
+        mov     r0,r0\r
+        mov     r0,r0\r
+\r
+;      /* zero PID in Process ID Virtual Address Map register. */\r
+;      mov     r0, #0\r
+       mcr     p15, 0, r0, c13, c0, 0\r
+\r
+\r
+;      CPWAIT  r0\r
+       mrc     p15, 0, r0, c2, c0, 0\r
+       mov     r0, r0\r
+       sub     pc, pc, #4              \r
+\r
+;      ldr     r5, =0xA00512F5\r
+;      ldr     r8, =0xefef0000\r
+;      str     r8, [r5] \r
+\r
+\r
+       mov     r0, #0\r
+    mov     r1, r10\r
+       ldr     r2, [r2, #0]\r
+       mov     r2, #0\r
+       mov     pc, r11 \r
+\r
+\r
+|$M221|\r
+\r
+       ENDP  ; |?do_it@@YAXXZ|, do_it\r
+\r
+       END\r