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   1 /*
   2  * OMAP2/3 Power Management Routines
   3  *
   4  * Copyright (C) 2008 Nokia Corporation
   5  * Jouni Hogander
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
  12 #define __ARCH_ARM_MACH_OMAP2_PM_H
  13
  14 #include <plat/powerdomain.h>
  15
  16 extern u32 enable_off_mode;
  17 extern u32 sleep_while_idle;
  18 extern u32 voltage_off_while_idle;
  19 extern unsigned int wakeup_timer_nseconds;
  20 extern u32 enable_abb_mode;
  21
  22 extern void *omap3_secure_ram_storage;
  23 extern void omap3_pm_off_mode_enable(int);
  24 extern void omap_sram_idle(void);
  25 extern int omap3_can_sleep(void);
  26 extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
  27 extern int omap3_idle_init(void);
  28 extern void vfp_pm_save_context(void);
  29
  30 extern void lock_scratchpad_sem(void);
  31 extern void unlock_scratchpad_sem(void);
  32
  33 struct prm_setup_vc {
  34         u16 clksetup;
  35         u16 voltsetup_time1;
  36         u16 voltsetup_time2;
  37         u16 voltoffset;
  38         u16 voltsetup2;
  39
  40 /* PRM_VC_CMD_VAL_0 specific bits */
  41         u16 vdd0_on;
  42         u16 vdd0_onlp;
  43         u16 vdd0_ret;
  44         u16 vdd0_off;
  45 /* PRM_VC_CMD_VAL_1 specific bits */
  46         u16 vdd1_on;
  47         u16 vdd1_onlp;
  48         u16 vdd1_ret;
  49         u16 vdd1_off;
  50
  51 /* Values for VDD registers */
  52         u32 i2c_slave_ra;
  53         u32 vdd_vol_ra;
  54         u32 vdd_cmd_ra;
  55         u32 vdd_ch_conf;
  56         u32 vdd_i2c_cfg;
  57 };
  58
  59 struct cpuidle_params {
  60         u8  valid;
  61         u32 sleep_latency;
  62         u32 wake_latency;
  63         u32 threshold;
  64 };
  65
  66 extern void omap3_pm_init_vc(struct prm_setup_vc *setup_vc);
  67 #ifdef CONFIG_CPU_IDLE
  68 extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
  69 extern int omap3_bypass_cmd(u8 slave_addr, u8 reg_addr, u8 cmd);
  70 #else
  71 static inline void omap3_pm_init_cpuidle(
  72                         struct cpuidle_params *cpuidle_board_params)
  73 {
  74 }
  75 #endif
  76
  77 extern int resource_set_opp_level(int res, u32 target_level, int flags);
  78 extern int resource_access_opp_lock(int res, int delta);
  79 #define resource_lock_opp(res) resource_access_opp_lock(res, 1)
  80 #define resource_unlock_opp(res) resource_access_opp_lock(res, -1)
  81 #define resource_get_opp_lock(res) resource_access_opp_lock(res, 0)
  82
  83 #define OPP_IGNORE_LOCK 0x1
  84 #define OPP_IGNORE_NOTIFIER 0x2
  85
  86 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
  87 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
  88
  89 extern u32 wakeup_timer_seconds;
  90 extern struct omap_dm_timer *gptimer_wakeup;
  91
  92 #ifdef CONFIG_PM_DEBUG
  93 extern void omap2_pm_dump(int mode, int resume, unsigned int us);
  94 extern int omap2_pm_debug;
  95 #else
  96 #define omap2_pm_dump(mode, resume, us)         do {} while (0);
  97 #define omap2_pm_debug                          0
  98 #endif
  99
 100 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
 101 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
 102 extern int pm_dbg_regset_save(int reg_set);
 103 extern int pm_dbg_regset_init(int reg_set);
 104 extern void pm_dbg_show_core_regs(void);
 105 extern void pm_dbg_show_wakeup_source(void);
 106 #else
 107 #define pm_dbg_update_time(pwrdm, prev) do {} while (0);
 108 #define pm_dbg_regset_save(reg_set) do {} while (0);
 109 #define pm_dbg_regset_init(reg_set) do {} while (0);
 110 #define pm_dbg_show_core_regs() do {} while (0);
 111 #define pm_dbg_show_wakeup_source() do {} while (0);
 112 #endif /* CONFIG_PM_DEBUG */
 113
 114 extern void omap24xx_idle_loop_suspend(void);
 115
 116 extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
 117                                         void __iomem *sdrc_power);
 118 extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
 119 extern void save_secure_ram_context(u32 *addr);
 120 extern void omap3_save_scratchpad_contents(void);
 121
 122 extern unsigned int omap24xx_idle_loop_suspend_sz;
 123 extern unsigned int omap34xx_suspend_sz;
 124 extern unsigned int save_secure_ram_context_sz;
 125 extern unsigned int omap24xx_cpu_suspend_sz;
 126 extern unsigned int omap34xx_cpu_suspend_sz;
 127
 128 #endif