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fixing iso15693
[proxmark3-svn] / fpga / hi_sniffer.v
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0472d76d 1module hi_sniffer(
5ea2a248 2 ck_1356meg,
0472d76d 3 pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4,
4 adc_d, adc_clk,
5ea2a248 5 ssp_frame, ssp_din, ssp_clk
0472d76d 6);
5ea2a248 7 input ck_1356meg;
0472d76d 8 output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;
9 input [7:0] adc_d;
10 output adc_clk;
0472d76d 11 output ssp_frame, ssp_din, ssp_clk;
0472d76d 12
13// We are only snooping, all off.
82d58934 14assign pwr_hi = 1'b0;
15assign pwr_lo = 1'b0;
0472d76d 16assign pwr_oe1 = 1'b0;
17assign pwr_oe2 = 1'b0;
18assign pwr_oe3 = 1'b0;
19assign pwr_oe4 = 1'b0;
20
0472d76d 21reg ssp_frame;
0472d76d 22reg [7:0] adc_d_out = 8'd0;
82d58934 23reg [2:0] ssp_cnt = 3'd0;
0472d76d 24
82d58934 25assign adc_clk = ck_1356meg;
26assign ssp_clk = ~ck_1356meg;
0472d76d 27
82d58934 28always @(posedge ssp_clk)
0472d76d 29begin
82d58934 30 if(ssp_cnt[2:0] == 3'd7)
31 ssp_cnt[2:0] <= 3'd0;
32 else
33 ssp_cnt <= ssp_cnt + 1;
0472d76d 34
82d58934 35 if(ssp_cnt[2:0] == 3'b000) // set frame length
0472d76d 36 begin
82d58934 37 adc_d_out[7:0] <= adc_d;
38 ssp_frame <= 1'b1;
0472d76d 39 end
82d58934 40 else
0472d76d 41 begin
82d58934 42 adc_d_out[7:0] <= {1'b0, adc_d_out[7:1]};
43 ssp_frame <= 1'b0;
0472d76d 44 end
0472d76d 45
82d58934 46end
0472d76d 47
82d58934 48assign ssp_din = adc_d_out[0];
0472d76d 49
50endmodule
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