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fix my understanding of REQB vs WUPB
[proxmark3-svn] / armsrc / iso14443b.c
1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
3 //
4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
5 // at your option, any later version. See the LICENSE.txt file for the text of
6 // the license.
7 //-----------------------------------------------------------------------------
8 // Routines to support ISO 14443B. This includes both the reader software and
9 // the `fake tag' modes.
10 //-----------------------------------------------------------------------------
11
12 #include "proxmark3.h"
13 #include "apps.h"
14 #include "util.h"
15 #include "string.h"
16
17 #include "iso14443crc.h"
18
19 #define RECEIVE_SAMPLES_TIMEOUT 2000
20 #define ISO14443B_DMA_BUFFER_SIZE 256
21
22 //=============================================================================
23 // An ISO 14443 Type B tag. We listen for commands from the reader, using
24 // a UART kind of thing that's implemented in software. When we get a
25 // frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
26 // If it's good, then we can do something appropriate with it, and send
27 // a response.
28 //=============================================================================
29
30 //-----------------------------------------------------------------------------
31 // Code up a string of octets at layer 2 (including CRC, we don't generate
32 // that here) so that they can be transmitted to the reader. Doesn't transmit
33 // them yet, just leaves them ready to send in ToSend[].
34 //-----------------------------------------------------------------------------
35 static void CodeIso14443bAsTag(const uint8_t *cmd, int len)
36 {
37 int i;
38
39 ToSendReset();
40
41 // Transmit a burst of ones, as the initial thing that lets the
42 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
43 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
44 // so I will too.
45 for(i = 0; i < 20; i++) {
46 ToSendStuffBit(1);
47 ToSendStuffBit(1);
48 ToSendStuffBit(1);
49 ToSendStuffBit(1);
50 }
51
52 // Send SOF.
53 for(i = 0; i < 10; i++) {
54 ToSendStuffBit(0);
55 ToSendStuffBit(0);
56 ToSendStuffBit(0);
57 ToSendStuffBit(0);
58 }
59 for(i = 0; i < 2; i++) {
60 ToSendStuffBit(1);
61 ToSendStuffBit(1);
62 ToSendStuffBit(1);
63 ToSendStuffBit(1);
64 }
65
66 for(i = 0; i < len; i++) {
67 int j;
68 uint8_t b = cmd[i];
69
70 // Start bit
71 ToSendStuffBit(0);
72 ToSendStuffBit(0);
73 ToSendStuffBit(0);
74 ToSendStuffBit(0);
75
76 // Data bits
77 for(j = 0; j < 8; j++) {
78 if(b & 1) {
79 ToSendStuffBit(1);
80 ToSendStuffBit(1);
81 ToSendStuffBit(1);
82 ToSendStuffBit(1);
83 } else {
84 ToSendStuffBit(0);
85 ToSendStuffBit(0);
86 ToSendStuffBit(0);
87 ToSendStuffBit(0);
88 }
89 b >>= 1;
90 }
91
92 // Stop bit
93 ToSendStuffBit(1);
94 ToSendStuffBit(1);
95 ToSendStuffBit(1);
96 ToSendStuffBit(1);
97 }
98
99 // Send EOF.
100 for(i = 0; i < 10; i++) {
101 ToSendStuffBit(0);
102 ToSendStuffBit(0);
103 ToSendStuffBit(0);
104 ToSendStuffBit(0);
105 }
106 for(i = 0; i < 2; i++) {
107 ToSendStuffBit(1);
108 ToSendStuffBit(1);
109 ToSendStuffBit(1);
110 ToSendStuffBit(1);
111 }
112
113 // Convert from last byte pos to length
114 ToSendMax++;
115 }
116
117 //-----------------------------------------------------------------------------
118 // The software UART that receives commands from the reader, and its state
119 // variables.
120 //-----------------------------------------------------------------------------
121 static struct {
122 enum {
123 STATE_UNSYNCD,
124 STATE_GOT_FALLING_EDGE_OF_SOF,
125 STATE_AWAITING_START_BIT,
126 STATE_RECEIVING_DATA
127 } state;
128 uint16_t shiftReg;
129 int bitCnt;
130 int byteCnt;
131 int byteCntMax;
132 int posCnt;
133 uint8_t *output;
134 } Uart;
135
136 /* Receive & handle a bit coming from the reader.
137 *
138 * This function is called 4 times per bit (every 2 subcarrier cycles).
139 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
140 *
141 * LED handling:
142 * LED A -> ON once we have received the SOF and are expecting the rest.
143 * LED A -> OFF once we have received EOF or are in error state or unsynced
144 *
145 * Returns: true if we received a EOF
146 * false if we are still waiting for some more
147 */
148 static RAMFUNC int Handle14443bUartBit(uint8_t bit)
149 {
150 switch(Uart.state) {
151 case STATE_UNSYNCD:
152 if(!bit) {
153 // we went low, so this could be the beginning
154 // of an SOF
155 Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
156 Uart.posCnt = 0;
157 Uart.bitCnt = 0;
158 }
159 break;
160
161 case STATE_GOT_FALLING_EDGE_OF_SOF:
162 Uart.posCnt++;
163 if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit
164 if(bit) {
165 if(Uart.bitCnt > 9) {
166 // we've seen enough consecutive
167 // zeros that it's a valid SOF
168 Uart.posCnt = 0;
169 Uart.byteCnt = 0;
170 Uart.state = STATE_AWAITING_START_BIT;
171 LED_A_ON(); // Indicate we got a valid SOF
172 } else {
173 // didn't stay down long enough
174 // before going high, error
175 Uart.state = STATE_UNSYNCD;
176 }
177 } else {
178 // do nothing, keep waiting
179 }
180 Uart.bitCnt++;
181 }
182 if(Uart.posCnt >= 4) Uart.posCnt = 0;
183 if(Uart.bitCnt > 12) {
184 // Give up if we see too many zeros without
185 // a one, too.
186 LED_A_OFF();
187 Uart.state = STATE_UNSYNCD;
188 }
189 break;
190
191 case STATE_AWAITING_START_BIT:
192 Uart.posCnt++;
193 if(bit) {
194 if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
195 // stayed high for too long between
196 // characters, error
197 Uart.state = STATE_UNSYNCD;
198 }
199 } else {
200 // falling edge, this starts the data byte
201 Uart.posCnt = 0;
202 Uart.bitCnt = 0;
203 Uart.shiftReg = 0;
204 Uart.state = STATE_RECEIVING_DATA;
205 }
206 break;
207
208 case STATE_RECEIVING_DATA:
209 Uart.posCnt++;
210 if(Uart.posCnt == 2) {
211 // time to sample a bit
212 Uart.shiftReg >>= 1;
213 if(bit) {
214 Uart.shiftReg |= 0x200;
215 }
216 Uart.bitCnt++;
217 }
218 if(Uart.posCnt >= 4) {
219 Uart.posCnt = 0;
220 }
221 if(Uart.bitCnt == 10) {
222 if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
223 {
224 // this is a data byte, with correct
225 // start and stop bits
226 Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff;
227 Uart.byteCnt++;
228
229 if(Uart.byteCnt >= Uart.byteCntMax) {
230 // Buffer overflowed, give up
231 LED_A_OFF();
232 Uart.state = STATE_UNSYNCD;
233 } else {
234 // so get the next byte now
235 Uart.posCnt = 0;
236 Uart.state = STATE_AWAITING_START_BIT;
237 }
238 } else if (Uart.shiftReg == 0x000) {
239 // this is an EOF byte
240 LED_A_OFF(); // Finished receiving
241 Uart.state = STATE_UNSYNCD;
242 if (Uart.byteCnt != 0) {
243 return TRUE;
244 }
245 } else {
246 // this is an error
247 LED_A_OFF();
248 Uart.state = STATE_UNSYNCD;
249 }
250 }
251 break;
252
253 default:
254 LED_A_OFF();
255 Uart.state = STATE_UNSYNCD;
256 break;
257 }
258
259 return FALSE;
260 }
261
262
263 static void UartReset()
264 {
265 Uart.byteCntMax = MAX_FRAME_SIZE;
266 Uart.state = STATE_UNSYNCD;
267 Uart.byteCnt = 0;
268 Uart.bitCnt = 0;
269 }
270
271
272 static void UartInit(uint8_t *data)
273 {
274 Uart.output = data;
275 UartReset();
276 }
277
278
279 //-----------------------------------------------------------------------------
280 // Receive a command (from the reader to us, where we are the simulated tag),
281 // and store it in the given buffer, up to the given maximum length. Keeps
282 // spinning, waiting for a well-framed command, until either we get one
283 // (returns TRUE) or someone presses the pushbutton on the board (FALSE).
284 //
285 // Assume that we're called with the SSC (to the FPGA) and ADC path set
286 // correctly.
287 //-----------------------------------------------------------------------------
288 static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len)
289 {
290 // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen
291 // only, since we are receiving, not transmitting).
292 // Signal field is off with the appropriate LED
293 LED_D_OFF();
294 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
295
296 // Now run a `software UART' on the stream of incoming samples.
297 UartInit(received);
298
299 for(;;) {
300 WDT_HIT();
301
302 if(BUTTON_PRESS()) return FALSE;
303
304 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
305 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
306 for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) {
307 if(Handle14443bUartBit(b & mask)) {
308 *len = Uart.byteCnt;
309 return TRUE;
310 }
311 }
312 }
313 }
314
315 return FALSE;
316 }
317
318 //-----------------------------------------------------------------------------
319 // Main loop of simulated tag: receive commands from reader, decide what
320 // response to send, and send it.
321 //-----------------------------------------------------------------------------
322 void SimulateIso14443bTag(void)
323 {
324 // the only commands we understand is WUPB, AFI=0, Select All, N=1:
325 static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB
326 // ... and REQB, AFI=0, Normal Request, N=1:
327 static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB
328 // ... and HLTB
329 static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB
330 // ... and ATTRIB
331 static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
332
333 // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
334 // supports only 106kBit/s in both directions, max frame size = 32Bytes,
335 // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
336 static const uint8_t response1[] = {
337 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
338 0x00, 0x21, 0x85, 0x5e, 0xd7
339 };
340 // response to HLTB and ATTRIB
341 static const uint8_t response2[] = {0x00, 0x78, 0xF0};
342
343
344 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
345
346 clear_trace();
347 set_tracing(TRUE);
348
349 const uint8_t *resp;
350 uint8_t *respCode;
351 uint16_t respLen, respCodeLen;
352
353 // allocate command receive buffer
354 BigBuf_free();
355 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
356
357 uint16_t len;
358 uint16_t cmdsRecvd = 0;
359
360 // prepare the (only one) tag answer:
361 CodeIso14443bAsTag(response1, sizeof(response1));
362 uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
363 memcpy(resp1Code, ToSend, ToSendMax);
364 uint16_t resp1CodeLen = ToSendMax;
365
366 // prepare the (other) tag answer:
367 CodeIso14443bAsTag(response2, sizeof(response2));
368 uint8_t *resp2Code = BigBuf_malloc(ToSendMax);
369 memcpy(resp2Code, ToSend, ToSendMax);
370 uint16_t resp2CodeLen = ToSendMax;
371
372 // We need to listen to the high-frequency, peak-detected path.
373 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
374 FpgaSetupSsc();
375
376 cmdsRecvd = 0;
377
378 for(;;) {
379
380 if(!GetIso14443bCommandFromReader(receivedCmd, &len)) {
381 Dbprintf("button pressed, received %d commands", cmdsRecvd);
382 break;
383 }
384
385 if (tracing) {
386 uint8_t parity[MAX_PARITY_SIZE];
387 LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
388 }
389
390 // Good, look at the command now.
391 if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0)
392 || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) {
393 resp = response1;
394 respLen = sizeof(response1);
395 respCode = resp1Code;
396 respCodeLen = resp1CodeLen;
397 } else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0])
398 || (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) {
399 resp = response2;
400 respLen = sizeof(response2);
401 respCode = resp2Code;
402 respCodeLen = resp2CodeLen;
403 } else {
404 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
405 // And print whether the CRC fails, just for good measure
406 uint8_t b1, b2;
407 if (len >= 3){ // if crc exists
408 ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
409 if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
410 // Not so good, try again.
411 DbpString("+++CRC fail");
412
413 } else {
414 DbpString("CRC passes");
415 }
416 }
417 //get rid of compiler warning
418 respCodeLen = 0;
419 resp = response1;
420 respLen = 0;
421 respCode = resp1Code;
422 //don't crash at new command just wait and see if reader will send other new cmds.
423 //break;
424 }
425
426 cmdsRecvd++;
427
428 if(cmdsRecvd > 0x30) {
429 DbpString("many commands later...");
430 break;
431 }
432
433 if(respCodeLen <= 0) continue;
434
435 // Modulate BPSK
436 // Signal field is off with the appropriate LED
437 LED_D_OFF();
438 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
439 AT91C_BASE_SSC->SSC_THR = 0xff;
440 FpgaSetupSsc();
441
442 // Transmit the response.
443 uint16_t i = 0;
444 for(;;) {
445 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
446 uint8_t b = respCode[i];
447
448 AT91C_BASE_SSC->SSC_THR = b;
449
450 i++;
451 if(i > respCodeLen) {
452 break;
453 }
454 }
455 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
456 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
457 (void)b;
458 }
459 }
460
461 // trace the response:
462 if (tracing) {
463 uint8_t parity[MAX_PARITY_SIZE];
464 LogTrace(resp, respLen, 0, 0, parity, FALSE);
465 }
466
467 }
468 }
469
470 //=============================================================================
471 // An ISO 14443 Type B reader. We take layer two commands, code them
472 // appropriately, and then send them to the tag. We then listen for the
473 // tag's response, which we leave in the buffer to be demodulated on the
474 // PC side.
475 //=============================================================================
476
477 static struct {
478 enum {
479 DEMOD_UNSYNCD,
480 DEMOD_PHASE_REF_TRAINING,
481 DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
482 DEMOD_GOT_FALLING_EDGE_OF_SOF,
483 DEMOD_AWAITING_START_BIT,
484 DEMOD_RECEIVING_DATA
485 } state;
486 int bitCount;
487 int posCount;
488 int thisBit;
489 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
490 int metric;
491 int metricN;
492 */
493 uint16_t shiftReg;
494 uint8_t *output;
495 int len;
496 int sumI;
497 int sumQ;
498 } Demod;
499
500 /*
501 * Handles reception of a bit from the tag
502 *
503 * This function is called 2 times per bit (every 4 subcarrier cycles).
504 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us
505 *
506 * LED handling:
507 * LED C -> ON once we have received the SOF and are expecting the rest.
508 * LED C -> OFF once we have received EOF or are unsynced
509 *
510 * Returns: true if we received a EOF
511 * false if we are still waiting for some more
512 *
513 */
514 static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
515 {
516 int v;
517
518 // The soft decision on the bit uses an estimate of just the
519 // quadrant of the reference angle, not the exact angle.
520 #define MAKE_SOFT_DECISION() { \
521 if(Demod.sumI > 0) { \
522 v = ci; \
523 } else { \
524 v = -ci; \
525 } \
526 if(Demod.sumQ > 0) { \
527 v += cq; \
528 } else { \
529 v -= cq; \
530 } \
531 }
532
533 #define SUBCARRIER_DETECT_THRESHOLD 8
534
535 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
536 /* #define CHECK_FOR_SUBCARRIER() { \
537 v = ci; \
538 if(v < 0) v = -v; \
539 if(cq > 0) { \
540 v += cq; \
541 } else { \
542 v -= cq; \
543 } \
544 }
545 */
546 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
547 #define CHECK_FOR_SUBCARRIER() { \
548 if(ci < 0) { \
549 if(cq < 0) { /* ci < 0, cq < 0 */ \
550 if (cq < ci) { \
551 v = -cq - (ci >> 1); \
552 } else { \
553 v = -ci - (cq >> 1); \
554 } \
555 } else { /* ci < 0, cq >= 0 */ \
556 if (cq < -ci) { \
557 v = -ci + (cq >> 1); \
558 } else { \
559 v = cq - (ci >> 1); \
560 } \
561 } \
562 } else { \
563 if(cq < 0) { /* ci >= 0, cq < 0 */ \
564 if (-cq < ci) { \
565 v = ci - (cq >> 1); \
566 } else { \
567 v = -cq + (ci >> 1); \
568 } \
569 } else { /* ci >= 0, cq >= 0 */ \
570 if (cq < ci) { \
571 v = ci + (cq >> 1); \
572 } else { \
573 v = cq + (ci >> 1); \
574 } \
575 } \
576 } \
577 }
578
579 switch(Demod.state) {
580 case DEMOD_UNSYNCD:
581 CHECK_FOR_SUBCARRIER();
582 if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected
583 Demod.state = DEMOD_PHASE_REF_TRAINING;
584 Demod.sumI = ci;
585 Demod.sumQ = cq;
586 Demod.posCount = 1;
587 }
588 break;
589
590 case DEMOD_PHASE_REF_TRAINING:
591 if(Demod.posCount < 8) {
592 CHECK_FOR_SUBCARRIER();
593 if (v > SUBCARRIER_DETECT_THRESHOLD) {
594 // set the reference phase (will code a logic '1') by averaging over 32 1/fs.
595 // note: synchronization time > 80 1/fs
596 Demod.sumI += ci;
597 Demod.sumQ += cq;
598 Demod.posCount++;
599 } else { // subcarrier lost
600 Demod.state = DEMOD_UNSYNCD;
601 }
602 } else {
603 Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
604 }
605 break;
606
607 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
608 MAKE_SOFT_DECISION();
609 if(v < 0) { // logic '0' detected
610 Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
611 Demod.posCount = 0; // start of SOF sequence
612 } else {
613 if(Demod.posCount > 200/4) { // maximum length of TR1 = 200 1/fs
614 Demod.state = DEMOD_UNSYNCD;
615 }
616 }
617 Demod.posCount++;
618 break;
619
620 case DEMOD_GOT_FALLING_EDGE_OF_SOF:
621 Demod.posCount++;
622 MAKE_SOFT_DECISION();
623 if(v > 0) {
624 if(Demod.posCount < 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
625 Demod.state = DEMOD_UNSYNCD;
626 } else {
627 LED_C_ON(); // Got SOF
628 Demod.state = DEMOD_AWAITING_START_BIT;
629 Demod.posCount = 0;
630 Demod.len = 0;
631 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
632 Demod.metricN = 0;
633 Demod.metric = 0;
634 */
635 }
636 } else {
637 if(Demod.posCount > 12*2) { // low phase of SOF too long (> 12 etu)
638 Demod.state = DEMOD_UNSYNCD;
639 LED_C_OFF();
640 }
641 }
642 break;
643
644 case DEMOD_AWAITING_START_BIT:
645 Demod.posCount++;
646 MAKE_SOFT_DECISION();
647 if(v > 0) {
648 if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
649 Demod.state = DEMOD_UNSYNCD;
650 LED_C_OFF();
651 }
652 } else { // start bit detected
653 Demod.bitCount = 0;
654 Demod.posCount = 1; // this was the first half
655 Demod.thisBit = v;
656 Demod.shiftReg = 0;
657 Demod.state = DEMOD_RECEIVING_DATA;
658 }
659 break;
660
661 case DEMOD_RECEIVING_DATA:
662 MAKE_SOFT_DECISION();
663 if(Demod.posCount == 0) { // first half of bit
664 Demod.thisBit = v;
665 Demod.posCount = 1;
666 } else { // second half of bit
667 Demod.thisBit += v;
668
669 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
670 if(Demod.thisBit > 0) {
671 Demod.metric += Demod.thisBit;
672 } else {
673 Demod.metric -= Demod.thisBit;
674 }
675 (Demod.metricN)++;
676 */
677
678 Demod.shiftReg >>= 1;
679 if(Demod.thisBit > 0) { // logic '1'
680 Demod.shiftReg |= 0x200;
681 }
682
683 Demod.bitCount++;
684 if(Demod.bitCount == 10) {
685 uint16_t s = Demod.shiftReg;
686 if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0'
687 uint8_t b = (s >> 1);
688 Demod.output[Demod.len] = b;
689 Demod.len++;
690 Demod.state = DEMOD_AWAITING_START_BIT;
691 } else {
692 Demod.state = DEMOD_UNSYNCD;
693 LED_C_OFF();
694 if(s == 0x000) {
695 // This is EOF (start, stop and all data bits == '0'
696 return TRUE;
697 }
698 }
699 }
700 Demod.posCount = 0;
701 }
702 break;
703
704 default:
705 Demod.state = DEMOD_UNSYNCD;
706 LED_C_OFF();
707 break;
708 }
709
710 return FALSE;
711 }
712
713
714 static void DemodReset()
715 {
716 // Clear out the state of the "UART" that receives from the tag.
717 Demod.len = 0;
718 Demod.state = DEMOD_UNSYNCD;
719 Demod.posCount = 0;
720 memset(Demod.output, 0x00, MAX_FRAME_SIZE);
721 }
722
723
724 static void DemodInit(uint8_t *data)
725 {
726 Demod.output = data;
727 DemodReset();
728 }
729
730
731 /*
732 * Demodulate the samples we received from the tag, also log to tracebuffer
733 * quiet: set to 'TRUE' to disable debug output
734 */
735 static void GetSamplesFor14443bDemod(int n, bool quiet)
736 {
737 int max = 0;
738 bool gotFrame = FALSE;
739 int lastRxCounter, ci, cq, samples = 0;
740
741 // Allocate memory from BigBuf for some buffers
742 // free all previous allocations first
743 BigBuf_free();
744
745 // The response (tag -> reader) that we're receiving.
746 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
747
748 // The DMA buffer, used to stream samples from the FPGA
749 int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
750
751 // Set up the demodulator for tag -> reader responses.
752 DemodInit(receivedResponse);
753
754 // Setup and start DMA.
755 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
756
757 int8_t *upTo = dmaBuf;
758 lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
759
760 // Signal field is ON with the appropriate LED:
761 LED_D_ON();
762 // And put the FPGA in the appropriate mode
763 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
764
765 for(;;) {
766 int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
767 if(behindBy > max) max = behindBy;
768
769 while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1)) > 2) {
770 ci = upTo[0];
771 cq = upTo[1];
772 upTo += 2;
773 if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) {
774 upTo = dmaBuf;
775 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
776 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE;
777 }
778 lastRxCounter -= 2;
779 if(lastRxCounter <= 0) {
780 lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
781 }
782
783 samples += 2;
784
785 if(Handle14443bSamplesDemod(ci, cq)) {
786 gotFrame = TRUE;
787 break;
788 }
789 }
790
791 if(samples > n || gotFrame) {
792 break;
793 }
794 }
795
796 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
797
798 if (!quiet) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, gotFrame, Demod.len, Demod.sumI, Demod.sumQ);
799 //Tracing
800 if (tracing && Demod.len > 0) {
801 uint8_t parity[MAX_PARITY_SIZE];
802 LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE);
803 }
804 }
805
806
807 //-----------------------------------------------------------------------------
808 // Transmit the command (to the tag) that was placed in ToSend[].
809 //-----------------------------------------------------------------------------
810 static void TransmitFor14443b(void)
811 {
812 int c;
813
814 FpgaSetupSsc();
815
816 while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
817 AT91C_BASE_SSC->SSC_THR = 0xff;
818 }
819
820 // Signal field is ON with the appropriate Red LED
821 LED_D_ON();
822 // Signal we are transmitting with the Green LED
823 LED_B_ON();
824 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
825
826 for(c = 0; c < 10;) {
827 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
828 AT91C_BASE_SSC->SSC_THR = 0xff;
829 c++;
830 }
831 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
832 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
833 (void)r;
834 }
835 WDT_HIT();
836 }
837
838 c = 0;
839 for(;;) {
840 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
841 AT91C_BASE_SSC->SSC_THR = ToSend[c];
842 c++;
843 if(c >= ToSendMax) {
844 break;
845 }
846 }
847 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
848 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
849 (void)r;
850 }
851 WDT_HIT();
852 }
853 LED_B_OFF(); // Finished sending
854 }
855
856
857 //-----------------------------------------------------------------------------
858 // Code a layer 2 command (string of octets, including CRC) into ToSend[],
859 // so that it is ready to transmit to the tag using TransmitFor14443b().
860 //-----------------------------------------------------------------------------
861 static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
862 {
863 int i, j;
864 uint8_t b;
865
866 ToSendReset();
867
868 // Establish initial reference level
869 for(i = 0; i < 40; i++) {
870 ToSendStuffBit(1);
871 }
872 // Send SOF
873 for(i = 0; i < 10; i++) {
874 ToSendStuffBit(0);
875 }
876
877 for(i = 0; i < len; i++) {
878 // Stop bits/EGT
879 ToSendStuffBit(1);
880 ToSendStuffBit(1);
881 // Start bit
882 ToSendStuffBit(0);
883 // Data bits
884 b = cmd[i];
885 for(j = 0; j < 8; j++) {
886 if(b & 1) {
887 ToSendStuffBit(1);
888 } else {
889 ToSendStuffBit(0);
890 }
891 b >>= 1;
892 }
893 }
894 // Send EOF
895 ToSendStuffBit(1);
896 for(i = 0; i < 10; i++) {
897 ToSendStuffBit(0);
898 }
899 for(i = 0; i < 8; i++) {
900 ToSendStuffBit(1);
901 }
902
903 // And then a little more, to make sure that the last character makes
904 // it out before we switch to rx mode.
905 for(i = 0; i < 24; i++) {
906 ToSendStuffBit(1);
907 }
908
909 // Convert from last character reference to length
910 ToSendMax++;
911 }
912
913
914 /**
915 Convenience function to encode, transmit and trace iso 14443b comms
916 **/
917 static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
918 {
919 CodeIso14443bAsReader(cmd, len);
920 TransmitFor14443b();
921 if (tracing) {
922 uint8_t parity[MAX_PARITY_SIZE];
923 LogTrace(cmd,len, 0, 0, parity, TRUE);
924 }
925 }
926
927
928 //-----------------------------------------------------------------------------
929 // Read a SRI512 ISO 14443B tag.
930 //
931 // SRI512 tags are just simple memory tags, here we're looking at making a dump
932 // of the contents of the memory. No anticollision algorithm is done, we assume
933 // we have a single tag in the field.
934 //
935 // I tried to be systematic and check every answer of the tag, every CRC, etc...
936 //-----------------------------------------------------------------------------
937 void ReadSTMemoryIso14443b(uint32_t dwLast)
938 {
939 uint8_t i = 0x00;
940
941 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
942 // Make sure that we start from off, since the tags are stateful;
943 // confusing things will happen if we don't reset them between reads.
944 LED_D_OFF();
945 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
946 SpinDelay(200);
947
948 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
949 FpgaSetupSsc();
950
951 // Now give it time to spin up.
952 // Signal field is on with the appropriate LED
953 LED_D_ON();
954 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
955 SpinDelay(200);
956
957 clear_trace();
958 set_tracing(TRUE);
959
960 // First command: wake up the tag using the INITIATE command
961 uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b};
962 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
963 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
964
965 if (Demod.len == 0) {
966 DbpString("No response from tag");
967 return;
968 } else {
969 Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x",
970 Demod.output[0], Demod.output[1], Demod.output[2]);
971 }
972
973 // There is a response, SELECT the uid
974 DbpString("Now SELECT tag:");
975 cmd1[0] = 0x0E; // 0x0E is SELECT
976 cmd1[1] = Demod.output[0];
977 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
978 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
979 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
980 if (Demod.len != 3) {
981 Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
982 return;
983 }
984 // Check the CRC of the answer:
985 ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
986 if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
987 DbpString("CRC Error reading select response.");
988 return;
989 }
990 // Check response from the tag: should be the same UID as the command we just sent:
991 if (cmd1[1] != Demod.output[0]) {
992 Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]);
993 return;
994 }
995
996 // Tag is now selected,
997 // First get the tag's UID:
998 cmd1[0] = 0x0B;
999 ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]);
1000 CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one
1001 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
1002 if (Demod.len != 10) {
1003 Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
1004 return;
1005 }
1006 // The check the CRC of the answer (use cmd1 as temporary variable):
1007 ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]);
1008 if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) {
1009 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
1010 (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
1011 // Do not return;, let's go on... (we should retry, maybe ?)
1012 }
1013 Dbprintf("Tag UID (64 bits): %08x %08x",
1014 (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
1015 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
1016
1017 // Now loop to read all 16 blocks, address from 0 to last block
1018 Dbprintf("Tag memory dump, block 0 to %d", dwLast);
1019 cmd1[0] = 0x08;
1020 i = 0x00;
1021 dwLast++;
1022 for (;;) {
1023 if (i == dwLast) {
1024 DbpString("System area block (0xff):");
1025 i = 0xff;
1026 }
1027 cmd1[1] = i;
1028 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
1029 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
1030 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
1031 if (Demod.len != 6) { // Check if we got an answer from the tag
1032 DbpString("Expected 6 bytes from tag, got less...");
1033 return;
1034 }
1035 // The check the CRC of the answer (use cmd1 as temporary variable):
1036 ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]);
1037 if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
1038 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
1039 (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
1040 // Do not return;, let's go on... (we should retry, maybe ?)
1041 }
1042 // Now print out the memory location:
1043 Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i,
1044 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
1045 (Demod.output[4]<<8)+Demod.output[5]);
1046 if (i == 0xff) {
1047 break;
1048 }
1049 i++;
1050 }
1051 }
1052
1053
1054 //=============================================================================
1055 // Finally, the `sniffer' combines elements from both the reader and
1056 // simulated tag, to show both sides of the conversation.
1057 //=============================================================================
1058
1059 //-----------------------------------------------------------------------------
1060 // Record the sequence of commands sent by the reader to the tag, with
1061 // triggering so that we start recording at the point that the tag is moved
1062 // near the reader.
1063 //-----------------------------------------------------------------------------
1064 /*
1065 * Memory usage for this function, (within BigBuf)
1066 * Last Received command (reader->tag) - MAX_FRAME_SIZE
1067 * Last Received command (tag->reader) - MAX_FRAME_SIZE
1068 * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE
1069 * Demodulated samples received - all the rest
1070 */
1071 void RAMFUNC SnoopIso14443b(void)
1072 {
1073 // We won't start recording the frames that we acquire until we trigger;
1074 // a good trigger condition to get started is probably when we see a
1075 // response from the tag.
1076 int triggered = TRUE; // TODO: set and evaluate trigger condition
1077
1078 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1079 BigBuf_free();
1080
1081 clear_trace();
1082 set_tracing(TRUE);
1083
1084 // The DMA buffer, used to stream samples from the FPGA
1085 int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
1086 int lastRxCounter;
1087 int8_t *upTo;
1088 int ci, cq;
1089 int maxBehindBy = 0;
1090
1091 // Count of samples received so far, so that we can include timing
1092 // information in the trace buffer.
1093 int samples = 0;
1094
1095 DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
1096 UartInit(BigBuf_malloc(MAX_FRAME_SIZE));
1097
1098 // Print some debug information about the buffer sizes
1099 Dbprintf("Snooping buffers initialized:");
1100 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1101 Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE);
1102 Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE);
1103 Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE);
1104
1105 // Signal field is off, no reader signal, no tag signal
1106 LEDsoff();
1107
1108 // And put the FPGA in the appropriate mode
1109 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP);
1110 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1111
1112 // Setup for the DMA.
1113 FpgaSetupSsc();
1114 upTo = dmaBuf;
1115 lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
1116 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
1117 uint8_t parity[MAX_PARITY_SIZE];
1118
1119 bool TagIsActive = FALSE;
1120 bool ReaderIsActive = FALSE;
1121
1122 // And now we loop, receiving samples.
1123 for(;;) {
1124 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
1125 (ISO14443B_DMA_BUFFER_SIZE-1);
1126 if(behindBy > maxBehindBy) {
1127 maxBehindBy = behindBy;
1128 }
1129
1130 if(behindBy < 2) continue;
1131
1132 ci = upTo[0];
1133 cq = upTo[1];
1134 upTo += 2;
1135 lastRxCounter -= 2;
1136 if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) {
1137 upTo = dmaBuf;
1138 lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
1139 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
1140 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE;
1141 WDT_HIT();
1142 if(behindBy > (9*ISO14443B_DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not?
1143 Dbprintf("blew circular buffer! behindBy=%d", behindBy);
1144 break;
1145 }
1146 if(!tracing) {
1147 DbpString("Reached trace limit");
1148 break;
1149 }
1150 if(BUTTON_PRESS()) {
1151 DbpString("cancelled");
1152 break;
1153 }
1154 }
1155
1156 samples += 2;
1157
1158 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
1159 if(Handle14443bUartBit(ci & 0x01)) {
1160 if(triggered && tracing) {
1161 LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
1162 }
1163 /* And ready to receive another command. */
1164 UartReset();
1165 /* And also reset the demod code, which might have been */
1166 /* false-triggered by the commands from the reader. */
1167 DemodReset();
1168 }
1169 if(Handle14443bUartBit(cq & 0x01)) {
1170 if(triggered && tracing) {
1171 LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
1172 }
1173 /* And ready to receive another command. */
1174 UartReset();
1175 /* And also reset the demod code, which might have been */
1176 /* false-triggered by the commands from the reader. */
1177 DemodReset();
1178 }
1179 ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF);
1180 }
1181
1182 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
1183 if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) {
1184
1185 //Use samples as a time measurement
1186 if(tracing)
1187 {
1188 uint8_t parity[MAX_PARITY_SIZE];
1189 LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
1190 }
1191 triggered = TRUE;
1192
1193 // And ready to receive another response.
1194 DemodReset();
1195 }
1196 TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF);
1197 }
1198
1199 }
1200
1201 FpgaDisableSscDma();
1202 LEDsoff();
1203 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
1204 DbpString("Snoop statistics:");
1205 Dbprintf(" Max behind by: %i", maxBehindBy);
1206 Dbprintf(" Uart State: %x", Uart.state);
1207 Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt);
1208 Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax);
1209 Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
1210 }
1211
1212
1213 /*
1214 * Send raw command to tag ISO14443B
1215 * @Input
1216 * datalen len of buffer data
1217 * recv bool when true wait for data from tag and send to client
1218 * powerfield bool leave the field on when true
1219 * data buffer with byte to send
1220 *
1221 * @Output
1222 * none
1223 *
1224 */
1225 void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[])
1226 {
1227 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1228 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1229 FpgaSetupSsc();
1230
1231 if (datalen){
1232 set_tracing(TRUE);
1233
1234 CodeAndTransmit14443bAsReader(data, datalen);
1235
1236 if(recv) {
1237 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
1238 uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE);
1239 cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen);
1240 }
1241 }
1242
1243 if(!powerfield) {
1244 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1245 LED_D_OFF();
1246 }
1247 }
1248
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