]> git.zerfleddert.de Git - proxmark3-svn/blob - armsrc/iclass.c
projects / proxmark3-svn / blob
? search:


1a729f3ff153eb08700b82f6411396fbe9a6a1e7
[proxmark3-svn] / armsrc / iclass.c
1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
15 //
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
18 //
19 // FIX:
20 // ====
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
23 //
24 // + 22279: : 0c 03 e8 01
25 //
26 // ...with an incorrect answer...
27 //
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29 //
30 // We still left the error signalling bytes in the traces like 0xbb
31 //
32 // A correct trace should look like this:
33 //
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36 //
37 //-----------------------------------------------------------------------------
38
39 #include "iclass.h"
40
41 #include "proxmark3.h"
42 #include "apps.h"
43 #include "util.h"
44 #include "string.h"
45 #include "printf.h"
46 #include "common.h"
47 #include "cmd.h"
48 #include "iso14443a.h"
49 #include "iso15693.h"
50 // Needed for CRC in emulation mode;
51 // same construction as in ISO 14443;
52 // different initial value (CRC_ICLASS)
53 #include "iso14443crc.h"
54 #include "iso15693tools.h"
55 #include "protocols.h"
56 #include "optimized_cipher.h"
57 #include "usb_cdc.h" // for usb_poll_validate_length
58 #include "fpgaloader.h"
59
60 // iCLASS has a slightly different timing compared to ISO15693. According to the picopass data sheet the tag response is expected 330us after
61 // the reader command. This is measured from end of reader EOF to first modulation of the tag's SOF which starts with a 56,64us unmodulated period.
62 // 330us = 140 ssp_clk cycles @ 423,75kHz when simulating.
63 // 56,64us = 24 ssp_clk_cycles
64 #define DELAY_ICLASS_VCD_TO_VICC_SIM (140 - 24)
65 // times in ssp_clk_cycles @ 3,3625MHz when acting as reader
66 #define DELAY_ICLASS_VICC_TO_VCD_READER DELAY_ISO15693_VICC_TO_VCD_READER
67 // times in samples @ 212kHz when acting as reader
68 #define ICLASS_READER_TIMEOUT_ACTALL 330 // 1558us, nominal 330us + 7slots*160us = 1450us
69 #define ICLASS_READER_TIMEOUT_OTHERS 80 // 380us, nominal 330us
70
71
72 //-----------------------------------------------------------------------------
73 // The software UART that receives commands from the reader, and its state
74 // variables.
75 //-----------------------------------------------------------------------------
76 static struct {
77 enum {
78 STATE_UNSYNCD,
79 STATE_START_OF_COMMUNICATION,
80 STATE_RECEIVING
81 } state;
82 uint16_t shiftReg;
83 int bitCnt;
84 int byteCnt;
85 int byteCntMax;
86 int posCnt;
87 int nOutOfCnt;
88 int OutOfCnt;
89 int syncBit;
90 int samples;
91 int highCnt;
92 int swapper;
93 int counter;
94 int bitBuffer;
95 int dropPosition;
96 uint8_t *output;
97 } Uart;
98
99 static RAMFUNC int OutOfNDecoding(int bit) {
100 //int error = 0;
101 int bitright;
102
103 if (!Uart.bitBuffer) {
104 Uart.bitBuffer = bit ^ 0xFF0;
105 return false;
106 } else {
107 Uart.bitBuffer <<= 4;
108 Uart.bitBuffer ^= bit;
109 }
110
111 /*if (Uart.swapper) {
112 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
113 Uart.byteCnt++;
114 Uart.swapper = 0;
115 if (Uart.byteCnt > 15) { return true; }
116 }
117 else {
118 Uart.swapper = 1;
119 }*/
120
121 if (Uart.state != STATE_UNSYNCD) {
122 Uart.posCnt++;
123
124 if ((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
125 bit = 0x00;
126 } else {
127 bit = 0x01;
128 }
129 if (((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
130 bitright = 0x00;
131 } else {
132 bitright = 0x01;
133 }
134 if (bit != bitright) {
135 bit = bitright;
136 }
137
138
139 // So, now we only have to deal with *bit*, lets see...
140 if (Uart.posCnt == 1) {
141 // measurement first half bitperiod
142 if (!bit) {
143 // Drop in first half means that we are either seeing
144 // an SOF or an EOF.
145
146 if (Uart.nOutOfCnt == 1) {
147 // End of Communication
148 Uart.state = STATE_UNSYNCD;
149 Uart.highCnt = 0;
150 if (Uart.byteCnt == 0) {
151 // Its not straightforward to show single EOFs
152 // So just leave it and do not return true
153 Uart.output[0] = 0xf0;
154 Uart.byteCnt++;
155 } else {
156 return true;
157 }
158 } else if (Uart.state != STATE_START_OF_COMMUNICATION) {
159 // When not part of SOF or EOF, it is an error
160 Uart.state = STATE_UNSYNCD;
161 Uart.highCnt = 0;
162 //error = 4;
163 }
164 }
165 } else {
166 // measurement second half bitperiod
167 // Count the bitslot we are in... (ISO 15693)
168 Uart.nOutOfCnt++;
169
170 if (!bit) {
171 if (Uart.dropPosition) {
172 if (Uart.state == STATE_START_OF_COMMUNICATION) {
173 //error = 1;
174 } else {
175 //error = 7;
176 }
177 // It is an error if we already have seen a drop in current frame
178 Uart.state = STATE_UNSYNCD;
179 Uart.highCnt = 0;
180 } else {
181 Uart.dropPosition = Uart.nOutOfCnt;
182 }
183 }
184
185 Uart.posCnt = 0;
186
187
188 if (Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
189 Uart.nOutOfCnt = 0;
190
191 if (Uart.state == STATE_START_OF_COMMUNICATION) {
192 if (Uart.dropPosition == 4) {
193 Uart.state = STATE_RECEIVING;
194 Uart.OutOfCnt = 256;
195 } else if (Uart.dropPosition == 3) {
196 Uart.state = STATE_RECEIVING;
197 Uart.OutOfCnt = 4;
198 //Uart.output[Uart.byteCnt] = 0xdd;
199 //Uart.byteCnt++;
200 } else {
201 Uart.state = STATE_UNSYNCD;
202 Uart.highCnt = 0;
203 }
204 Uart.dropPosition = 0;
205 } else {
206 // RECEIVING DATA
207 // 1 out of 4
208 if (!Uart.dropPosition) {
209 Uart.state = STATE_UNSYNCD;
210 Uart.highCnt = 0;
211 //error = 9;
212 } else {
213 Uart.shiftReg >>= 2;
214
215 // Swap bit order
216 Uart.dropPosition--;
217 //if (Uart.dropPosition == 1) { Uart.dropPosition = 2; }
218 //else if (Uart.dropPosition == 2) { Uart.dropPosition = 1; }
219
220 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
221 Uart.bitCnt += 2;
222 Uart.dropPosition = 0;
223
224 if (Uart.bitCnt == 8) {
225 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
226 Uart.byteCnt++;
227 Uart.bitCnt = 0;
228 Uart.shiftReg = 0;
229 }
230 }
231 }
232 } else if (Uart.nOutOfCnt == Uart.OutOfCnt) {
233 // RECEIVING DATA
234 // 1 out of 256
235 if (!Uart.dropPosition) {
236 Uart.state = STATE_UNSYNCD;
237 Uart.highCnt = 0;
238 //error = 3;
239 } else {
240 Uart.dropPosition--;
241 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
242 Uart.byteCnt++;
243 Uart.bitCnt = 0;
244 Uart.shiftReg = 0;
245 Uart.nOutOfCnt = 0;
246 Uart.dropPosition = 0;
247 }
248 }
249
250 /*if (error) {
251 Uart.output[Uart.byteCnt] = 0xAA;
252 Uart.byteCnt++;
253 Uart.output[Uart.byteCnt] = error & 0xFF;
254 Uart.byteCnt++;
255 Uart.output[Uart.byteCnt] = 0xAA;
256 Uart.byteCnt++;
257 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
258 Uart.byteCnt++;
259 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
260 Uart.byteCnt++;
261 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
262 Uart.byteCnt++;
263 Uart.output[Uart.byteCnt] = 0xAA;
264 Uart.byteCnt++;
265 return true;
266 }*/
267 }
268
269 } else {
270 bit = Uart.bitBuffer & 0xf0;
271 bit >>= 4;
272 bit ^= 0x0F; // drops become 1s ;-)
273 if (bit) {
274 // should have been high or at least (4 * 128) / fc
275 // according to ISO this should be at least (9 * 128 + 20) / fc
276 if (Uart.highCnt == 8) {
277 // we went low, so this could be start of communication
278 // it turns out to be safer to choose a less significant
279 // syncbit... so we check whether the neighbour also represents the drop
280 Uart.posCnt = 1; // apparently we are busy with our first half bit period
281 Uart.syncBit = bit & 8;
282 Uart.samples = 3;
283 if (!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
284 else if (bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
285 if (!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
286 else if (bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
287 if (!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
288 if (Uart.syncBit && (Uart.bitBuffer & 8)) {
289 Uart.syncBit = 8;
290
291 // the first half bit period is expected in next sample
292 Uart.posCnt = 0;
293 Uart.samples = 3;
294 }
295 } else if (bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
296
297 Uart.syncBit <<= 4;
298 Uart.state = STATE_START_OF_COMMUNICATION;
299 Uart.bitCnt = 0;
300 Uart.byteCnt = 0;
301 Uart.nOutOfCnt = 0;
302 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
303 Uart.dropPosition = 0;
304 Uart.shiftReg = 0;
305 //error = 0;
306 } else {
307 Uart.highCnt = 0;
308 }
309 } else if (Uart.highCnt < 8) {
310 Uart.highCnt++;
311 }
312 }
313
314 return false;
315 }
316
317
318 //=============================================================================
319 // Manchester
320 //=============================================================================
321
322 static struct {
323 enum {
324 DEMOD_UNSYNCD,
325 DEMOD_START_OF_COMMUNICATION,
326 DEMOD_START_OF_COMMUNICATION2,
327 DEMOD_START_OF_COMMUNICATION3,
328 DEMOD_SOF_COMPLETE,
329 DEMOD_MANCHESTER_D,
330 DEMOD_MANCHESTER_E,
331 DEMOD_END_OF_COMMUNICATION,
332 DEMOD_END_OF_COMMUNICATION2,
333 DEMOD_MANCHESTER_F,
334 DEMOD_ERROR_WAIT
335 } state;
336 int bitCount;
337 int posCount;
338 int syncBit;
339 uint16_t shiftReg;
340 int buffer;
341 int buffer2;
342 int buffer3;
343 int buff;
344 int samples;
345 int len;
346 enum {
347 SUB_NONE,
348 SUB_FIRST_HALF,
349 SUB_SECOND_HALF,
350 SUB_BOTH
351 } sub;
352 uint8_t *output;
353 } Demod;
354
355 static RAMFUNC int ManchesterDecoding(int v) {
356 int bit;
357 int modulation;
358 int error = 0;
359
360 bit = Demod.buffer;
361 Demod.buffer = Demod.buffer2;
362 Demod.buffer2 = Demod.buffer3;
363 Demod.buffer3 = v;
364
365 if (Demod.buff < 3) {
366 Demod.buff++;
367 return false;
368 }
369
370 if (Demod.state==DEMOD_UNSYNCD) {
371 Demod.output[Demod.len] = 0xfa;
372 Demod.syncBit = 0;
373 //Demod.samples = 0;
374 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
375
376 if (bit & 0x08) {
377 Demod.syncBit = 0x08;
378 }
379
380 if (bit & 0x04) {
381 if (Demod.syncBit) {
382 bit <<= 4;
383 }
384 Demod.syncBit = 0x04;
385 }
386
387 if (bit & 0x02) {
388 if (Demod.syncBit) {
389 bit <<= 2;
390 }
391 Demod.syncBit = 0x02;
392 }
393
394 if (bit & 0x01 && Demod.syncBit) {
395 Demod.syncBit = 0x01;
396 }
397
398 if (Demod.syncBit) {
399 Demod.len = 0;
400 Demod.state = DEMOD_START_OF_COMMUNICATION;
401 Demod.sub = SUB_FIRST_HALF;
402 Demod.bitCount = 0;
403 Demod.shiftReg = 0;
404 Demod.samples = 0;
405 if (Demod.posCount) {
406 switch (Demod.syncBit) {
407 case 0x08: Demod.samples = 3; break;
408 case 0x04: Demod.samples = 2; break;
409 case 0x02: Demod.samples = 1; break;
410 case 0x01: Demod.samples = 0; break;
411 }
412 // SOF must be long burst... otherwise stay unsynced!!!
413 if (!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
414 Demod.state = DEMOD_UNSYNCD;
415 }
416 } else {
417 // SOF must be long burst... otherwise stay unsynced!!!
418 if (!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
419 Demod.state = DEMOD_UNSYNCD;
420 error = 0x88;
421 }
422
423 }
424 error = 0;
425
426 }
427 } else {
428 // state is DEMOD is in SYNC from here on.
429 modulation = bit & Demod.syncBit;
430 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
431
432 Demod.samples += 4;
433
434 if (Demod.posCount == 0) {
435 Demod.posCount = 1;
436 if (modulation) {
437 Demod.sub = SUB_FIRST_HALF;
438 } else {
439 Demod.sub = SUB_NONE;
440 }
441 } else {
442 Demod.posCount = 0;
443 if (modulation) {
444 if (Demod.sub == SUB_FIRST_HALF) {
445 Demod.sub = SUB_BOTH;
446 } else {
447 Demod.sub = SUB_SECOND_HALF;
448 }
449 } else if (Demod.sub == SUB_NONE) {
450 if (Demod.state == DEMOD_SOF_COMPLETE) {
451 Demod.output[Demod.len] = 0x0f;
452 Demod.len++;
453 Demod.state = DEMOD_UNSYNCD;
454 return true;
455 } else {
456 Demod.state = DEMOD_ERROR_WAIT;
457 error = 0x33;
458 }
459 }
460
461 switch(Demod.state) {
462 case DEMOD_START_OF_COMMUNICATION:
463 if (Demod.sub == SUB_BOTH) {
464 Demod.state = DEMOD_START_OF_COMMUNICATION2;
465 Demod.posCount = 1;
466 Demod.sub = SUB_NONE;
467 } else {
468 Demod.output[Demod.len] = 0xab;
469 Demod.state = DEMOD_ERROR_WAIT;
470 error = 0xd2;
471 }
472 break;
473 case DEMOD_START_OF_COMMUNICATION2:
474 if (Demod.sub == SUB_SECOND_HALF) {
475 Demod.state = DEMOD_START_OF_COMMUNICATION3;
476 } else {
477 Demod.output[Demod.len] = 0xab;
478 Demod.state = DEMOD_ERROR_WAIT;
479 error = 0xd3;
480 }
481 break;
482 case DEMOD_START_OF_COMMUNICATION3:
483 if (Demod.sub == SUB_SECOND_HALF) {
484 Demod.state = DEMOD_SOF_COMPLETE;
485 } else {
486 Demod.output[Demod.len] = 0xab;
487 Demod.state = DEMOD_ERROR_WAIT;
488 error = 0xd4;
489 }
490 break;
491 case DEMOD_SOF_COMPLETE:
492 case DEMOD_MANCHESTER_D:
493 case DEMOD_MANCHESTER_E:
494 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
495 // 00001111 = 1 (0 in 14443)
496 if (Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
497 Demod.bitCount++;
498 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
499 Demod.state = DEMOD_MANCHESTER_D;
500 } else if (Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
501 Demod.bitCount++;
502 Demod.shiftReg >>= 1;
503 Demod.state = DEMOD_MANCHESTER_E;
504 } else if (Demod.sub == SUB_BOTH) {
505 Demod.state = DEMOD_MANCHESTER_F;
506 } else {
507 Demod.state = DEMOD_ERROR_WAIT;
508 error = 0x55;
509 }
510 break;
511
512 case DEMOD_MANCHESTER_F:
513 // Tag response does not need to be a complete byte!
514 if (Demod.len > 0 || Demod.bitCount > 0) {
515 if (Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
516 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
517 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
518 Demod.len++;
519 }
520
521 Demod.state = DEMOD_UNSYNCD;
522 return true;
523 } else {
524 Demod.output[Demod.len] = 0xad;
525 Demod.state = DEMOD_ERROR_WAIT;
526 error = 0x03;
527 }
528 break;
529
530 case DEMOD_ERROR_WAIT:
531 Demod.state = DEMOD_UNSYNCD;
532 break;
533
534 default:
535 Demod.output[Demod.len] = 0xdd;
536 Demod.state = DEMOD_UNSYNCD;
537 break;
538 }
539
540 if (Demod.bitCount >= 8) {
541 Demod.shiftReg >>= 1;
542 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
543 Demod.len++;
544 Demod.bitCount = 0;
545 Demod.shiftReg = 0;
546 }
547
548 if (error) {
549 Demod.output[Demod.len] = 0xBB;
550 Demod.len++;
551 Demod.output[Demod.len] = error & 0xFF;
552 Demod.len++;
553 Demod.output[Demod.len] = 0xBB;
554 Demod.len++;
555 Demod.output[Demod.len] = bit & 0xFF;
556 Demod.len++;
557 Demod.output[Demod.len] = Demod.buffer & 0xFF;
558 Demod.len++;
559 // Look harder ;-)
560 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
561 Demod.len++;
562 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
563 Demod.len++;
564 Demod.output[Demod.len] = 0xBB;
565 Demod.len++;
566 return true;
567 }
568
569 }
570
571 } // end (state != UNSYNCED)
572
573 return false;
574 }
575
576 //=============================================================================
577 // Finally, a `sniffer' for iClass communication
578 // Both sides of communication!
579 //=============================================================================
580
581 //-----------------------------------------------------------------------------
582 // Record the sequence of commands sent by the reader to the tag, with
583 // triggering so that we start recording at the point that the tag is moved
584 // near the reader.
585 //-----------------------------------------------------------------------------
586 void RAMFUNC SnoopIClass(void) {
587
588 // We won't start recording the frames that we acquire until we trigger;
589 // a good trigger condition to get started is probably when we see a
590 // response from the tag.
591 //int triggered = false; // false to wait first for card
592
593 // The command (reader -> tag) that we're receiving.
594 // The length of a received command will in most cases be no more than 18 bytes.
595 // So 32 should be enough!
596 #define ICLASS_BUFFER_SIZE 32
597 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
598 // The response (tag -> reader) that we're receiving.
599 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
600
601 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
602
603 // free all BigBuf memory
604 BigBuf_free();
605 // The DMA buffer, used to stream samples from the FPGA
606 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
607
608 set_tracing(true);
609 clear_trace();
610 iso14a_set_trigger(false);
611
612 int lastRxCounter;
613 uint8_t *upTo;
614 int smpl;
615 int maxBehindBy = 0;
616
617 // Count of samples received so far, so that we can include timing
618 // information in the trace buffer.
619 int samples = 0;
620 rsamples = 0;
621
622 // Set up the demodulator for tag -> reader responses.
623 Demod.output = tagToReaderResponse;
624 Demod.len = 0;
625 Demod.state = DEMOD_UNSYNCD;
626
627 // Setup for the DMA.
628 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
629 upTo = dmaBuf;
630 lastRxCounter = DMA_BUFFER_SIZE;
631 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
632
633 // And the reader -> tag commands
634 memset(&Uart, 0, sizeof(Uart));
635 Uart.output = readerToTagCmd;
636 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
637 Uart.state = STATE_UNSYNCD;
638
639 // And put the FPGA in the appropriate mode
640 // Signal field is off with the appropriate LED
641 LED_D_OFF();
642 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
643 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
644
645 uint32_t time_0 = GetCountSspClk();
646 uint32_t time_start = 0;
647 uint32_t time_stop = 0;
648
649 int div = 0;
650 //int div2 = 0;
651 int decbyte = 0;
652 int decbyter = 0;
653
654 // And now we loop, receiving samples.
655 for (;;) {
656 LED_A_ON();
657 WDT_HIT();
658 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1);
659 if (behindBy > maxBehindBy) {
660 maxBehindBy = behindBy;
661 if (behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
662 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
663 goto done;
664 }
665 }
666 if (behindBy < 1) continue;
667
668 LED_A_OFF();
669 smpl = upTo[0];
670 upTo++;
671 lastRxCounter -= 1;
672 if (upTo - dmaBuf > DMA_BUFFER_SIZE) {
673 upTo -= DMA_BUFFER_SIZE;
674 lastRxCounter += DMA_BUFFER_SIZE;
675 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
676 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
677 }
678
679 //samples += 4;
680 samples += 1;
681
682 if (smpl & 0xF) {
683 decbyte ^= (1 << (3 - div));
684 }
685
686 // FOR READER SIDE COMMUMICATION...
687
688 decbyter <<= 2;
689 decbyter ^= (smpl & 0x30);
690
691 div++;
692
693 if ((div + 1) % 2 == 0) {
694 smpl = decbyter;
695 if (OutOfNDecoding((smpl & 0xF0) >> 4)) {
696 rsamples = samples - Uart.samples;
697 time_stop = (GetCountSspClk()-time_0) << 4;
698
699 //if (!LogTrace(Uart.output, Uart.byteCnt, rsamples, Uart.parityBits,true)) break;
700 //if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, true)) break;
701 uint8_t parity[MAX_PARITY_SIZE];
702 GetParity(Uart.output, Uart.byteCnt, parity);
703 LogTrace_ISO15693(Uart.output, Uart.byteCnt, time_start*32, time_stop*32, parity, true);
704
705 /* And ready to receive another command. */
706 Uart.state = STATE_UNSYNCD;
707 /* And also reset the demod code, which might have been */
708 /* false-triggered by the commands from the reader. */
709 Demod.state = DEMOD_UNSYNCD;
710 Uart.byteCnt = 0;
711 } else {
712 time_start = (GetCountSspClk()-time_0) << 4;
713 }
714 decbyter = 0;
715 }
716
717 if (div > 3) {
718 smpl = decbyte;
719 if (ManchesterDecoding(smpl & 0x0F)) {
720 time_stop = (GetCountSspClk()-time_0) << 4;
721
722 rsamples = samples - Demod.samples;
723
724 uint8_t parity[MAX_PARITY_SIZE];
725 GetParity(Demod.output, Demod.len, parity);
726 LogTrace_ISO15693(Demod.output, Demod.len, time_start*32, time_stop*32, parity, false);
727
728 // And ready to receive another response.
729 memset(&Demod, 0, sizeof(Demod));
730 Demod.output = tagToReaderResponse;
731 Demod.state = DEMOD_UNSYNCD;
732 } else {
733 time_start = (GetCountSspClk()-time_0) << 4;
734 }
735
736 div = 0;
737 decbyte = 0x00;
738 }
739
740 if (BUTTON_PRESS()) {
741 DbpString("cancelled_a");
742 goto done;
743 }
744 }
745
746 DbpString("COMMAND FINISHED");
747
748 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
749 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
750
751 done:
752 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
753 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
754 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
755 LEDsoff();
756 }
757
758 void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
759 int i;
760 for (i = 0; i < 8; i++) {
761 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
762 }
763 }
764
765 // Encode SOF only
766 static void CodeIClassTagSOF() {
767 ToSendReset();
768 ToSend[++ToSendMax] = 0x1D;
769 ToSendMax++;
770 }
771
772 static void AppendCrc(uint8_t *data, int len) {
773 ComputeCrc14443(CRC_ICLASS, data, len, data+len, data+len+1);
774 }
775
776
777 /**
778 * @brief Does the actual simulation
779 */
780 int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
781
782 // free eventually allocated BigBuf memory
783 BigBuf_free_keep_EM();
784
785 uint16_t page_size = 32 * 8;
786 uint8_t current_page = 0;
787
788 // maintain cipher states for both credit and debit key for each page
789 State cipher_state_KC[8];
790 State cipher_state_KD[8];
791 State *cipher_state = &cipher_state_KD[0];
792
793 uint8_t *emulator = BigBuf_get_EM_addr();
794 uint8_t *csn = emulator;
795
796 // CSN followed by two CRC bytes
797 uint8_t anticoll_data[10];
798 uint8_t csn_data[10];
799 memcpy(csn_data, csn, sizeof(csn_data));
800 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x", csn[0], csn[1], csn[2], csn[3], csn[4], csn[5], csn[6], csn[7]);
801
802 // Construct anticollision-CSN
803 rotateCSN(csn_data, anticoll_data);
804
805 // Compute CRC on both CSNs
806 AppendCrc(anticoll_data, 8);
807 AppendCrc(csn_data, 8);
808
809 uint8_t diversified_key_d[8] = { 0x00 };
810 uint8_t diversified_key_c[8] = { 0x00 };
811 uint8_t *diversified_key = diversified_key_d;
812
813 // configuration block
814 uint8_t conf_block[10] = {0x12, 0xFF, 0xFF, 0xFF, 0x7F, 0x1F, 0xFF, 0x3C, 0x00, 0x00};
815
816 // e-Purse
817 uint8_t card_challenge_data[8] = { 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
818
819 if (simulationMode == ICLASS_SIM_MODE_FULL) {
820 // initialize from page 0
821 memcpy(conf_block, emulator + 8 * 1, 8);
822 memcpy(card_challenge_data, emulator + 8 * 2, 8); // e-purse
823 memcpy(diversified_key_d, emulator + 8 * 3, 8); // Kd
824 memcpy(diversified_key_c, emulator + 8 * 4, 8); // Kc
825 }
826
827 AppendCrc(conf_block, 8);
828
829 // save card challenge for sim2,4 attack
830 if (reader_mac_buf != NULL) {
831 memcpy(reader_mac_buf, card_challenge_data, 8);
832 }
833
834 if (conf_block[5] & 0x80) {
835 page_size = 256 * 8;
836 }
837
838 // From PicoPass DS:
839 // When the page is in personalization mode this bit is equal to 1.
840 // Once the application issuer has personalized and coded its dedicated areas, this bit must be set to 0:
841 // the page is then "in application mode".
842 bool personalization_mode = conf_block[7] & 0x80;
843
844 // chip memory may be divided in 8 pages
845 uint8_t max_page = conf_block[4] & 0x10 ? 0 : 7;
846
847 // Precalculate the cipher states, feeding it the CC
848 cipher_state_KD[0] = opt_doTagMAC_1(card_challenge_data, diversified_key_d);
849 cipher_state_KC[0] = opt_doTagMAC_1(card_challenge_data, diversified_key_c);
850 if (simulationMode == ICLASS_SIM_MODE_FULL) {
851 for (int i = 1; i < max_page; i++) {
852 uint8_t *epurse = emulator + i*page_size + 8*2;
853 uint8_t *Kd = emulator + i*page_size + 8*3;
854 uint8_t *Kc = emulator + i*page_size + 8*4;
855 cipher_state_KD[i] = opt_doTagMAC_1(epurse, Kd);
856 cipher_state_KC[i] = opt_doTagMAC_1(epurse, Kc);
857 }
858 }
859
860 int exitLoop = 0;
861 // Reader 0a
862 // Tag 0f
863 // Reader 0c
864 // Tag anticoll. CSN
865 // Reader 81 anticoll. CSN
866 // Tag CSN
867
868 uint8_t *modulated_response;
869 int modulated_response_size = 0;
870 uint8_t *trace_data = NULL;
871 int trace_data_size = 0;
872
873 // Respond SOF -- takes 1 bytes
874 uint8_t *resp_sof = BigBuf_malloc(1);
875 int resp_sof_Len;
876
877 // Anticollision CSN (rotated CSN)
878 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
879 uint8_t *resp_anticoll = BigBuf_malloc(22);
880 int resp_anticoll_len;
881
882 // CSN (block 0)
883 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
884 uint8_t *resp_csn = BigBuf_malloc(22);
885 int resp_csn_len;
886
887 // configuration (block 1) picopass 2ks
888 uint8_t *resp_conf = BigBuf_malloc(22);
889 int resp_conf_len;
890
891 // e-Purse (block 2)
892 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
893 uint8_t *resp_cc = BigBuf_malloc(18);
894 int resp_cc_len;
895
896 // Kd, Kc (blocks 3 and 4). Cannot be read. Always respond with 0xff bytes only
897 uint8_t *resp_ff = BigBuf_malloc(22);
898 int resp_ff_len;
899 uint8_t ff_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
900 AppendCrc(ff_data, 8);
901
902 // Application Issuer Area (block 5)
903 uint8_t *resp_aia = BigBuf_malloc(22);
904 int resp_aia_len;
905 uint8_t aia_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
906 AppendCrc(aia_data, 8);
907
908 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
909 int len;
910
911 // Prepare card messages
912
913 // First card answer: SOF only
914 CodeIClassTagSOF();
915 memcpy(resp_sof, ToSend, ToSendMax);
916 resp_sof_Len = ToSendMax;
917
918 // Anticollision CSN
919 CodeIso15693AsTag(anticoll_data, sizeof(anticoll_data));
920 memcpy(resp_anticoll, ToSend, ToSendMax);
921 resp_anticoll_len = ToSendMax;
922
923 // CSN (block 0)
924 CodeIso15693AsTag(csn_data, sizeof(csn_data));
925 memcpy(resp_csn, ToSend, ToSendMax);
926 resp_csn_len = ToSendMax;
927
928 // Configuration (block 1)
929 CodeIso15693AsTag(conf_block, sizeof(conf_block));
930 memcpy(resp_conf, ToSend, ToSendMax);
931 resp_conf_len = ToSendMax;
932
933 // e-Purse (block 2)
934 CodeIso15693AsTag(card_challenge_data, sizeof(card_challenge_data));
935 memcpy(resp_cc, ToSend, ToSendMax);
936 resp_cc_len = ToSendMax;
937
938 // Kd, Kc (blocks 3 and 4)
939 CodeIso15693AsTag(ff_data, sizeof(ff_data));
940 memcpy(resp_ff, ToSend, ToSendMax);
941 resp_ff_len = ToSendMax;
942
943 // Application Issuer Area (block 5)
944 CodeIso15693AsTag(aia_data, sizeof(aia_data));
945 memcpy(resp_aia, ToSend, ToSendMax);
946 resp_aia_len = ToSendMax;
947
948 //This is used for responding to READ-block commands or other data which is dynamically generated
949 uint8_t *data_generic_trace = BigBuf_malloc(32 + 2); // 32 bytes data + 2byte CRC is max tag answer
950 uint8_t *data_response = BigBuf_malloc( (32 + 2) * 2 + 2);
951
952 bool buttonPressed = false;
953 enum { IDLE, ACTIVATED, SELECTED, HALTED } chip_state = IDLE;
954
955 while (!exitLoop) {
956 WDT_HIT();
957
958 uint32_t reader_eof_time = 0;
959 len = GetIso15693CommandFromReader(receivedCmd, MAX_FRAME_SIZE, &reader_eof_time);
960 if (len < 0) {
961 buttonPressed = true;
962 break;
963 }
964
965 // Now look at the reader command and provide appropriate responses
966 // default is no response:
967 modulated_response = NULL;
968 modulated_response_size = 0;
969 trace_data = NULL;
970 trace_data_size = 0;
971
972 if (receivedCmd[0] == ICLASS_CMD_ACTALL && len == 1) {
973 // Reader in anticollision phase
974 if (chip_state != HALTED) {
975 modulated_response = resp_sof;
976 modulated_response_size = resp_sof_Len;
977 chip_state = ACTIVATED;
978 }
979
980 } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) { // identify
981 // Reader asks for anticollision CSN
982 if (chip_state == SELECTED || chip_state == ACTIVATED) {
983 modulated_response = resp_anticoll;
984 modulated_response_size = resp_anticoll_len;
985 trace_data = anticoll_data;
986 trace_data_size = sizeof(anticoll_data);
987 }
988
989 } else if (receivedCmd[0] == ICLASS_CMD_SELECT && len == 9) {
990 // Reader selects anticollision CSN.
991 // Tag sends the corresponding real CSN
992 if (chip_state == ACTIVATED || chip_state == SELECTED) {
993 if (!memcmp(receivedCmd+1, anticoll_data, 8)) {
994 modulated_response = resp_csn;
995 modulated_response_size = resp_csn_len;
996 trace_data = csn_data;
997 trace_data_size = sizeof(csn_data);
998 chip_state = SELECTED;
999 } else {
1000 chip_state = IDLE;
1001 }
1002 } else if (chip_state == HALTED) {
1003 // RESELECT with CSN
1004 if (!memcmp(receivedCmd+1, csn_data, 8)) {
1005 modulated_response = resp_csn;
1006 modulated_response_size = resp_csn_len;
1007 trace_data = csn_data;
1008 trace_data_size = sizeof(csn_data);
1009 chip_state = SELECTED;
1010 }
1011 }
1012
1013 } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4) { // read block
1014 uint16_t blockNo = receivedCmd[1];
1015 if (chip_state == SELECTED) {
1016 if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
1017 // provide defaults for blocks 0 ... 5
1018 switch (blockNo) {
1019 case 0: // csn (block 00)
1020 modulated_response = resp_csn;
1021 modulated_response_size = resp_csn_len;
1022 trace_data = csn_data;
1023 trace_data_size = sizeof(csn_data);
1024 break;
1025 case 1: // configuration (block 01)
1026 modulated_response = resp_conf;
1027 modulated_response_size = resp_conf_len;
1028 trace_data = conf_block;
1029 trace_data_size = sizeof(conf_block);
1030 break;
1031 case 2: // e-purse (block 02)
1032 modulated_response = resp_cc;
1033 modulated_response_size = resp_cc_len;
1034 trace_data = card_challenge_data;
1035 trace_data_size = sizeof(card_challenge_data);
1036 // set epurse of sim2,4 attack
1037 if (reader_mac_buf != NULL) {
1038 memcpy(reader_mac_buf, card_challenge_data, 8);
1039 }
1040 break;
1041 case 3:
1042 case 4: // Kd, Kc, always respond with 0xff bytes
1043 modulated_response = resp_ff;
1044 modulated_response_size = resp_ff_len;
1045 trace_data = ff_data;
1046 trace_data_size = sizeof(ff_data);
1047 break;
1048 case 5: // Application Issuer Area (block 05)
1049 modulated_response = resp_aia;
1050 modulated_response_size = resp_aia_len;
1051 trace_data = aia_data;
1052 trace_data_size = sizeof(aia_data);
1053 break;
1054 // default: don't respond
1055 }
1056 } else if (simulationMode == ICLASS_SIM_MODE_FULL) {
1057 if (blockNo == 3 || blockNo == 4) { // Kd, Kc, always respond with 0xff bytes
1058 modulated_response = resp_ff;
1059 modulated_response_size = resp_ff_len;
1060 trace_data = ff_data;
1061 trace_data_size = sizeof(ff_data);
1062 } else { // use data from emulator memory
1063 memcpy(data_generic_trace, emulator + current_page*page_size + 8*blockNo, 8);
1064 AppendCrc(data_generic_trace, 8);
1065 trace_data = data_generic_trace;
1066 trace_data_size = 10;
1067 CodeIso15693AsTag(trace_data, trace_data_size);
1068 memcpy(data_response, ToSend, ToSendMax);
1069 modulated_response = data_response;
1070 modulated_response_size = ToSendMax;
1071 }
1072 }
1073 }
1074
1075 } else if ((receivedCmd[0] == ICLASS_CMD_READCHECK_KD
1076 || receivedCmd[0] == ICLASS_CMD_READCHECK_KC) && receivedCmd[1] == 0x02 && len == 2) {
1077 // Read e-purse (88 02 || 18 02)
1078 if (chip_state == SELECTED) {
1079 if(receivedCmd[0] == ICLASS_CMD_READCHECK_KD){
1080 cipher_state = &cipher_state_KD[current_page];
1081 diversified_key = diversified_key_d;
1082 } else {
1083 cipher_state = &cipher_state_KC[current_page];
1084 diversified_key = diversified_key_c;
1085 }
1086 modulated_response = resp_cc;
1087 modulated_response_size = resp_cc_len;
1088 trace_data = card_challenge_data;
1089 trace_data_size = sizeof(card_challenge_data);
1090 }
1091
1092 } else if ((receivedCmd[0] == ICLASS_CMD_CHECK_KC
1093 || receivedCmd[0] == ICLASS_CMD_CHECK_KD) && len == 9) {
1094 // Reader random and reader MAC!!!
1095 if (chip_state == SELECTED) {
1096 if (simulationMode == ICLASS_SIM_MODE_FULL) {
1097 //NR, from reader, is in receivedCmd+1
1098 opt_doTagMAC_2(*cipher_state, receivedCmd+1, data_generic_trace, diversified_key);
1099 trace_data = data_generic_trace;
1100 trace_data_size = 4;
1101 CodeIso15693AsTag(trace_data, trace_data_size);
1102 memcpy(data_response, ToSend, ToSendMax);
1103 modulated_response = data_response;
1104 modulated_response_size = ToSendMax;
1105 //exitLoop = true;
1106 } else { // Not fullsim, we don't respond
1107 // We do not know what to answer, so lets keep quiet
1108 if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
1109 if (reader_mac_buf != NULL) {
1110 // save NR and MAC for sim 2,4
1111 memcpy(reader_mac_buf + 8, receivedCmd + 1, 8);
1112 }
1113 exitLoop = true;
1114 }
1115 }
1116 }
1117
1118 } else if (receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1119 if (chip_state == SELECTED) {
1120 // Reader ends the session
1121 modulated_response = resp_sof;
1122 modulated_response_size = resp_sof_Len;
1123 chip_state = HALTED;
1124 }
1125
1126 } else if (simulationMode == ICLASS_SIM_MODE_FULL && receivedCmd[0] == ICLASS_CMD_READ4 && len == 4) { // 0x06
1127 //Read 4 blocks
1128 if (chip_state == SELECTED) {
1129 uint8_t blockNo = receivedCmd[1];
1130 memcpy(data_generic_trace, emulator + current_page*page_size + blockNo*8, 8 * 4);
1131 AppendCrc(data_generic_trace, 8 * 4);
1132 trace_data = data_generic_trace;
1133 trace_data_size = 8 * 4 + 2;
1134 CodeIso15693AsTag(trace_data, trace_data_size);
1135 memcpy(data_response, ToSend, ToSendMax);
1136 modulated_response = data_response;
1137 modulated_response_size = ToSendMax;
1138 }
1139
1140 } else if (receivedCmd[0] == ICLASS_CMD_UPDATE && (len == 12 || len == 14)) {
1141 // We're expected to respond with the data+crc, exactly what's already in the receivedCmd
1142 // receivedCmd is now UPDATE 1b | ADDRESS 1b | DATA 8b | Signature 4b or CRC 2b
1143 if (chip_state == SELECTED) {
1144 uint8_t blockNo = receivedCmd[1];
1145 if (blockNo == 2) { // update e-purse
1146 memcpy(card_challenge_data, receivedCmd+2, 8);
1147 CodeIso15693AsTag(card_challenge_data, sizeof(card_challenge_data));
1148 memcpy(resp_cc, ToSend, ToSendMax);
1149 resp_cc_len = ToSendMax;
1150 cipher_state_KD[current_page] = opt_doTagMAC_1(card_challenge_data, diversified_key_d);
1151 cipher_state_KC[current_page] = opt_doTagMAC_1(card_challenge_data, diversified_key_c);
1152 if (simulationMode == ICLASS_SIM_MODE_FULL) {
1153 memcpy(emulator + current_page*page_size + 8*2, card_challenge_data, 8);
1154 }
1155 } else if (blockNo == 3) { // update Kd
1156 for (int i = 0; i < 8; i++) {
1157 if (personalization_mode) {
1158 diversified_key_d[i] = receivedCmd[2 + i];
1159 } else {
1160 diversified_key_d[i] ^= receivedCmd[2 + i];
1161 }
1162 }
1163 cipher_state_KD[current_page] = opt_doTagMAC_1(card_challenge_data, diversified_key_d);
1164 if (simulationMode == ICLASS_SIM_MODE_FULL) {
1165 memcpy(emulator + current_page*page_size + 8*3, diversified_key_d, 8);
1166 }
1167 } else if (blockNo == 4) { // update Kc
1168 for (int i = 0; i < 8; i++) {
1169 if (personalization_mode) {
1170 diversified_key_c[i] = receivedCmd[2 + i];
1171 } else {
1172 diversified_key_c[i] ^= receivedCmd[2 + i];
1173 }
1174 }
1175 cipher_state_KC[current_page] = opt_doTagMAC_1(card_challenge_data, diversified_key_c);
1176 if (simulationMode == ICLASS_SIM_MODE_FULL) {
1177 memcpy(emulator + current_page*page_size + 8*4, diversified_key_c, 8);
1178 }
1179 } else if (simulationMode == ICLASS_SIM_MODE_FULL) { // update any other data block
1180 memcpy(emulator + current_page*page_size + 8*blockNo, receivedCmd+2, 8);
1181 }
1182 memcpy(data_generic_trace, receivedCmd + 2, 8);
1183 AppendCrc(data_generic_trace, 8);
1184 trace_data = data_generic_trace;
1185 trace_data_size = 10;
1186 CodeIso15693AsTag(trace_data, trace_data_size);
1187 memcpy(data_response, ToSend, ToSendMax);
1188 modulated_response = data_response;
1189 modulated_response_size = ToSendMax;
1190 }
1191
1192 } else if (receivedCmd[0] == ICLASS_CMD_PAGESEL && len == 4) {
1193 // Pagesel
1194 // Chips with a single page will not answer to this command
1195 // Otherwise, we should answer 8bytes (conf block 1) + 2bytes CRC
1196 if (chip_state == SELECTED) {
1197 if (simulationMode == ICLASS_SIM_MODE_FULL && max_page > 0) {
1198 current_page = receivedCmd[1];
1199 memcpy(data_generic_trace, emulator + current_page*page_size + 8*1, 8);
1200 memcpy(diversified_key_d, emulator + current_page*page_size + 8*3, 8);
1201 memcpy(diversified_key_c, emulator + current_page*page_size + 8*4, 8);
1202 cipher_state = &cipher_state_KD[current_page];
1203 personalization_mode = data_generic_trace[7] & 0x80;
1204 AppendCrc(data_generic_trace, 8);
1205 trace_data = data_generic_trace;
1206 trace_data_size = 10;
1207 CodeIso15693AsTag(trace_data, trace_data_size);
1208 memcpy(data_response, ToSend, ToSendMax);
1209 modulated_response = data_response;
1210 modulated_response_size = ToSendMax;
1211 }
1212 }
1213
1214 } else if (receivedCmd[0] == 0x26 && len == 5) {
1215 // standard ISO15693 INVENTORY command. Ignore.
1216
1217 } else {
1218 // don't know how to handle this command
1219 char debug_message[250]; // should be enough
1220 sprintf(debug_message, "Unhandled command (len = %d) received from reader:", len);
1221 for (int i = 0; i < len && strlen(debug_message) < sizeof(debug_message) - 3 - 1; i++) {
1222 sprintf(debug_message + strlen(debug_message), " %02x", receivedCmd[i]);
1223 }
1224 Dbprintf("%s", debug_message);
1225 // Do not respond
1226 }
1227
1228 /**
1229 A legit tag has about 273,4us delay between reader EOT and tag SOF.
1230 **/
1231 if (modulated_response_size > 0) {
1232 uint32_t response_time = reader_eof_time + DELAY_ICLASS_VCD_TO_VICC_SIM;
1233 TransmitTo15693Reader(modulated_response, modulated_response_size, &response_time, 0, false);
1234 LogTrace_ISO15693(trace_data, trace_data_size, response_time*32, response_time*32 + modulated_response_size/2, NULL, false);
1235 }
1236
1237 }
1238
1239 if (buttonPressed)
1240 {
1241 DbpString("Button pressed");
1242 }
1243 return buttonPressed;
1244 }
1245
1246 /**
1247 * @brief SimulateIClass simulates an iClass card.
1248 * @param arg0 type of simulation
1249 * - 0 uses the first 8 bytes in usb data as CSN
1250 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
1251 * in the usb data. This mode collects MAC from the reader, in order to do an offline
1252 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
1253 * - Other : Uses the default CSN (031fec8af7ff12e0)
1254 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
1255 * @param arg2
1256 * @param datain
1257 */
1258 void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain) {
1259
1260 LED_A_ON();
1261
1262 uint32_t simType = arg0;
1263 uint32_t numberOfCSNS = arg1;
1264
1265 // setup hardware for simulation:
1266 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1267 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1268 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1269 LED_D_OFF();
1270 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1271 StartCountSspClk();
1272
1273 // Enable and clear the trace
1274 set_tracing(true);
1275 clear_trace();
1276 //Use the emulator memory for SIM
1277 uint8_t *emulator = BigBuf_get_EM_addr();
1278
1279 if (simType == ICLASS_SIM_MODE_CSN) {
1280 // Use the CSN from commandline
1281 memcpy(emulator, datain, 8);
1282 doIClassSimulation(ICLASS_SIM_MODE_CSN, NULL);
1283 } else if (simType == ICLASS_SIM_MODE_CSN_DEFAULT) {
1284 //Default CSN
1285 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1286 // Use the CSN from commandline
1287 memcpy(emulator, csn_crc, 8);
1288 doIClassSimulation(ICLASS_SIM_MODE_CSN, NULL);
1289 } else if (simType == ICLASS_SIM_MODE_READER_ATTACK) {
1290 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
1291 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
1292 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1293 // in order to collect MAC's from the reader. This can later be used in an offline-attack
1294 // in order to obtain the keys, as in the "dismantling iclass"-paper.
1295 int i;
1296 for (i = 0; i < numberOfCSNS && i*16+16 <= USB_CMD_DATA_SIZE; i++) {
1297 // The usb data is 512 bytes, fitting 32 responses (8 byte CC + 4 Byte NR + 4 Byte MAC = 16 Byte response).
1298 memcpy(emulator, datain+(i*8), 8);
1299 if (doIClassSimulation(ICLASS_SIM_MODE_EXIT_AFTER_MAC, mac_responses+i*16)) {
1300 // Button pressed
1301 break;
1302 }
1303 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1304 datain[i*8+0], datain[i*8+1], datain[i*8+2], datain[i*8+3],
1305 datain[i*8+4], datain[i*8+5], datain[i*8+6], datain[i*8+7]);
1306 Dbprintf("NR,MAC: %02x %02x %02x %02x %02x %02x %02x %02x",
1307 mac_responses[i*16+ 8], mac_responses[i*16+ 9], mac_responses[i*16+10], mac_responses[i*16+11],
1308 mac_responses[i*16+12], mac_responses[i*16+13], mac_responses[i*16+14], mac_responses[i*16+15]);
1309 SpinDelay(100); // give the reader some time to prepare for next CSN
1310 }
1311 cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*16);
1312 } else if (simType == ICLASS_SIM_MODE_FULL) {
1313 //This is 'full sim' mode, where we use the emulator storage for data.
1314 doIClassSimulation(ICLASS_SIM_MODE_FULL, NULL);
1315 } else {
1316 // We may want a mode here where we hardcode the csns to use (from proxclone).
1317 // That will speed things up a little, but not required just yet.
1318 Dbprintf("The mode is not implemented, reserved for future use");
1319 }
1320
1321 Dbprintf("Done...");
1322
1323 LED_A_OFF();
1324 }
1325
1326
1327 /// THE READER CODE
1328
1329 static void ReaderTransmitIClass(uint8_t *frame, int len, uint32_t *start_time) {
1330
1331 CodeIso15693AsReader(frame, len);
1332
1333 TransmitTo15693Tag(ToSend, ToSendMax, start_time);
1334
1335 uint32_t end_time = *start_time + 32*(8*ToSendMax-4); // substract the 4 padding bits after EOF
1336 LogTrace_ISO15693(frame, len, *start_time*4, end_time*4, NULL, true);
1337 }
1338
1339
1340 static bool sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, size_t max_resp_size,
1341 uint8_t expected_size, uint8_t retries, uint32_t start_time, uint32_t *eof_time) {
1342 while (retries-- > 0) {
1343 ReaderTransmitIClass(command, cmdsize, &start_time);
1344 if (expected_size == GetIso15693AnswerFromTag(resp, max_resp_size, ICLASS_READER_TIMEOUT_OTHERS, eof_time)) {
1345 return true;
1346 }
1347 }
1348 return false;//Error
1349 }
1350
1351 /**
1352 * @brief Selects an iclass tag
1353 * @param card_data where the CSN is stored for return
1354 * @return false = fail
1355 * true = success
1356 */
1357 static bool selectIclassTag(uint8_t *card_data, uint32_t *eof_time) {
1358 uint8_t act_all[] = { 0x0a };
1359 uint8_t identify[] = { 0x0c };
1360 uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1361
1362 uint8_t resp[ICLASS_BUFFER_SIZE];
1363
1364 uint32_t start_time = GetCountSspClk();
1365
1366 // Send act_all
1367 ReaderTransmitIClass(act_all, 1, &start_time);
1368 // Card present?
1369 if (GetIso15693AnswerFromTag(resp, sizeof(resp), ICLASS_READER_TIMEOUT_ACTALL, eof_time) < 0) return false;//Fail
1370
1371 //Send Identify
1372 start_time = *eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1373 ReaderTransmitIClass(identify, 1, &start_time);
1374 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1375 uint8_t len = GetIso15693AnswerFromTag(resp, sizeof(resp), ICLASS_READER_TIMEOUT_OTHERS, eof_time);
1376 if (len != 10) return false;//Fail
1377
1378 //Copy the Anti-collision CSN to our select-packet
1379 memcpy(&select[1], resp, 8);
1380 //Select the card
1381 start_time = *eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1382 ReaderTransmitIClass(select, sizeof(select), &start_time);
1383 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1384 len = GetIso15693AnswerFromTag(resp, sizeof(resp), ICLASS_READER_TIMEOUT_OTHERS, eof_time);
1385 if (len != 10) return false;//Fail
1386
1387 //Success - we got CSN
1388 //Save CSN in response data
1389 memcpy(card_data, resp, 8);
1390
1391 return true;
1392 }
1393
1394
1395 // Select an iClass tag and read all blocks which are always readable without authentication
1396 void ReaderIClass(uint8_t arg0) {
1397
1398 LED_A_ON();
1399
1400 uint8_t card_data[6 * 8] = {0};
1401 memset(card_data, 0xFF, sizeof(card_data));
1402 uint8_t resp[ICLASS_BUFFER_SIZE];
1403 //Read conf block CRC(0x01) => 0xfa 0x22
1404 uint8_t readConf[] = {ICLASS_CMD_READ_OR_IDENTIFY, 0x01, 0xfa, 0x22};
1405 //Read e-purse block CRC(0x02) => 0x61 0x10
1406 uint8_t readEpurse[] = {ICLASS_CMD_READ_OR_IDENTIFY, 0x02, 0x61, 0x10};
1407 //Read App Issuer Area block CRC(0x05) => 0xde 0x64
1408 uint8_t readAA[] = {ICLASS_CMD_READ_OR_IDENTIFY, 0x05, 0xde, 0x64};
1409
1410 uint8_t result_status = 0;
1411
1412 // test flags for what blocks to be sure to read
1413 uint8_t flagReadConfig = arg0 & FLAG_ICLASS_READER_CONF;
1414 uint8_t flagReadCC = arg0 & FLAG_ICLASS_READER_CC;
1415 uint8_t flagReadAA = arg0 & FLAG_ICLASS_READER_AA;
1416
1417 set_tracing(true);
1418 clear_trace();
1419 Iso15693InitReader();
1420
1421 StartCountSspClk();
1422 uint32_t start_time = 0;
1423 uint32_t eof_time = 0;
1424
1425 if (selectIclassTag(resp, &eof_time)) {
1426 result_status = FLAG_ICLASS_READER_CSN;
1427 memcpy(card_data, resp, 8);
1428 }
1429
1430 start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1431
1432 //Read block 1, config
1433 if (flagReadConfig) {
1434 if (sendCmdGetResponseWithRetries(readConf, sizeof(readConf), resp, sizeof(resp), 10, 10, start_time, &eof_time)) {
1435 result_status |= FLAG_ICLASS_READER_CONF;
1436 memcpy(card_data+8, resp, 8);
1437 } else {
1438 Dbprintf("Failed to read config block");
1439 }
1440 start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1441 }
1442
1443 //Read block 2, e-purse
1444 if (flagReadCC) {
1445 if (sendCmdGetResponseWithRetries(readEpurse, sizeof(readEpurse), resp, sizeof(resp), 10, 10, start_time, &eof_time)) {
1446 result_status |= FLAG_ICLASS_READER_CC;
1447 memcpy(card_data + (8*2), resp, 8);
1448 } else {
1449 Dbprintf("Failed to read e-purse");
1450 }
1451 start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1452 }
1453
1454 //Read block 5, AA
1455 if (flagReadAA) {
1456 if (sendCmdGetResponseWithRetries(readAA, sizeof(readAA), resp, sizeof(resp), 10, 10, start_time, &eof_time)) {
1457 result_status |= FLAG_ICLASS_READER_AA;
1458 memcpy(card_data + (8*5), resp, 8);
1459 } else {
1460 Dbprintf("Failed to read AA block");
1461 }
1462 }
1463
1464 cmd_send(CMD_ACK, result_status, 0, 0, card_data, sizeof(card_data));
1465
1466 LED_A_OFF();
1467 }
1468
1469
1470 void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
1471
1472 LED_A_ON();
1473
1474 bool use_credit_key = false;
1475 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
1476 uint16_t block_crc_LUT[255] = {0};
1477
1478 //Generate a lookup table for block crc
1479 for (int block = 0; block < 255; block++){
1480 char bl = block;
1481 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1482 }
1483 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
1484
1485 uint8_t readcheck_cc[] = { ICLASS_CMD_READCHECK_KD, 0x02 };
1486 if (use_credit_key)
1487 readcheck_cc[0] = ICLASS_CMD_READCHECK_KC;
1488 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1489 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1490
1491 uint16_t crc = 0;
1492 uint8_t cardsize = 0;
1493 uint8_t mem = 0;
1494
1495 static struct memory_t {
1496 int k16;
1497 int book;
1498 int k2;
1499 int lockauth;
1500 int keyaccess;
1501 } memory;
1502
1503 uint8_t resp[ICLASS_BUFFER_SIZE];
1504
1505 set_tracing(true);
1506 clear_trace();
1507 Iso15693InitReader();
1508
1509 StartCountSspClk();
1510 uint32_t start_time = 0;
1511 uint32_t eof_time = 0;
1512
1513 while (!BUTTON_PRESS()) {
1514
1515 WDT_HIT();
1516
1517 if (!get_tracing()) {
1518 DbpString("Trace full");
1519 break;
1520 }
1521
1522 if (!selectIclassTag(card_data, &eof_time)) continue;
1523
1524 start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1525 if (!sendCmdGetResponseWithRetries(readcheck_cc, sizeof(readcheck_cc), resp, sizeof(resp), 8, 3, start_time, &eof_time)) continue;
1526
1527 // replay captured auth (cc must not have been updated)
1528 memcpy(check+5, MAC, 4);
1529
1530 start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1531 if (!sendCmdGetResponseWithRetries(check, sizeof(check), resp, sizeof(resp), 4, 5, start_time, &eof_time)) {
1532 Dbprintf("Error: Authentication Fail!");
1533 continue;
1534 }
1535
1536 //first get configuration block (block 1)
1537 crc = block_crc_LUT[1];
1538 read[1] = 1;
1539 read[2] = crc >> 8;
1540 read[3] = crc & 0xff;
1541
1542 start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1543 if (!sendCmdGetResponseWithRetries(read, sizeof(read), resp, sizeof(resp), 10, 10, start_time, &eof_time)) {
1544 start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1545 Dbprintf("Dump config (block 1) failed");
1546 continue;
1547 }
1548
1549 mem = resp[5];
1550 memory.k16 = (mem & 0x80);
1551 memory.book = (mem & 0x20);
1552 memory.k2 = (mem & 0x8);
1553 memory.lockauth = (mem & 0x2);
1554 memory.keyaccess = (mem & 0x1);
1555
1556 cardsize = memory.k16 ? 255 : 32;
1557 WDT_HIT();
1558 //Set card_data to all zeroes, we'll fill it with data
1559 memset(card_data, 0x0, USB_CMD_DATA_SIZE);
1560 uint8_t failedRead = 0;
1561 uint32_t stored_data_length = 0;
1562 //then loop around remaining blocks
1563 for (int block = 0; block < cardsize; block++) {
1564 read[1] = block;
1565 crc = block_crc_LUT[block];
1566 read[2] = crc >> 8;
1567 read[3] = crc & 0xff;
1568
1569 start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1570 if (sendCmdGetResponseWithRetries(read, sizeof(read), resp, sizeof(resp), 10, 10, start_time, &eof_time)) {
1571 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1572 block, resp[0], resp[1], resp[2],
1573 resp[3], resp[4], resp[5],
1574 resp[6], resp[7]);
1575
1576 //Fill up the buffer
1577 memcpy(card_data+stored_data_length, resp, 8);
1578 stored_data_length += 8;
1579 if (stored_data_length +8 > USB_CMD_DATA_SIZE) {
1580 //Time to send this off and start afresh
1581 cmd_send(CMD_ACK,
1582 stored_data_length,//data length
1583 failedRead,//Failed blocks?
1584 0,//Not used ATM
1585 card_data, stored_data_length);
1586 //reset
1587 stored_data_length = 0;
1588 failedRead = 0;
1589 }
1590
1591 } else {
1592 failedRead = 1;
1593 stored_data_length += 8;//Otherwise, data becomes misaligned
1594 Dbprintf("Failed to dump block %d", block);
1595 }
1596 }
1597
1598 //Send off any remaining data
1599 if (stored_data_length > 0) {
1600 cmd_send(CMD_ACK,
1601 stored_data_length,//data length
1602 failedRead,//Failed blocks?
1603 0,//Not used ATM
1604 card_data,
1605 stored_data_length);
1606 }
1607 //If we got here, let's break
1608 break;
1609 }
1610 //Signal end of transmission
1611 cmd_send(CMD_ACK,
1612 0,//data length
1613 0,//Failed blocks?
1614 0,//Not used ATM
1615 card_data,
1616 0);
1617
1618 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1619 LED_D_OFF();
1620 LED_A_OFF();
1621 }
1622
1623
1624 void iClass_Check(uint8_t *MAC) {
1625 uint8_t check[9] = {ICLASS_CMD_CHECK_KD, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
1626 uint8_t resp[4];
1627 memcpy(check+5, MAC, 4);
1628 uint32_t eof_time;
1629 bool isOK = sendCmdGetResponseWithRetries(check, sizeof(check), resp, sizeof(resp), 4, 6, 0, &eof_time);
1630 cmd_send(CMD_ACK, isOK, 0, 0, resp, sizeof(resp));
1631 }
1632
1633
1634 void iClass_Readcheck(uint8_t block, bool use_credit_key) {
1635 uint8_t readcheck[2] = {ICLASS_CMD_READCHECK_KD, block};
1636 if (use_credit_key) {
1637 readcheck[0] = ICLASS_CMD_READCHECK_KC;
1638 }
1639 uint8_t resp[8];
1640 uint32_t eof_time;
1641 bool isOK = sendCmdGetResponseWithRetries(readcheck, sizeof(readcheck), resp, sizeof(resp), 8, 6, 0, &eof_time);
1642 cmd_send(CMD_ACK, isOK, 0, 0, resp, sizeof(resp));
1643 }
1644
1645
1646 static bool iClass_ReadBlock(uint8_t blockNo, uint8_t *readdata) {
1647 uint8_t readcmd[] = {ICLASS_CMD_READ_OR_IDENTIFY, blockNo, 0x00, 0x00}; //0x88, 0x00 // can i use 0C?
1648 char bl = blockNo;
1649 uint16_t rdCrc = iclass_crc16(&bl, 1);
1650 readcmd[2] = rdCrc >> 8;
1651 readcmd[3] = rdCrc & 0xff;
1652 uint8_t resp[10];
1653 bool isOK = false;
1654 uint32_t eof_time;
1655
1656 isOK = sendCmdGetResponseWithRetries(readcmd, sizeof(readcmd), resp, sizeof(resp), 10, 10, 0, &eof_time);
1657 memcpy(readdata, resp, sizeof(resp));
1658
1659 return isOK;
1660 }
1661
1662
1663 void iClass_ReadBlk(uint8_t blockno) {
1664
1665 LED_A_ON();
1666
1667 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1668 bool isOK = false;
1669 isOK = iClass_ReadBlock(blockno, readblockdata);
1670 cmd_send(CMD_ACK, isOK, 0, 0, readblockdata, 8);
1671 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1672 LED_D_OFF();
1673
1674 LED_A_OFF();
1675 }
1676
1677 void iClass_Dump(uint8_t blockno, uint8_t numblks) {
1678
1679 LED_A_ON();
1680
1681 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1682 bool isOK = false;
1683 uint8_t blkCnt = 0;
1684
1685 BigBuf_free();
1686 uint8_t *dataout = BigBuf_malloc(255*8);
1687 if (dataout == NULL) {
1688 Dbprintf("out of memory");
1689 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1690 LED_D_OFF();
1691 cmd_send(CMD_ACK, 0, 1, 0, 0, 0);
1692 LED_A_OFF();
1693 return;
1694 }
1695 memset(dataout, 0xFF, 255*8);
1696
1697 for ( ; blkCnt < numblks; blkCnt++) {
1698 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1699 if (!isOK || (readblockdata[0] == 0xBB || readblockdata[7] == 0xBB || readblockdata[2] == 0xBB)) { //try again
1700 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1701 if (!isOK) {
1702 Dbprintf("Block %02X failed to read", blkCnt+blockno);
1703 break;
1704 }
1705 }
1706 memcpy(dataout + (blkCnt*8), readblockdata, 8);
1707 }
1708 //return pointer to dump memory in arg3
1709 cmd_send(CMD_ACK, isOK, blkCnt, BigBuf_max_traceLen(), 0, 0);
1710
1711 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1712 LED_D_OFF();
1713 BigBuf_free();
1714
1715 LED_A_OFF();
1716 }
1717
1718
1719 static bool iClass_WriteBlock_ext(uint8_t blockNo, uint8_t *data) {
1720
1721 LED_A_ON();
1722
1723 uint8_t write[] = { ICLASS_CMD_UPDATE, blockNo, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1724 //uint8_t readblockdata[10];
1725 //write[1] = blockNo;
1726 memcpy(write+2, data, 12); // data + mac
1727 char *wrCmd = (char *)(write+1);
1728 uint16_t wrCrc = iclass_crc16(wrCmd, 13);
1729 write[14] = wrCrc >> 8;
1730 write[15] = wrCrc & 0xff;
1731 uint8_t resp[10];
1732 bool isOK = false;
1733 uint32_t eof_time = 0;
1734
1735 isOK = sendCmdGetResponseWithRetries(write, sizeof(write), resp, sizeof(resp), 10, 10, 0, &eof_time);
1736 uint32_t start_time = eof_time + DELAY_ICLASS_VICC_TO_VCD_READER;
1737 if (isOK) { //if reader responded correctly
1738 //Dbprintf("WriteResp: %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X",resp[0],resp[1],resp[2],resp[3],resp[4],resp[5],resp[6],resp[7],resp[8],resp[9]);
1739 if (memcmp(write+2, resp, 8)) { //if response is not equal to write values
1740 if (blockNo != 3 && blockNo != 4) { //if not programming key areas (note key blocks don't get programmed with actual key data it is xor data)
1741 //error try again
1742 isOK = sendCmdGetResponseWithRetries(write, sizeof(write), resp, sizeof(resp), 10, 10, start_time, &eof_time);
1743 }
1744 }
1745 }
1746
1747 LED_A_OFF();
1748
1749 return isOK;
1750 }
1751
1752
1753 void iClass_WriteBlock(uint8_t blockNo, uint8_t *data) {
1754
1755 LED_A_ON();
1756
1757 bool isOK = iClass_WriteBlock_ext(blockNo, data);
1758 if (isOK){
1759 Dbprintf("Write block [%02x] successful", blockNo);
1760 } else {
1761 Dbprintf("Write block [%02x] failed", blockNo);
1762 }
1763 cmd_send(CMD_ACK, isOK, 0, 0, 0, 0);
1764
1765 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1766 LED_D_OFF();
1767
1768 LED_A_OFF();
1769 }
1770
1771 void iClass_Clone(uint8_t startblock, uint8_t endblock, uint8_t *data) {
1772 int i;
1773 int written = 0;
1774 int total_block = (endblock - startblock) + 1;
1775 for (i = 0; i < total_block; i++) {
1776 // block number
1777 if (iClass_WriteBlock_ext(i+startblock, data + (i*12))){
1778 Dbprintf("Write block [%02x] successful", i + startblock);
1779 written++;
1780 } else {
1781 if (iClass_WriteBlock_ext(i+startblock, data + (i*12))){
1782 Dbprintf("Write block [%02x] successful", i + startblock);
1783 written++;
1784 } else {
1785 Dbprintf("Write block [%02x] failed", i + startblock);
1786 }
1787 }
1788 }
1789 if (written == total_block)
1790 Dbprintf("Clone complete");
1791 else
1792 Dbprintf("Clone incomplete");
1793
1794 cmd_send(CMD_ACK, 1, 0, 0, 0, 0);
1795 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1796 LED_D_OFF();
1797 LED_A_OFF();
1798 }
Proxmark3 GIT tracking
Impressum, Datenschutz