#define ICLASS_READER_TIMEOUT_UPDATE 3390 // 16000us, nominal 4-15ms
#define ICLASS_READER_TIMEOUT_OTHERS 80 // 380us, nominal 330us
+#define ICLASS_BUFFER_SIZE 34 // we expect max 34 bytes as tag answer (response to READ4)
-//-----------------------------------------------------------------------------
-// The software UART that receives commands from the reader, and its state
-// variables.
-//-----------------------------------------------------------------------------
-static struct {
- enum {
- STATE_UNSYNCD,
- STATE_START_OF_COMMUNICATION,
- STATE_RECEIVING
- } state;
- uint16_t shiftReg;
- int bitCnt;
- int byteCnt;
- int byteCntMax;
- int posCnt;
- int nOutOfCnt;
- int OutOfCnt;
- int syncBit;
- int samples;
- int highCnt;
- int swapper;
- int counter;
- int bitBuffer;
- int dropPosition;
- uint8_t *output;
-} Uart;
-
-static RAMFUNC int OutOfNDecoding(int bit) {
- //int error = 0;
- int bitright;
-
- if (!Uart.bitBuffer) {
- Uart.bitBuffer = bit ^ 0xFF0;
- return false;
- } else {
- Uart.bitBuffer <<= 4;
- Uart.bitBuffer ^= bit;
- }
-
- /*if (Uart.swapper) {
- Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
- Uart.byteCnt++;
- Uart.swapper = 0;
- if (Uart.byteCnt > 15) { return true; }
- }
- else {
- Uart.swapper = 1;
- }*/
-
- if (Uart.state != STATE_UNSYNCD) {
- Uart.posCnt++;
-
- if ((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
- bit = 0x00;
- } else {
- bit = 0x01;
- }
- if (((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
- bitright = 0x00;
- } else {
- bitright = 0x01;
- }
- if (bit != bitright) {
- bit = bitright;
- }
-
-
- // So, now we only have to deal with *bit*, lets see...
- if (Uart.posCnt == 1) {
- // measurement first half bitperiod
- if (!bit) {
- // Drop in first half means that we are either seeing
- // an SOF or an EOF.
-
- if (Uart.nOutOfCnt == 1) {
- // End of Communication
- Uart.state = STATE_UNSYNCD;
- Uart.highCnt = 0;
- if (Uart.byteCnt == 0) {
- // Its not straightforward to show single EOFs
- // So just leave it and do not return true
- Uart.output[0] = 0xf0;
- Uart.byteCnt++;
- } else {
- return true;
- }
- } else if (Uart.state != STATE_START_OF_COMMUNICATION) {
- // When not part of SOF or EOF, it is an error
- Uart.state = STATE_UNSYNCD;
- Uart.highCnt = 0;
- //error = 4;
- }
- }
- } else {
- // measurement second half bitperiod
- // Count the bitslot we are in... (ISO 15693)
- Uart.nOutOfCnt++;
-
- if (!bit) {
- if (Uart.dropPosition) {
- if (Uart.state == STATE_START_OF_COMMUNICATION) {
- //error = 1;
- } else {
- //error = 7;
- }
- // It is an error if we already have seen a drop in current frame
- Uart.state = STATE_UNSYNCD;
- Uart.highCnt = 0;
- } else {
- Uart.dropPosition = Uart.nOutOfCnt;
- }
- }
-
- Uart.posCnt = 0;
-
-
- if (Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
- Uart.nOutOfCnt = 0;
-
- if (Uart.state == STATE_START_OF_COMMUNICATION) {
- if (Uart.dropPosition == 4) {
- Uart.state = STATE_RECEIVING;
- Uart.OutOfCnt = 256;
- } else if (Uart.dropPosition == 3) {
- Uart.state = STATE_RECEIVING;
- Uart.OutOfCnt = 4;
- //Uart.output[Uart.byteCnt] = 0xdd;
- //Uart.byteCnt++;
- } else {
- Uart.state = STATE_UNSYNCD;
- Uart.highCnt = 0;
- }
- Uart.dropPosition = 0;
- } else {
- // RECEIVING DATA
- // 1 out of 4
- if (!Uart.dropPosition) {
- Uart.state = STATE_UNSYNCD;
- Uart.highCnt = 0;
- //error = 9;
- } else {
- Uart.shiftReg >>= 2;
-
- // Swap bit order
- Uart.dropPosition--;
- //if (Uart.dropPosition == 1) { Uart.dropPosition = 2; }
- //else if (Uart.dropPosition == 2) { Uart.dropPosition = 1; }
-
- Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
- Uart.bitCnt += 2;
- Uart.dropPosition = 0;
-
- if (Uart.bitCnt == 8) {
- Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
- Uart.byteCnt++;
- Uart.bitCnt = 0;
- Uart.shiftReg = 0;
- }
- }
- }
- } else if (Uart.nOutOfCnt == Uart.OutOfCnt) {
- // RECEIVING DATA
- // 1 out of 256
- if (!Uart.dropPosition) {
- Uart.state = STATE_UNSYNCD;
- Uart.highCnt = 0;
- //error = 3;
- } else {
- Uart.dropPosition--;
- Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
- Uart.byteCnt++;
- Uart.bitCnt = 0;
- Uart.shiftReg = 0;
- Uart.nOutOfCnt = 0;
- Uart.dropPosition = 0;
- }
- }
-
- /*if (error) {
- Uart.output[Uart.byteCnt] = 0xAA;
- Uart.byteCnt++;
- Uart.output[Uart.byteCnt] = error & 0xFF;
- Uart.byteCnt++;
- Uart.output[Uart.byteCnt] = 0xAA;
- Uart.byteCnt++;
- Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
- Uart.byteCnt++;
- Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
- Uart.byteCnt++;
- Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
- Uart.byteCnt++;
- Uart.output[Uart.byteCnt] = 0xAA;
- Uart.byteCnt++;
- return true;
- }*/
- }
-
- } else {
- bit = Uart.bitBuffer & 0xf0;
- bit >>= 4;
- bit ^= 0x0F; // drops become 1s ;-)
- if (bit) {
- // should have been high or at least (4 * 128) / fc
- // according to ISO this should be at least (9 * 128 + 20) / fc
- if (Uart.highCnt == 8) {
- // we went low, so this could be start of communication
- // it turns out to be safer to choose a less significant
- // syncbit... so we check whether the neighbour also represents the drop
- Uart.posCnt = 1; // apparently we are busy with our first half bit period
- Uart.syncBit = bit & 8;
- Uart.samples = 3;
- if (!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
- else if (bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
- if (!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
- else if (bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
- if (!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
- if (Uart.syncBit && (Uart.bitBuffer & 8)) {
- Uart.syncBit = 8;
-
- // the first half bit period is expected in next sample
- Uart.posCnt = 0;
- Uart.samples = 3;
- }
- } else if (bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
-
- Uart.syncBit <<= 4;
- Uart.state = STATE_START_OF_COMMUNICATION;
- Uart.bitCnt = 0;
- Uart.byteCnt = 0;
- Uart.nOutOfCnt = 0;
- Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
- Uart.dropPosition = 0;
- Uart.shiftReg = 0;
- //error = 0;
- } else {
- Uart.highCnt = 0;
- }
- } else if (Uart.highCnt < 8) {
- Uart.highCnt++;
- }
- }
-
- return false;
-}
-
-
-//=============================================================================
-// Manchester
-//=============================================================================
-
-static struct {
- enum {
- DEMOD_UNSYNCD,
- DEMOD_START_OF_COMMUNICATION,
- DEMOD_START_OF_COMMUNICATION2,
- DEMOD_START_OF_COMMUNICATION3,
- DEMOD_SOF_COMPLETE,
- DEMOD_MANCHESTER_D,
- DEMOD_MANCHESTER_E,
- DEMOD_END_OF_COMMUNICATION,
- DEMOD_END_OF_COMMUNICATION2,
- DEMOD_MANCHESTER_F,
- DEMOD_ERROR_WAIT
- } state;
- int bitCount;
- int posCount;
- int syncBit;
- uint16_t shiftReg;
- int buffer;
- int buffer2;
- int buffer3;
- int buff;
- int samples;
- int len;
- enum {
- SUB_NONE,
- SUB_FIRST_HALF,
- SUB_SECOND_HALF,
- SUB_BOTH
- } sub;
- uint8_t *output;
-} Demod;
-
-static RAMFUNC int ManchesterDecoding(int v) {
- int bit;
- int modulation;
- int error = 0;
-
- bit = Demod.buffer;
- Demod.buffer = Demod.buffer2;
- Demod.buffer2 = Demod.buffer3;
- Demod.buffer3 = v;
-
- if (Demod.buff < 3) {
- Demod.buff++;
- return false;
- }
-
- if (Demod.state==DEMOD_UNSYNCD) {
- Demod.output[Demod.len] = 0xfa;
- Demod.syncBit = 0;
- //Demod.samples = 0;
- Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
-
- if (bit & 0x08) {
- Demod.syncBit = 0x08;
- }
-
- if (bit & 0x04) {
- if (Demod.syncBit) {
- bit <<= 4;
- }
- Demod.syncBit = 0x04;
- }
-
- if (bit & 0x02) {
- if (Demod.syncBit) {
- bit <<= 2;
- }
- Demod.syncBit = 0x02;
- }
-
- if (bit & 0x01 && Demod.syncBit) {
- Demod.syncBit = 0x01;
- }
-
- if (Demod.syncBit) {
- Demod.len = 0;
- Demod.state = DEMOD_START_OF_COMMUNICATION;
- Demod.sub = SUB_FIRST_HALF;
- Demod.bitCount = 0;
- Demod.shiftReg = 0;
- Demod.samples = 0;
- if (Demod.posCount) {
- switch (Demod.syncBit) {
- case 0x08: Demod.samples = 3; break;
- case 0x04: Demod.samples = 2; break;
- case 0x02: Demod.samples = 1; break;
- case 0x01: Demod.samples = 0; break;
- }
- // SOF must be long burst... otherwise stay unsynced!!!
- if (!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
- Demod.state = DEMOD_UNSYNCD;
- }
- } else {
- // SOF must be long burst... otherwise stay unsynced!!!
- if (!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
- Demod.state = DEMOD_UNSYNCD;
- error = 0x88;
- }
-
- }
- error = 0;
-
- }
- } else {
- // state is DEMOD is in SYNC from here on.
- modulation = bit & Demod.syncBit;
- modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
-
- Demod.samples += 4;
-
- if (Demod.posCount == 0) {
- Demod.posCount = 1;
- if (modulation) {
- Demod.sub = SUB_FIRST_HALF;
- } else {
- Demod.sub = SUB_NONE;
- }
- } else {
- Demod.posCount = 0;
- if (modulation) {
- if (Demod.sub == SUB_FIRST_HALF) {
- Demod.sub = SUB_BOTH;
- } else {
- Demod.sub = SUB_SECOND_HALF;
- }
- } else if (Demod.sub == SUB_NONE) {
- if (Demod.state == DEMOD_SOF_COMPLETE) {
- Demod.output[Demod.len] = 0x0f;
- Demod.len++;
- Demod.state = DEMOD_UNSYNCD;
- return true;
- } else {
- Demod.state = DEMOD_ERROR_WAIT;
- error = 0x33;
- }
- }
-
- switch(Demod.state) {
- case DEMOD_START_OF_COMMUNICATION:
- if (Demod.sub == SUB_BOTH) {
- Demod.state = DEMOD_START_OF_COMMUNICATION2;
- Demod.posCount = 1;
- Demod.sub = SUB_NONE;
- } else {
- Demod.output[Demod.len] = 0xab;
- Demod.state = DEMOD_ERROR_WAIT;
- error = 0xd2;
- }
- break;
- case DEMOD_START_OF_COMMUNICATION2:
- if (Demod.sub == SUB_SECOND_HALF) {
- Demod.state = DEMOD_START_OF_COMMUNICATION3;
- } else {
- Demod.output[Demod.len] = 0xab;
- Demod.state = DEMOD_ERROR_WAIT;
- error = 0xd3;
- }
- break;
- case DEMOD_START_OF_COMMUNICATION3:
- if (Demod.sub == SUB_SECOND_HALF) {
- Demod.state = DEMOD_SOF_COMPLETE;
- } else {
- Demod.output[Demod.len] = 0xab;
- Demod.state = DEMOD_ERROR_WAIT;
- error = 0xd4;
- }
- break;
- case DEMOD_SOF_COMPLETE:
- case DEMOD_MANCHESTER_D:
- case DEMOD_MANCHESTER_E:
- // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
- // 00001111 = 1 (0 in 14443)
- if (Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
- Demod.bitCount++;
- Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
- Demod.state = DEMOD_MANCHESTER_D;
- } else if (Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
- Demod.bitCount++;
- Demod.shiftReg >>= 1;
- Demod.state = DEMOD_MANCHESTER_E;
- } else if (Demod.sub == SUB_BOTH) {
- Demod.state = DEMOD_MANCHESTER_F;
- } else {
- Demod.state = DEMOD_ERROR_WAIT;
- error = 0x55;
- }
- break;
-
- case DEMOD_MANCHESTER_F:
- // Tag response does not need to be a complete byte!
- if (Demod.len > 0 || Demod.bitCount > 0) {
- if (Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
- Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
- Demod.output[Demod.len] = Demod.shiftReg & 0xff;
- Demod.len++;
- }
-
- Demod.state = DEMOD_UNSYNCD;
- return true;
- } else {
- Demod.output[Demod.len] = 0xad;
- Demod.state = DEMOD_ERROR_WAIT;
- error = 0x03;
- }
- break;
-
- case DEMOD_ERROR_WAIT:
- Demod.state = DEMOD_UNSYNCD;
- break;
-
- default:
- Demod.output[Demod.len] = 0xdd;
- Demod.state = DEMOD_UNSYNCD;
- break;
- }
-
- if (Demod.bitCount >= 8) {
- Demod.shiftReg >>= 1;
- Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
- Demod.len++;
- Demod.bitCount = 0;
- Demod.shiftReg = 0;
- }
-
- if (error) {
- Demod.output[Demod.len] = 0xBB;
- Demod.len++;
- Demod.output[Demod.len] = error & 0xFF;
- Demod.len++;
- Demod.output[Demod.len] = 0xBB;
- Demod.len++;
- Demod.output[Demod.len] = bit & 0xFF;
- Demod.len++;
- Demod.output[Demod.len] = Demod.buffer & 0xFF;
- Demod.len++;
- // Look harder ;-)
- Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
- Demod.len++;
- Demod.output[Demod.len] = Demod.syncBit & 0xFF;
- Demod.len++;
- Demod.output[Demod.len] = 0xBB;
- Demod.len++;
- return true;
- }
-
- }
-
- } // end (state != UNSYNCED)
-
- return false;
-}
//=============================================================================
-// Finally, a `sniffer' for iClass communication
+// A `sniffer' for iClass communication
// Both sides of communication!
//=============================================================================
-
-//-----------------------------------------------------------------------------
-// Record the sequence of commands sent by the reader to the tag, with
-// triggering so that we start recording at the point that the tag is moved
-// near the reader.
-//-----------------------------------------------------------------------------
-void RAMFUNC SnoopIClass(void) {
-
- // We won't start recording the frames that we acquire until we trigger;
- // a good trigger condition to get started is probably when we see a
- // response from the tag.
- //int triggered = false; // false to wait first for card
-
- // The command (reader -> tag) that we're receiving.
- // The length of a received command will in most cases be no more than 18 bytes.
- // So 32 should be enough!
- #define ICLASS_BUFFER_SIZE 32
- uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
- // The response (tag -> reader) that we're receiving.
- uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
-
- FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
-
- // free all BigBuf memory
- BigBuf_free();
- // The DMA buffer, used to stream samples from the FPGA
- uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
-
- set_tracing(true);
- clear_trace();
- iso14a_set_trigger(false);
-
- int lastRxCounter;
- uint8_t *upTo;
- int smpl;
- int maxBehindBy = 0;
-
- // Count of samples received so far, so that we can include timing
- // information in the trace buffer.
- int samples = 0;
- rsamples = 0;
-
- // Set up the demodulator for tag -> reader responses.
- Demod.output = tagToReaderResponse;
- Demod.len = 0;
- Demod.state = DEMOD_UNSYNCD;
-
- // Setup for the DMA.
- FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
- upTo = dmaBuf;
- lastRxCounter = DMA_BUFFER_SIZE;
- FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
-
- // And the reader -> tag commands
- memset(&Uart, 0, sizeof(Uart));
- Uart.output = readerToTagCmd;
- Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
- Uart.state = STATE_UNSYNCD;
-
- // And put the FPGA in the appropriate mode
- // Signal field is off with the appropriate LED
- LED_D_OFF();
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
- SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
-
- uint32_t time_0 = GetCountSspClk();
- uint32_t time_start = 0;
- uint32_t time_stop = 0;
-
- int div = 0;
- //int div2 = 0;
- int decbyte = 0;
- int decbyter = 0;
-
- // And now we loop, receiving samples.
- for (;;) {
- LED_A_ON();
- WDT_HIT();
- int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1);
- if (behindBy > maxBehindBy) {
- maxBehindBy = behindBy;
- if (behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
- Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
- goto done;
- }
- }
- if (behindBy < 1) continue;
-
- LED_A_OFF();
- smpl = upTo[0];
- upTo++;
- lastRxCounter -= 1;
- if (upTo - dmaBuf > DMA_BUFFER_SIZE) {
- upTo -= DMA_BUFFER_SIZE;
- lastRxCounter += DMA_BUFFER_SIZE;
- AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
- AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
- }
-
- //samples += 4;
- samples += 1;
-
- if (smpl & 0xF) {
- decbyte ^= (1 << (3 - div));
- }
-
- // FOR READER SIDE COMMUMICATION...
-
- decbyter <<= 2;
- decbyter ^= (smpl & 0x30);
-
- div++;
-
- if ((div + 1) % 2 == 0) {
- smpl = decbyter;
- if (OutOfNDecoding((smpl & 0xF0) >> 4)) {
- rsamples = samples - Uart.samples;
- time_stop = (GetCountSspClk()-time_0) << 4;
-
- //if (!LogTrace(Uart.output, Uart.byteCnt, rsamples, Uart.parityBits,true)) break;
- //if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, true)) break;
- uint8_t parity[MAX_PARITY_SIZE];
- GetParity(Uart.output, Uart.byteCnt, parity);
- LogTrace_ISO15693(Uart.output, Uart.byteCnt, time_start*32, time_stop*32, parity, true);
-
- /* And ready to receive another command. */
- Uart.state = STATE_UNSYNCD;
- /* And also reset the demod code, which might have been */
- /* false-triggered by the commands from the reader. */
- Demod.state = DEMOD_UNSYNCD;
- Uart.byteCnt = 0;
- } else {
- time_start = (GetCountSspClk()-time_0) << 4;
- }
- decbyter = 0;
- }
-
- if (div > 3) {
- smpl = decbyte;
- if (ManchesterDecoding(smpl & 0x0F)) {
- time_stop = (GetCountSspClk()-time_0) << 4;
-
- rsamples = samples - Demod.samples;
-
- uint8_t parity[MAX_PARITY_SIZE];
- GetParity(Demod.output, Demod.len, parity);
- LogTrace_ISO15693(Demod.output, Demod.len, time_start*32, time_stop*32, parity, false);
-
- // And ready to receive another response.
- memset(&Demod, 0, sizeof(Demod));
- Demod.output = tagToReaderResponse;
- Demod.state = DEMOD_UNSYNCD;
- } else {
- time_start = (GetCountSspClk()-time_0) << 4;
- }
-
- div = 0;
- decbyte = 0x00;
- }
-
- if (BUTTON_PRESS()) {
- DbpString("cancelled_a");
- goto done;
- }
- }
-
- DbpString("COMMAND FINISHED");
-
- Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
- Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
-
-done:
- AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
- Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
- Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
- LEDsoff();
+void SnoopIClass(uint8_t jam_search_len, uint8_t *jam_search_string) {
+ SnoopIso15693(jam_search_len, jam_search_string);
}
+
void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
int i;
for (i = 0; i < 8; i++) {
}
}
+
// Encode SOF only
static void CodeIClassTagSOF() {
ToSendReset();
ToSendMax++;
}
+
static void AppendCrc(uint8_t *data, int len) {
ComputeCrc14443(CRC_ICLASS, data, len, data+len, data+len+1);
}
projects / proxmark3-svn / blobdiff