]> git.zerfleddert.de Git - proxmark3-svn/commitdiff
Add command and code for bidirectional LF emulation of Hitag2. Should be extended...
authorhenryk@ploetzli.ch <henryk@ploetzli.ch@ef4ab9da-24cd-11de-8aaa-f3a34680c41f>
Fri, 28 Aug 2009 21:56:43 +0000 (21:56 +0000)
committerhenryk@ploetzli.ch <henryk@ploetzli.ch@ef4ab9da-24cd-11de-8aaa-f3a34680c41f>
Fri, 28 Aug 2009 21:56:43 +0000 (21:56 +0000)
armsrc/Makefile
armsrc/appmain.c
armsrc/apps.h
armsrc/lfops.c
include/usb_cmd.h
winsrc/command.cpp

index 13e43ba90337465b421e95b5f25d2ba238cef080..00e99b1f42f61eae3c7c0eb432d59f6d6a6a3121 100644 (file)
@@ -14,6 +14,7 @@ THUMBSRC = start.c \
        iso15693.c \\r
        util.c \\r
        version.c \\r
        iso15693.c \\r
        util.c \\r
        version.c \\r
+       hitag2.c \\r
        usb.c\r
 \r
 # These are to be compiled in ARM mode\r
        usb.c\r
 \r
 # These are to be compiled in ARM mode\r
index 9696b008bf3a3103e0fcc8bd835e8e1c97750fb2..59cc6dead3bf6a5bbbf99ad96c15dfae2cc640f7 100644 (file)
@@ -645,6 +645,9 @@ void UsbPacketReceived(BYTE *packet, int len)
                case CMD_VERSION:
                        SendVersion();
                        break;
                case CMD_VERSION:
                        SendVersion();
                        break;
+               case CMD_LF_SIMULATE_BIDIR:
+                       SimulateTagLowFrequencyBidir(c->ext1, c->ext2);
+                       break;
 #ifdef WITH_LCD
                case CMD_LCD_RESET:
                        LCDReset();
 #ifdef WITH_LCD
                case CMD_LCD_RESET:
                        LCDReset();
index 6f146f786a80aed72513da7445d4e73db9f116d6..f07504d25ccc7fbfef9a514d95f2a609ec89d841 100644 (file)
@@ -74,6 +74,7 @@ void AcquireRawBitsTI(void);
 void SimulateTagLowFrequency(int period, int ledcontrol);\r
 void CmdHIDsimTAG(int hi, int lo, int ledcontrol);\r
 void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol);\r
 void SimulateTagLowFrequency(int period, int ledcontrol);\r
 void CmdHIDsimTAG(int hi, int lo, int ledcontrol);\r
 void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol);\r
+void SimulateTagLowFrequencyBidir(int divisor, int max_bitlen);\r
 \r
 /// iso14443.h\r
 void SimulateIso14443Tag(void);\r
 \r
 /// iso14443.h\r
 void SimulateIso14443Tag(void);\r
index f9aee43e0fb095d28acfbb1160dcb040b626f7cc..8ad25ce092dc74a1a3d03b542e3315b8032e5c3c 100644 (file)
@@ -6,6 +6,7 @@
 //-----------------------------------------------------------------------------\r
 #include <proxmark3.h>\r
 #include "apps.h"\r
 //-----------------------------------------------------------------------------\r
 #include <proxmark3.h>\r
 #include "apps.h"\r
+#include "hitag2.h"\r
 #include "../common/crc16.c"\r
 \r
 void AcquireRawAdcSamples125k(BOOL at134khz)\r
 #include "../common/crc16.c"\r
 \r
 void AcquireRawAdcSamples125k(BOOL at134khz)\r
@@ -61,6 +62,10 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
 {\r
        BOOL at134khz;\r
 \r
 {\r
        BOOL at134khz;\r
 \r
+       /* Make sure the tag is reset */\r
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
+       SpinDelay(2500);\r
+       \r
        // see if 'h' was specified\r
        if(command[strlen((char *) command) - 1] == 'h')\r
                at134khz= TRUE;\r
        // see if 'h' was specified\r
        if(command[strlen((char *) command) - 1] == 'h')\r
                at134khz= TRUE;\r
@@ -77,6 +82,8 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
 \r
        // Give it a bit of time for the resonant antenna to settle.\r
        SpinDelay(50);\r
 \r
        // Give it a bit of time for the resonant antenna to settle.\r
        SpinDelay(50);\r
+       // And a little more time for the tag to fully power up\r
+       SpinDelay(2000);\r
 \r
        // Now set up the SSC to get the ADC samples that are now streaming at us.\r
        FpgaSetupSsc();\r
 \r
        // Now set up the SSC to get the ADC samples that are now streaming at us.\r
        FpgaSetupSsc();\r
@@ -95,11 +102,12 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
                }\r
                LED_D_ON();\r
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
                }\r
                LED_D_ON();\r
-               if(*(command++) == '0')\r
+               if(*(command++) == '0') {\r
                        SpinDelayUs(period_0);\r
                        SpinDelayUs(period_0);\r
-               else\r
+               } else {\r
                        SpinDelayUs(period_1);\r
                }\r
                        SpinDelayUs(period_1);\r
                }\r
+               }\r
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
        LED_D_OFF();\r
        SpinDelayUs(delay_off);\r
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
        LED_D_OFF();\r
        SpinDelayUs(delay_off);\r
@@ -478,6 +486,195 @@ void SimulateTagLowFrequency(int period, int ledcontrol)
        }\r
 }\r
 \r
        }\r
 }\r
 \r
+/* Provides a framework for bidirectional LF tag communication\r
+ * Encoding is currently Hitag2, but the general idea can probably\r
+ * be transferred to other encodings.\r
+ * \r
+ * The new FPGA code will, for the LF simulator mode, give on SSC_FRAME\r
+ * (PA15) a thresholded version of the signal from the ADC. Setting the\r
+ * ADC path to the low frequency peak detection signal, will enable a\r
+ * somewhat reasonable receiver for modulation on the carrier signal\r
+ * that is generated by the reader. The signal is low when the reader\r
+ * field is switched off, and high when the reader field is active. Due\r
+ * to the way that the signal looks like, mostly only the rising edge is\r
+ * useful, your mileage may vary.\r
+ * \r
+ * Neat perk: PA15 can not only be used as a bit-banging GPIO, but is also\r
+ * TIOA1, which can be used as the capture input for timer 1. This should\r
+ * make it possible to measure the exact edge-to-edge time, without processor\r
+ * intervention.\r
+ * \r
+ * Arguments: divisor is the divisor to be sent to the FPGA (e.g. 95 for 125kHz)\r
+ * t0 is the carrier frequency cycle duration in terms of MCK (384 for 125kHz)\r
+ * \r
+ * The following defines are in carrier periods: \r
+ */\r
+#define HITAG_T_0_MIN 15 /* T[0] should be 18..22 */ \r
+#define HITAG_T_1_MIN 24 /* T[1] should be 26..30 */\r
+#define HITAG_T_EOF   40 /* T_EOF should be > 36 */\r
+#define HITAG_T_WRESP 208 /* T_wresp should be 204..212 */\r
+\r
+static void hitag_handle_frame(int t0, int frame_len, char *frame);\r
+//#define DEBUG_RA_VALUES 1\r
+#define DEBUG_FRAME_CONTENTS 1\r
+void SimulateTagLowFrequencyBidir(int divisor, int t0)\r
+{\r
+#if DEBUG_RA_VALUES || DEBUG_FRAME_CONTENTS\r
+       int i = 0;\r
+#endif\r
+       char frame[10];\r
+       int frame_pos=0;\r
+       \r
+       DbpString("Starting Hitag2 emulator, press button to end");\r
+       hitag2_init();\r
+       \r
+       /* Set up simulator mode, frequency divisor which will drive the FPGA\r
+        * and analog mux selection.
+        */\r
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_SIMULATOR);\r
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);\r
+       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);\r
+       RELAY_OFF();\r
+       \r
+       /* Set up Timer 1:\r
+        * Capture mode, timer source MCK/2 (TIMER_CLOCK1), TIOA is external trigger,\r
+        * external trigger rising edge, load RA on rising edge of TIOA, load RB on rising\r
+        * edge of TIOA. Assign PA15 to TIOA1 (peripheral B)
+        */\r
+       \r
+       PMC_PERIPHERAL_CLK_ENABLE = (1 << PERIPH_TC1);\r
+       PIO_PERIPHERAL_B_SEL = (1 << GPIO_SSC_FRAME);\r
+       TC1_CCR = TC_CCR_CLKDIS;\r
+       TC1_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_ETRGEDG_RISING | TC_CMR_ABETRG |\r
+               TC_CMR_LDRA_RISING | TC_CMR_LDRB_RISING;\r
+       TC1_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;\r
+       \r
+       /* calculate the new value for the carrier period in terms of TC1 values */\r
+       t0 = t0/2;\r
+       \r
+       int overflow = 0;\r
+       while(!BUTTON_PRESS()) {\r
+               WDT_HIT();\r
+               if(TC1_SR & TC_SR_LDRAS) {\r
+                       int ra = TC1_RA;\r
+                       if((ra > t0*HITAG_T_EOF) | overflow) ra = t0*HITAG_T_EOF+1;\r
+#if DEBUG_RA_VALUES\r
+                       if(ra > 255 || overflow) ra = 255;\r
+                       ((char*)BigBuf)[i] = ra;\r
+                       i = (i+1) % 8000;\r
+#endif\r
+                       \r
+                       if(overflow || (ra > t0*HITAG_T_EOF) || (ra < t0*HITAG_T_0_MIN)) {\r
+                               /* Ignore */\r
+                       } else if(ra >= t0*HITAG_T_1_MIN ) {\r
+                               /* '1' bit */\r
+                               if(frame_pos < 8*sizeof(frame)) {\r
+                                       frame[frame_pos / 8] |= 1<<( 7-(frame_pos%8) );\r
+                                       frame_pos++;\r
+                               }\r
+                       } else if(ra >= t0*HITAG_T_0_MIN) {\r
+                               /* '0' bit */\r
+                               if(frame_pos < 8*sizeof(frame)) {\r
+                                       frame[frame_pos / 8] |= 0<<( 7-(frame_pos%8) );\r
+                                       frame_pos++;\r
+                               }\r
+                       }\r
+                       \r
+                       overflow = 0;\r
+                       LED_D_ON();\r
+               } else {\r
+                       if(TC1_CV > t0*HITAG_T_EOF) {\r
+                               /* Minor nuisance: In Capture mode, the timer can not be\r
+                                * stopped by a Compare C. There's no way to stop the clock\r
+                                * in software, so we'll just have to note the fact that an\r
+                                * overflow happened and the next loaded timer value might\r
+                                * have wrapped. Also, this marks the end of frame, and the\r
+                                * still running counter can be used to determine the correct\r
+                                * time for the start of the reply.
+                                */ \r
+                               overflow = 1;\r
+                               \r
+                               if(frame_pos > 0) {\r
+                                       /* Have a frame, do something with it */\r
+#if DEBUG_FRAME_CONTENTS\r
+                                       ((char*)BigBuf)[i++] = frame_pos;\r
+                                       memcpy( ((char*)BigBuf)+i, frame, 7);\r
+                                       i+=7;\r
+                                       i = i % sizeof(BigBuf);\r
+#endif\r
+                                       hitag_handle_frame(t0, frame_pos, frame);\r
+                                       memset(frame, 0, sizeof(frame));\r
+                               }\r
+                               frame_pos = 0;\r
+\r
+                       }\r
+                       LED_D_OFF();\r
+               }\r
+       }\r
+       DbpString("All done");\r
+}\r
+\r
+static void hitag_send_bit(int t0, int bit) {\r
+       if(bit == 1) {\r
+               /* Manchester: Loaded, then unloaded */\r
+               LED_A_ON();\r
+               SHORT_COIL();\r
+               while(TC1_CV < t0*15);\r
+               OPEN_COIL();\r
+               while(TC1_CV < t0*31);\r
+               LED_A_OFF();\r
+       } else if(bit == 0) {\r
+               /* Manchester: Unloaded, then loaded */\r
+               LED_B_ON();\r
+               OPEN_COIL();\r
+               while(TC1_CV < t0*15);\r
+               SHORT_COIL();\r
+               while(TC1_CV < t0*31);\r
+               LED_B_OFF();\r
+       }\r
+       TC1_CCR = TC_CCR_SWTRG; /* Reset clock for the next bit */\r
+       \r
+}\r
+static void hitag_send_frame(int t0, int frame_len, const char const * frame, int fdt)\r
+{\r
+       OPEN_COIL();\r
+       PIO_OUTPUT_ENABLE = (1 << GPIO_SSC_DOUT);\r
+       \r
+       /* Wait for HITAG_T_WRESP carrier periods after the last reader bit,\r
+        * not that since the clock counts since the rising edge, but T_wresp is\r
+        * with respect to the falling edge, we need to wait actually (T_wresp - T_g)\r
+        * periods. The gap time T_g varies (4..10).
+        */\r
+       while(TC1_CV < t0*(fdt-8));\r
+\r
+       int saved_cmr = TC1_CMR;\r
+       TC1_CMR &= ~TC_CMR_ETRGEDG; /* Disable external trigger for the clock */\r
+       TC1_CCR = TC_CCR_SWTRG; /* Reset the clock and use it for response timing */\r
+       \r
+       int i;\r
+       for(i=0; i<5; i++)\r
+               hitag_send_bit(t0, 1); /* Start of frame */\r
+       \r
+       for(i=0; i<frame_len; i++) {\r
+               hitag_send_bit(t0, !!(frame[i/ 8] & (1<<( 7-(i%8) ))) );\r
+       }\r
+       \r
+       OPEN_COIL();\r
+       TC1_CMR = saved_cmr;\r
+}\r
+\r
+/* Callback structure to cleanly separate tag emulation code from the radio layer. */\r
+static int hitag_cb(const char* response_data, const int response_length, const int fdt, void *cb_cookie)\r
+{\r
+       hitag_send_frame(*(int*)cb_cookie, response_length, response_data, fdt);\r
+       return 0;\r
+}\r
+/* Frame length in bits, frame contents in MSBit first format */\r
+static void hitag_handle_frame(int t0, int frame_len, char *frame)\r
+{\r
+       hitag2_handle_command(frame, frame_len, hitag_cb, &t0);\r
+}\r
+\r
 // compose fc/8 fc/10 waveform\r
 static void fc(int c, int *n) {\r
        BYTE *dest = (BYTE *)BigBuf;\r
 // compose fc/8 fc/10 waveform\r
 static void fc(int c, int *n) {\r
        BYTE *dest = (BYTE *)BigBuf;\r
index b5c438c66d20bb5290c89c26d33852a9e74dcdd1..f58475459563724186d8d96e7481e7bfa8d9f360 100644 (file)
@@ -50,6 +50,7 @@ typedef struct {
 #define CMD_HID_DEMOD_FSK                                                                                                                      0x020B\r
 #define CMD_HID_SIM_TAG                                                                                                                                0x020C\r
 #define CMD_SET_LF_DIVISOR                                                                                                             0x020D\r
 #define CMD_HID_DEMOD_FSK                                                                                                                      0x020B\r
 #define CMD_HID_SIM_TAG                                                                                                                                0x020C\r
 #define CMD_SET_LF_DIVISOR                                                                                                             0x020D\r
+#define CMD_LF_SIMULATE_BIDIR                                                                                                          0x020E\r
 \r
 // For the 13.56 MHz tags\r
 #define CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693                                  0x0300\r
 \r
 // For the 13.56 MHz tags\r
 #define CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693                                  0x0300\r
index 3a858ddc7090800c9095210dd4a0a5d4210f3987..2896299cbc3abcae8c9c4fae289e24449b99bbb8 100644 (file)
@@ -663,6 +663,15 @@ static void CmdLosim(char *str)
        SendCommand(&c, FALSE);\r
 }\r
 \r
        SendCommand(&c, FALSE);\r
 }\r
 \r
+static void CmdLosimBidir(char *str)\r
+{\r
+       UsbCommand c;\r
+       c.cmd = CMD_LF_SIMULATE_BIDIR;\r
+       c.ext1 = 47; /* Set ADC to twice the carrier for a slight supersampling */\r
+       c.ext2 = 384;\r
+       SendCommand(&c, FALSE);\r
+}\r
+\r
 static void CmdLoread(char *str)\r
 {\r
        UsbCommand c;\r
 static void CmdLoread(char *str)\r
 {\r
        UsbCommand c;\r
@@ -2834,6 +2843,7 @@ static struct {
        {"loread",                              CmdLoread,                                      0, "['h'] -- Read 125/134 kHz LF ID-only tag (option 'h' for 134)"},\r
        {"losamples",                   CmdLosamples,                           0, "[128 - 16000] -- Get raw samples for LF tag"},\r
        {"losim",                                       CmdLosim,                                               0, "Simulate LF tag"},\r
        {"loread",                              CmdLoread,                                      0, "['h'] -- Read 125/134 kHz LF ID-only tag (option 'h' for 134)"},\r
        {"losamples",                   CmdLosamples,                           0, "[128 - 16000] -- Get raw samples for LF tag"},\r
        {"losim",                                       CmdLosim,                                               0, "Simulate LF tag"},\r
+       {"losimbidir",                                  CmdLosimBidir,                                          0, "Simulate LF tag (with bidirectional data transmission between reader and tag)"},\r
        {"ltrim",                                       CmdLtrim,                                               1, "<samples> -- Trim samples from left of trace"},\r
        {"mandemod",                    Cmdmanchesterdemod,     1, "[i] [clock rate] -- Manchester demodulate binary stream (option 'i' to invert output)"},\r
        {"manmod",                              Cmdmanchestermod,               1, "[clock rate] -- Manchester modulate a binary stream"},\r
        {"ltrim",                                       CmdLtrim,                                               1, "<samples> -- Trim samples from left of trace"},\r
        {"mandemod",                    Cmdmanchesterdemod,     1, "[i] [clock rate] -- Manchester demodulate binary stream (option 'i' to invert output)"},\r
        {"manmod",                              Cmdmanchestermod,               1, "[clock rate] -- Manchester modulate a binary stream"},\r
Impressum, Datenschutz