]> git.zerfleddert.de Git - proxmark3-svn/commitdiff
hitag sim fix 246/head
authormarshmellow42 <marshmellowrf@gmail.com>
Sat, 25 Mar 2017 11:49:53 +0000 (07:49 -0400)
committermarshmellow42 <marshmellowrf@gmail.com>
Sat, 25 Mar 2017 11:49:53 +0000 (07:49 -0400)
from
https://github.com/iceman1001/proxmark3/commit/e1778858ddc53a6a82e8ee24f02e6b673687f69a
and http://www.proxmark.org/forum/viewtopic.php?pid=26733#p26733
sim mode should not have the reader field on.

armsrc/hitag2.c
armsrc/hitagS.c

index 6a072bf4f93c230ef5a650a32eef2f5965a2ab30..dd0211da98785ce6dbbf381193ae4371eb4c8714 100644 (file)
@@ -993,7 +993,7 @@ void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) {
        
        // Set up simulator mode, frequency divisor which will drive the FPGA
        // and analog mux selection.
        
        // Set up simulator mode, frequency divisor which will drive the FPGA
        // and analog mux selection.
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        RELAY_OFF();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        RELAY_OFF();
index 58e09a45fe321d066e8ab67b8cca288f578695fb..dc2281b964c8dd065b68cf00b53c7bb72634f5dd 100644 (file)
@@ -1023,8 +1023,7 @@ void SimulateHitagSTag(bool tag_mem_supplied, byte_t* data) {
 // Set up simulator mode, frequency divisor which will drive the FPGA
 // and analog mux selection.
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
 // Set up simulator mode, frequency divisor which will drive the FPGA
 // and analog mux selection.
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaWriteConfWord(
-       FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        RELAY_OFF();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        RELAY_OFF();
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