Fix possible type casting issue. Add another JTAG config file :)
authord18c7db <d18c7db@ef4ab9da-24cd-11de-8aaa-f3a34680c41f>
Wed, 3 Mar 2010 02:27:14 +0000 (02:27 +0000)
committerd18c7db <d18c7db@ef4ab9da-24cd-11de-8aaa-f3a34680c41f>
Wed, 3 Mar 2010 02:27:14 +0000 (02:27 +0000)
armsrc/iso14443a.c
tools/at91sam7s512-jtagkey.cfg [new file with mode: 0644]

index 2e91d2638eafee4df5e08f2defe7b0e7ab799ec9..c0bdb7426248137613f05a440d35ef637917691f 100644 (file)
@@ -77,7 +77,7 @@ static void AppendCrc14443a(uint8_t* data, int len)
   ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
 }
 
-int LogTrace(const uint8_t * btBytes, int iLen, int iSamples, uint32_t dwParity, int bReader)
+int LogTrace(const uint8_t * btBytes, size_t iLen, int iSamples, uint32_t dwParity, int bReader)
 {
   // Return when trace is full
   if (traceLen >= TRACE_LENGTH) return FALSE;
diff --git a/tools/at91sam7s512-jtagkey.cfg b/tools/at91sam7s512-jtagkey.cfg
new file mode 100644 (file)
index 0000000..3bcc512
--- /dev/null
@@ -0,0 +1,41 @@
+#define our ports\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#commands specific to the Amontec JTAGKey\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey A"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_khz 200\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#reset_config <signals> [combination] [trst_type] [srst_type]\r
+reset_config srst_only srst_pulls_trst\r
+\r
+jtag newtap sam7x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f\r
+\r
+target create sam7x.cpu arm7tdmi -endian little -chain-position sam7x.cpu -variant arm7tdmi\r
+\r
+sam7x.cpu configure -event reset-init {\r
+       soft_reset_halt\r
+       mww 0xfffffd00 0xa5000004       # RSTC_CR: Reset peripherals\r
+       mww 0xfffffd44 0x00008000       # WDT_MR: disable watchdog\r
+       mww 0xfffffd08 0xa5000001       # RSTC_MR enable user reset\r
+       mww 0xfffffc20 0x00005001       # CKGR_MOR : enable the main oscillator\r
+       sleep 10\r
+       mww 0xfffffc2c 0x000b1c02       # CKGR_PLLR: 16MHz * 12/2 = 96MHz\r
+       sleep 10\r
+       mww 0xfffffc30 0x00000007       # PMC_MCKR : MCK = PLL / 2 = 48 MHz\r
+       sleep 10\r
+       mww 0xffffff60 0x00480100       # MC_FMR: flash mode (FWS=1,FMCN=72)\r
+       sleep 100\r
+}\r
+\r
+gdb_memory_map enable\r
+gdb_breakpoint_override hard\r
+armv4_5 core_state arm\r
+\r
+sam7x.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x10000 -work-area-backup 0\r
+flash bank at91sam7 0x100000 0x40000 0 4 sam7x.cpu\r
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