#include "iso14443a.h"
#endif
-#define abs(x) ( ((x)<0) ? -(x) : (x) )
-
//=============================================================================
// A buffer where we can queue things up to be sent through the FPGA, for
// any purpose (fake tag, as reader, whatever). We go MSB first, since that
if (limit != HF_ONLY) {
if(mode == 1) {
- if (abs(lf_av - lf_baseline) > REPORT_CHANGE)
+ if (ABS(lf_av - lf_baseline) > REPORT_CHANGE)
LED_D_ON();
else
LED_D_OFF();
lf_av_new = AvgAdc(ADC_CHAN_LF);
// see if there's a significant change
- if(abs(lf_av - lf_av_new) > REPORT_CHANGE) {
+ if(ABS(lf_av - lf_av_new) > REPORT_CHANGE) {
Dbprintf("LF 125/134kHz Field Change: %5dmV", (MAX_ADC_LF_VOLTAGE * lf_av_new) >> 10);
lf_av = lf_av_new;
if (lf_av > lf_max)
if (limit != LF_ONLY) {
if (mode == 1){
- if (abs(hf_av - hf_baseline) > REPORT_CHANGE)
+ if (ABS(hf_av - hf_baseline) > REPORT_CHANGE)
LED_B_ON();
else
LED_B_OFF();
hf_av_new = AvgAdc(ADC_CHAN_HF);
// see if there's a significant change
- if(abs(hf_av - hf_av_new) > REPORT_CHANGE) {
+ if(ABS(hf_av - hf_av_new) > REPORT_CHANGE) {
Dbprintf("HF 13.56MHz Field Change: %5dmV", (MAX_ADC_HF_VOLTAGE * hf_av_new) >> 10);
hf_av = hf_av_new;
if (hf_av > hf_max)
}
*/
// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
+
+ //note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow
#define CHECK_FOR_SUBCARRIER() { \
+ v = MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2); \
+ }
+ /*
if(ci < 0) { \
- if(cq < 0) { /* ci < 0, cq < 0 */ \
+ if(cq < 0) { \ // ci < 0, cq < 0
if (cq < ci) { \
v = -cq - (ci >> 1); \
} else { \
v = -ci - (cq >> 1); \
} \
- } else { /* ci < 0, cq >= 0 */ \
+ } else { \ // ci < 0, cq >= 0
if (cq < -ci) { \
v = -ci + (cq >> 1); \
} else { \
} \
} \
} else { \
- if(cq < 0) { /* ci >= 0, cq < 0 */ \
+ if(cq < 0) { \ // ci >= 0, cq < 0
if (-cq < ci) { \
v = ci - (cq >> 1); \
} else { \
v = -cq + (ci >> 1); \
} \
- } else { /* ci >= 0, cq >= 0 */ \
+ } else { \ // ci >= 0, cq >= 0
if (cq < ci) { \
v = ci + (cq >> 1); \
} else { \
} \
} \
}
+ */
switch(Demod.state) {
case DEMOD_UNSYNCD:
#define T0_PCF 8 //period for the pcf7931 in us
#define ALLOC 16
-#define abs(x) ( ((x)<0) ? -(x) : (x) )
-#define max(x,y) ( x<y ? y:x)
-
int DemodPCF7931(uint8_t **outBlocks) {
uint8_t bits[256] = {0x00};
// Switch depending on lc length:
// Tolerance is 1/8 of clock rate (arbitrary)
- if (abs(lc-clock/4) < tolerance) {
+ if (ABS(lc-clock/4) < tolerance) {
// 16T0
if((i - pmc) == lc) { /* 16T0 was previous one */
/* It's a PMC ! */
else {
pmc = i;
}
- } else if (abs(lc-clock/2) < tolerance) {
+ } else if (ABS(lc-clock/2) < tolerance) {
// 32TO
if((i - pmc) == lc) { /* 16T0 was previous one */
/* It's a PMC ! */
}
else
half_switch++;
- } else if (abs(lc-clock) < tolerance) {
+ } else if (ABS(lc-clock) < tolerance) {
// 64TO
bits[bitidx++] = 1;
} else {
Blocks[0][ALLOC] = 1;
memcpy(Blocks[1], tmpBlocks[i+1], 16);
Blocks[1][ALLOC] = 1;
- max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
+ max_blocks = MAX((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
// Debug print
Dbprintf("(dbg) Max blocks: %d", max_blocks);
num_blocks = 2;
{
for(size_t i = 1; i<size; i++){
if (BitStream[i]-BitStream[i-1]>=30) //large jump up
- BitStream[i]=127;
+ BitStream[i]=255;
else if(BitStream[i]-BitStream[i-1]<=-20) //large jump down
- BitStream[i]=-127;
+ BitStream[i]=0;
}
return;
}
//return start position
return (int) startIdx;
}
- return -5;
+ return -5; //spacer bits not found - not a valid gproxII
}
-//translate wave to 11111100000 (1 for each short wave 0 for each long wave)
+//translate wave to 11111100000 (1 for each short wave [higher freq] 0 for each long wave [lower freq])
size_t fsk_wave_demod(uint8_t * dest, size_t size, uint8_t fchigh, uint8_t fclow)
{
size_t last_transition = 0;
// count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
// or 10 (fc/10) cycles but in practice due to noise etc we may end up with anywhere
// between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
+ // (could also be fc/5 && fc/7 for fsk1 = 4-9)
for(idx = 161; idx < size-20; idx++) {
// threshold current value
else dest[idx] = 1;
// Check for 0->1 transition
- if (dest[idx-1] < dest[idx]) { // 0 -> 1 transition
+ if (dest[idx-1] < dest[idx]) {
preLastSample = LastSample;
LastSample = currSample;
currSample = idx-last_transition;
- if (currSample < (fclow-2)){ //0-5 = garbage noise (or 0-3)
+ if (currSample < (fclow-2)) { //0-5 = garbage noise (or 0-3)
//do nothing with extra garbage
- } else if (currSample < (fchigh-1)) { //6-8 = 8 sample waves or 3-6 = 5
+ } else if (currSample < (fchigh-1)) { //6-8 = 8 sample waves (or 3-6 = 5)
+ //correct previous 9 wave surrounded by 8 waves (or 6 surrounded by 5)
if (LastSample > (fchigh-2) && (preLastSample < (fchigh-1) || preLastSample == 0 )){
- dest[numBits-1]=1; //correct previous 9 wave surrounded by 8 waves
+ dest[numBits-1]=1;
}
dest[numBits++]=1;
- } else if (currSample > (fchigh) && !numBits) { //12 + and first bit = garbage
+ } else if (currSample > (fchigh) && !numBits) { //12 + and first bit = unusable garbage
//do nothing with beginning garbage
- } else if (currSample == (fclow+1) && LastSample == (fclow-1)) { // had a 7 then a 9 should be two 8's
+ } else if (currSample == (fclow+1) && LastSample == (fclow-1)) { // had a 7 then a 9 should be two 8's (or 4 then a 6 should be two 5's)
dest[numBits++]=1;
- } else { //9+ = 10 sample waves
+ } else { //9+ = 10 sample waves (or 6+ = 7)
dest[numBits++]=0;
}
last_transition = idx;
}
//translate 11111100000 to 10
+//rfLen = clock, fchigh = larger field clock, fclow = smaller field clock
size_t aggregate_bits(uint8_t *dest, size_t size, uint8_t rfLen,
uint8_t invert, uint8_t fchigh, uint8_t fclow)
{
uint32_t n=1;
for( idx=1; idx < size; idx++) {
n++;
- if (dest[idx]==lastval) continue;
+ if (dest[idx]==lastval) continue; //skip until we hit a transition
+ //find out how many bits (n) we collected
//if lastval was 1, we have a 1->0 crossing
if (dest[idx-1]==1) {
n = (n * fclow + rfLen/2) / rfLen;
}
if (n == 0) n = 1;
+ //add to our destination the bits we collected
memset(dest+numBits, dest[idx-1]^invert , n);
numBits += n;
n=0;
numBits += (firstFullWave / *clock);
//set start of wave as clock align
lastClkBit = firstFullWave;
- //PrintAndLog("DEBUG: firstFullWave: %d, waveLen: %d",firstFullWave,fullWaveLen);
- //PrintAndLog("DEBUG: clk: %d, lastClkBit: %d", *clock, lastClkBit);
+ if (g_debugMode==2) prnt("DEBUG PSK: firstFullWave: %u, waveLen: %u",firstFullWave,fullWaveLen);
+ if (g_debugMode==2) prnt("DEBUG: clk: %d, lastClkBit: %u, fc: %u", *clock, lastClkBit,(unsigned int) fc);
waveStart = 0;
dest[numBits++] = curPhase; //set first read bit
for (i = firstFullWave + fullWaveLen - 1; i < *size-3; i++){
i=0;
// warning - overwriting buffer given with raw wave data with ST removed...
while ( dataloc < bufsize-(clk/2) ) {
- //compensate for long high at end of ST not being high... (we cut out the high part)
+ //compensate for long high at end of ST not being high due to signal loss... (and we cut out the start of wave high part)
if (buffer[dataloc]<high && buffer[dataloc]>low && buffer[dataloc+3]<high && buffer[dataloc+3]>low) {
for(i=0; i < clk/2-tol; ++i) {
buffer[dataloc+i] = high+5;
}
}
newloc += i;
- //skip next ST
+ //skip next ST - we just assume it will be there from now on...
dataloc += clk*4;
}
*size = newloc;
projects / proxmark3-svn / commitdiff