]> git.zerfleddert.de Git - fhem-stuff/blame - culfw/culfw-asksin-fix.diff
more errata 1...
[fhem-stuff] / culfw / culfw-asksin-fix.diff
CommitLineData
b2720844
MG
1Index: clib/rf_asksin.c
2===================================================================
3--- clib/rf_asksin.c (revision 373)
4+++ clib/rf_asksin.c (working copy)
1bfa61a8 5@@ -9,15 +9,18 @@
b2720844 6
1bfa61a8
MG
7 #include "rf_asksin.h"
8
7e90ff0a 9+//we receive a new byte approximately every 8 ms...
1bfa61a8
MG
10+#define RX_TIMEOUT_MS 10
11+
b2720844
MG
12 uint8_t asksin_on = 0;
13
14-const uint8_t PROGMEM ASKSIN_CFG[50] = {
532a7bf0 15- 0x00, 0x07,
b2720844 16+const uint8_t PROGMEM ASKSIN_CFG[] = {
532a7bf0 17+ 0x00, 0x01,
b2720844
MG
18 0x02, 0x2e,
19 0x03, 0x0d,
532a7bf0
MG
20 0x04, 0xE9,
21 0x05, 0xCA,
22- 0x07, 0x0C,
23+ 0x07, 0x04,
24 0x0B, 0x06,
25 0x0D, 0x21,
26 0x0E, 0x65,
1bfa61a8 27@@ -26,18 +29,22 @@
b2720844
MG
28 0x11, 0x93,
29 0x12, 0x03,
30 0x15, 0x34,
31- 0x17, 0x30, // always go into IDLE
1a1e2f5d 32+ 0x17, 0x3F, // always go into RX, CCA; ELV uses 0x03
b2720844
MG
33 0x18, 0x18,
34 0x19, 0x16,
35 0x1B, 0x43,
36 0x21, 0x56,
37 0x25, 0x00,
38 0x26, 0x11,
39+ 0x29, 0x59,
40+ 0x2c, 0x81,
41 0x2D, 0x35,
777ef621 42- 0x3e, 0xc3,
b2720844 43- 0xff
777ef621 44+ 0x3e, 0xc3
b2720844
MG
45 };
46
b74270d7 47+static inline uint8_t read_cc1100_rxbytes(void);
ee6c84c4 48+static void rf_asksin_reset_rx(void);
532a7bf0 49+
b2720844 50 void
532a7bf0
MG
51 rf_asksin_init(void)
52 {
1bfa61a8 53@@ -56,20 +63,44 @@
b2720844
MG
54 my_delay_us(100);
55
56 // load configuration
57- for (uint8_t i = 0; i<50; i += 2) {
777ef621
MG
58-
59- if (pgm_read_byte( &ASKSIN_CFG[i] )>0x40)
60- break;
61-
b2720844 62+ for (uint8_t i = 0; i < sizeof(ASKSIN_CFG); i += 2) {
777ef621
MG
63 cc1100_writeReg( pgm_read_byte(&ASKSIN_CFG[i]),
64 pgm_read_byte(&ASKSIN_CFG[i+1]) );
65 }
b2720844
MG
66
67 ccStrobe( CC1100_SCAL );
68
69- my_delay_ms(1);
70+ my_delay_ms(4);
71+
72+ ccRX();
73 }
74
532a7bf0 75+// Workaround for CC1101 Errata 3
b74270d7
MG
76+static inline uint8_t
77+read_cc1100_rxbytes(void)
532a7bf0
MG
78+{
79+ uint8_t rxbytes, rxbytes2;
80+
81+ rxbytes = cc1100_readReg(CC1100_RXBYTES);
82+ while((rxbytes2 = cc1100_readReg(CC1100_RXBYTES)) != rxbytes)
83+ rxbytes = rxbytes2;
84+
85+ return rxbytes;
86+}
b74270d7 87+
ee6c84c4 88+static void
b74270d7
MG
89+rf_asksin_reset_rx(void)
90+{
91+ ccStrobe( CC1100_SFRX );
92+ ccStrobe( CC1100_SIDLE );
93+ ccStrobe( CC1100_SNOP );
94+
95+ while (read_cc1100_rxbytes() & 0x7f)
96+ cc1100_readReg(CC1100_RXFIFO);
97+
98+ ccStrobe( CC1100_SRX );
99+}
532a7bf0 100+
b2720844 101 void
532a7bf0
MG
102 rf_asksin_task(void)
103 {
74319158 104@@ -77,18 +108,57 @@
cf4474a9
MG
105 uint8_t dec[MAX_ASKSIN_MSG];
106 uint8_t rssi;
107 uint8_t l;
108+ uint8_t rxfifo_cnt;
1bfa61a8 109+ uint16_t timeout;
cf4474a9
MG
110
111 if(!asksin_on)
112 return;
113
532a7bf0
MG
114- // see if a CRC OK pkt has been arrived
115- if (bit_is_set( CC1100_IN_PORT, CC1100_IN_PIN )) {
116+ // see if there is data to be read
117+ while (bit_is_set( CC1100_IN_PORT, CC1100_IN_PIN )) {
118+ rxfifo_cnt = read_cc1100_rxbytes();
cf4474a9 119
532a7bf0
MG
120+ if (rxfifo_cnt & 0x80) // Overflow
121+ break;
122+
123+ rxfifo_cnt &= 0x7f;
74319158
MG
124+
125+ // We must not read the last byte from the RX fifo while RX is in progress (Errata 1)
126+ while ((rxfifo_cnt == 1) && (cc1100_readReg(CC1100_PKTSTATUS) & (1 << 3))) {
127+ my_delay_ms(1);
128+ rxfifo_cnt = read_cc1100_rxbytes() & 0x7f;
129+ }
532a7bf0
MG
130+
131 enc[0] = cc1100_readReg( CC1100_RXFIFO ) & 0x7f; // read len
b74270d7 132+ rxfifo_cnt--;
cf4474a9 133
b74270d7
MG
134- if (enc[0]>=MAX_ASKSIN_MSG)
135- enc[0] = MAX_ASKSIN_MSG-1;
db4f8119 136-
b74270d7
MG
137+ if (enc[0] >= MAX_ASKSIN_MSG) {
138+ // Something went horribly wrong, out of sync?
139+ rf_asksin_reset_rx();
140+ return;
141+ }
db4f8119 142+
1bfa61a8
MG
143+ if ((enc[0] + 2) > rxfifo_cnt) {
144+ timeout = RX_TIMEOUT_MS * ((enc[0] + 2) - rxfifo_cnt);
145+ while (timeout-- && ((enc[0] + 2) > rxfifo_cnt)) { // Wait for more data
146+ my_delay_ms(1);
147+ rxfifo_cnt = read_cc1100_rxbytes();
b74270d7 148+
1bfa61a8
MG
149+ if (rxfifo_cnt & 0x80) { // Overflow
150+ rf_asksin_reset_rx();
151+ return;
152+ }
153+
154+ rxfifo_cnt &= 0x7f;
155+ }
156+
157+ if (!timeout) {
158+ // Not enough data received, out of sync?
159+ rf_asksin_reset_rx();
160+ return;
161+ }
532a7bf0
MG
162+ }
163+
db4f8119
MG
164 CC1100_ASSERT;
165 cc1100_sendbyte( CC1100_READ_BURST | CC1100_RXFIFO );
532a7bf0 166
74319158 167@@ -97,14 +167,19 @@
532a7bf0
MG
168 }
169
170 rssi = cc1100_sendbyte( 0 );
cf4474a9 171-
532a7bf0
MG
172+
173 CC1100_DEASSERT;
b2720844
MG
174
175- ccStrobe( CC1100_SFRX );
176- ccStrobe( CC1100_SIDLE );
177- ccStrobe( CC1100_SNOP );
178- ccStrobe( CC1100_SRX );
b74270d7
MG
179+ // We must not read the last byte from the RX fifo while RX is in progress (Errata 1)
180+ while (((read_cc1100_rxbytes() & 0x7f) == 1) && (cc1100_readReg(CC1100_PKTSTATUS) & (1 << 3))) {
181+ my_delay_ms(1);
182+ }
183
184+ l = cc1100_readReg(CC1100_RXFIFO);
185+
532a7bf0
MG
186+ if (!(l & 0x80)) // CRC not ok
187+ continue;
b74270d7 188+
532a7bf0
MG
189 dec[0] = enc[0];
190 dec[1] = (~enc[1]) ^ 0x89;
b74270d7 191
74319158 192@@ -113,7 +188,6 @@
532a7bf0
MG
193
194 dec[l] = enc[l] ^ dec[2];
195
b2720844 196-
532a7bf0 197 if (tx_report & REP_BINTIME) {
cf4474a9 198
532a7bf0 199 DC('a');
74319158 200@@ -131,26 +205,17 @@
cf4474a9 201
532a7bf0 202 DNL();
b2720844 203 }
532a7bf0
MG
204+ }
205
cf4474a9 206- return;
b2720844 207-
532a7bf0
MG
208+ switch(cc1100_readReg( CC1100_MARCSTATE )) {
209+ case MARCSTATE_RXFIFO_OVERFLOW:
210+ ccStrobe( CC1100_SFRX );
211+ case MARCSTATE_IDLE:
212+ ccStrobe( CC1100_SIDLE );
213+ ccStrobe( CC1100_SNOP );
214+ ccStrobe( CC1100_SRX );
215+ break;
b2720844
MG
216 }
217-
218-
219- switch (cc1100_readReg( CC1100_MARCSTATE )) {
220-
221- // RX_OVERFLOW
222- case 17:
223- // IDLE
224- case 1:
225- ccStrobe( CC1100_SFRX );
226- ccStrobe( CC1100_SIDLE );
227- ccStrobe( CC1100_SNOP );
228- ccStrobe( CC1100_SRX );
229- break;
230-
231- }
532a7bf0 232-
b2720844
MG
233 }
234
235 void
74319158 236@@ -173,20 +238,7 @@
b2720844
MG
237 my_delay_ms(3); // 3ms: Found by trial and error
238 }
239
240- ccStrobe(CC1100_SIDLE);
241- ccStrobe(CC1100_SFRX );
242- ccStrobe(CC1100_SFTX );
243-
244- if (dec[2] & (1 << 4)) { //BURST-bit set?
245- ccStrobe(CC1100_STX ); //We need to send a burst
246-
247- //According to ELV, devices get activated every 300ms, so send burst for 360ms
248- for(l = 0; l < 3; l++)
249- my_delay_ms(120); //arg is uint_8, so loop
250- }
251-
252 // "crypt"
253-
254 enc[0] = dec[0];
255 enc[1] = (~dec[1]) ^ 0x89;
256
74319158 257@@ -195,6 +247,15 @@
b2720844
MG
258
259 enc[l] = dec[l] ^ dec[2];
260
261+ ccTX();
262+ if (dec[2] & (1 << 4)) { // BURST-bit set?
263+ // According to ELV, devices get activated every 300ms, so send burst for 360ms
264+ for(l = 0; l < 3; l++)
265+ my_delay_ms(120); // arg is uint_8, so loop
5f2228fc
MG
266+ } else {
267+ my_delay_ms(10);
b2720844
MG
268+ }
269+
270 // send
271 CC1100_ASSERT;
272 cc1100_sendbyte(CC1100_WRITE_BURST | CC1100_TXFIFO);
74319158 273@@ -205,12 +266,17 @@
b2720844
MG
274
275 CC1100_DEASSERT;
276
277- ccStrobe( CC1100_SFRX );
278- ccStrobe( CC1100_STX );
279+ // wait for TX to finish
280+ while(cc1100_readReg( CC1100_MARCSTATE ) == MARCSTATE_TX)
281+ ;
777ef621
MG
282+
283+ if (cc1100_readReg( CC1100_MARCSTATE ) == MARCSTATE_TXFIFO_UNDERFLOW) {
284+ ccStrobe( CC1100_SFTX );
285+ ccStrobe( CC1100_SIDLE );
286+ ccStrobe( CC1100_SNOP );
287+ ccStrobe( CC1100_SRX );
288+ }
b2720844
MG
289
290- while( cc1100_readReg( CC1100_MARCSTATE ) != 1 )
291- my_delay_ms(5);
292-
293 if(asksin_on) {
294 ccRX();
295 } else {
Impressum, Datenschutz