\r
//------- H_SYNC ----------------------------------------\r
\r
-reg H_SYNCn;\r
-wire H_SYNC = ~H_SYNCn;\r
+reg H_SYNC;\r
always@(posedge H_CNT[4] or negedge H_CNT[8]) \r
begin\r
- if(H_CNT[8]==1'b0) H_SYNCn <= 1'b1;\r
- else H_SYNCn <= ~(~H_CNT[6]& H_CNT[5]);\r
+ if(H_CNT[8]==1'b0) H_SYNC <= 1'b0;\r
+ else H_SYNC <= (~H_CNT[6]& H_CNT[5]);\r
end\r
\r
assign O_H_SYNC = H_SYNC;\r
\r
assign O_C_BLn = ~(~V_BLn | H_CNT[8]);\r
\r
-endmodule
\ No newline at end of file
+endmodule\r