NET "I_PSW<7>" LOC = "J15" | IOSTANDARD = LVTTL | PULLDOWN; #s6 - s2
NET "I_PSW<8>" LOC = "J17" | IOSTANDARD = LVTTL | PULLDOWN; #s5 - c2
#-------------------------------------------
-#--------- EEPROM I/F ----------------------
-#NET "I_ROM_DB<0>" LOC = "P70";
-#NET "I_ROM_DB<1>" LOC = "P68";
-#NET "I_ROM_DB<2>" LOC = "P63";
-#NET "I_ROM_DB<3>" LOC = "P58";
-#NET "I_ROM_DB<4>" LOC = "P60";
-#NET "I_ROM_DB<5>" LOC = "P62";
-#NET "I_ROM_DB<6>" LOC = "P57";
-#NET "I_ROM_DB<7>" LOC = "P59";
-#NET "O_ROM_AB<0>" LOC = "P71";
-#NET "O_ROM_AB<1>" LOC = "P74";
-#NET "O_ROM_AB<2>" LOC = "P73";
-#NET "O_ROM_AB<3>" LOC = "P75";
-#NET "O_ROM_AB<4>" LOC = "P81";
-#NET "O_ROM_AB<5>" LOC = "P82";
-#NET "O_ROM_AB<6>" LOC = "P84";
-#NET "O_ROM_AB<7>" LOC = "P86";
-#NET "O_ROM_AB<8>" LOC = "P89";
-#NET "O_ROM_AB<9>" LOC = "P87";
-#NET "O_ROM_AB<10>" LOC = "P64";
-#NET "O_ROM_AB<11>" LOC = "P83";
-#NET "O_ROM_AB<12>" LOC = "P88";
-#NET "O_ROM_AB<13>" LOC = "P95";
-#NET "O_ROM_AB<14>" LOC = "P97";
-#NET "O_ROM_AB<15>" LOC = "P93";
-#NET "O_ROM_AB<16>" LOC = "P96";
-#NET "O_ROM_AB<17>" LOC = "P98";
-#NET "O_ROM_AB<18>" LOC = "P94";
-#NET "O_ROM_CSn" LOC = "P61";
-#NET "O_ROM_OEn" LOC = "P69";
-#NET "O_ROM_WEn" LOC = "P100";
-#-------------------------------------------
#--------- SOUND I/F -----------------------
NET "O_SOUND_OUT_L" LOC = "AA22" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8;
NET "O_SOUND_OUT_R" LOC = "V19" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8;
psRXD,\r
`endif\r
\r
-// ROM IF\r
-//O_ROM_AB,\r
-//I_ROM_DB,\r
-//O_ROM_OEn,\r
-//O_ROM_CSn,\r
-//O_ROM_WEn,\r
-\r
// INPORT SW IF\r
I_PSW,\r
\r
output psTXD,psCLK,psSEL;\r
`endif\r
\r
-// ROM IF\r
-//output [18:0]O_ROM_AB;\r
-//input [7:0]I_ROM_DB;\r
-//output O_ROM_OEn;\r
-//output O_ROM_CSn;\r
-//output O_ROM_WEn;\r
-\r
// INPORT SW IF\r
input [8:0]I_PSW;\r
\r
wire W_CLK_12M,WB_CLK_12M;\r
wire W_CLK_6M,WB_CLK_6M;\r
wire W_STARS_CLK;\r
-wire W_ROM_CLK;\r
\r
mc_dcm clockgen(\r
.CLKIN_IN(I_CLK_125M),\r
.RST_IN(! W_RESETn),\r
-.CLKFX_OUT(I_CLK_18432M),\r
-.CLK0_OUT(W_ROM_CLK)\r
+.CLKFX_OUT(I_CLK_18432M)\r
);\r
\r
//------ H&V COUNTER -------------------------\r
//-----------------------------------------------------------------------------\r
//------- ROM -------------------------------------------------------\r
reg [18:0]ROM_A;\r
-wire [10:0]W_OBJ_ROM_A;\r
-reg [7:0]W_OBJ_ROM_A_D;\r
-reg [7:0]W_OBJ_ROM_B_D;\r
\r
wire [18:0]W_WAV_A0,W_WAV_A1,W_WAV_A2;\r
reg [7:0]W_WAV_D0,W_WAV_D1,W_WAV_D2;\r
\r
-wire [7:0]ROM_D; // = I_ROM_DB;\r
-//assign O_ROM_AB = ROM_A;\r
-\r
-//assign O_ROM_OEn = 1'b0;\r
-//assign O_ROM_CSn = 1'b0;\r
-//assign O_ROM_WEn = 1'b1;\r
+wire [7:0]ROM_D;\r
\r
galaxian_roms ROMS(\r
-.I_ROM_CLK(W_ROM_CLK),\r
-.I_ADDR(ROM_A),\r
+.I_ROM_CLK(W_CLK_12M),\r
+.I_ADDR({3'h0,W_A[15:0]}),\r
.O_DATA(ROM_D)\r
);\r
\r
-\r
-reg [1:0]clk_d;\r
-reg [4:0]seq;\r
-always @(posedge I_CLK_18432M)\r
+always@(posedge W_CLK_12M)\r
begin\r
- // 24 phase generator\r
- clk_d[0] <= W_H_CNT[0] & W_H_CNT[1] & W_H_CNT[2];\r
- clk_d[1] <= clk_d[0];\r
- seq <= (~clk_d[1] & clk_d[0]) ? 0 : seq+1;\r
- case(seq)\r
- 0:begin\r
- ROM_A <= W_WAV_A0;\r
- W_CPU_ROM_DO <= ROM_D;\r
- end\r
- 2:begin\r
- ROM_A <= W_WAV_A1;\r
- W_WAV_D0 <= ROM_D;\r
- end\r
- 4:begin\r
- ROM_A <= {3'h0,W_A[15:0]};\r
- W_WAV_D1 <= ROM_D;\r
- end\r
- 6:begin\r
- ROM_A <= W_WAV_A2;\r
- W_CPU_ROM_DO <= ROM_D;\r
- end\r
- 8:W_WAV_D2 <= ROM_D;\r
- 10:ROM_A <= {3'h0,W_A[15:0]};\r
- 12:W_CPU_ROM_DO <= ROM_D;\r
- 14:ROM_A <= {3'h0,W_A[15:0]};\r
- 16:begin\r
- ROM_A <= {3'h0,4'h4,1'b0,W_OBJ_ROM_A};\r
- W_CPU_ROM_DO <= ROM_D;\r
- end\r
- 18:begin\r
- ROM_A <= {3'h0,4'h5,1'b0,W_OBJ_ROM_A};\r
- W_OBJ_ROM_A_D <= ROM_D;\r
- end\r
- 20:begin\r
- ROM_A <= {3'h0,W_A[15:0]};\r
- W_OBJ_ROM_B_D <= ROM_D;\r
- end\r
- default:;\r
- endcase\r
+ W_CPU_ROM_DO <= ROM_D;\r
end\r
+\r
//-----------------------------------------------------------------------------\r
\r
wire W_V_BL2n;\r
.I_VID_RAM_RDn(W_VID_RAM_RDn),\r
.I_VID_RAM_WRn(W_VID_RAM_WRn),\r
\r
-.O_OBJ_ROM_A(W_OBJ_ROM_A),\r
-.I_OBJ_ROM_A_D(W_OBJ_ROM_A_D),\r
-.I_OBJ_ROM_B_D(W_OBJ_ROM_B_D),\r
-\r
.O_C_BLnX(W_C_BLnX),\r
.O_8HF(W_8HF),\r
.O_256HnX(W_256HnX),\r