//assign O_ROM_WEn = 1'b1;\r
\r
galaxian_roms ROMS(\r
+.I_CLK_18432M(I_CLK_18432M),\r
.I_CLK_12M(WB_CLK_12M),\r
.I_ADDR(ROM_A),\r
.O_DATA(ROM_D)\r
module galaxian_roms(
+I_CLK_18432M,
I_CLK_12M,
I_ADDR,
O_DATA
);
+input I_CLK_18432M;
input I_CLK_12M;
input [18:0]I_ADDR;
output [7:0]O_DATA;
);
reg [7:0]DATA_OUT;
+reg [7:0]DATA_OUT2;
// address map
//--------------------------------------------------
end
end
-assign O_DATA = DATA_OUT;
+always@(negedge I_CLK_18432M)
+begin
+ DATA_OUT2 <= DATA_OUT;
+end
+
+assign O_DATA = DATA_OUT2;
endmodule