change timing for rom access

diff --git a/galaxian/src/mc_top.v b/galaxian/src/mc_top.v
index 360a2f4cfdba194dd7923a58a715813693254026..08d25de4ef664de7ede434cb4ca714faff45c9d7 100644 (file)
--- a/galaxian/src/mc_top.v
+++ b/galaxian/src/mc_top.v
@@ -443,38 +443,34 @@ begin
    seq <= (~clk_d[1] & clk_d[0]) ? 0 : seq+1;\r
    case(seq)\r
       0:begin\r
-        //sound\r
         ROM_A <= W_WAV_A0;\r
         W_CPU_ROM_DO <= ROM_D;\r
         end\r
       2:begin\r
-        //sound\r
         ROM_A <= W_WAV_A1;\r
         W_WAV_D0 <= ROM_D;\r
         end\r
       4:begin\r
-        //sound\r
         ROM_A <= {3'h0,W_A[15:0]};\r
         W_WAV_D1 <= ROM_D;\r
         end\r
       6:begin\r
-        //sound\r
         ROM_A <= W_WAV_A2;\r
         W_CPU_ROM_DO <= ROM_D;\r
         end\r
-      8:W_WAV_D2 <= ROM_D; //sound\r
+      8:W_WAV_D2 <= ROM_D;\r
      10:ROM_A <= {3'h0,W_A[15:0]};\r
      12:W_CPU_ROM_DO <= ROM_D;\r
-     16:ROM_A <= {3'h0,W_A[15:0]};\r
-     18:begin\r
+     14:ROM_A <= {3'h0,W_A[15:0]};\r
+     16:begin\r
         ROM_A <= {3'h0,4'h4,1'b0,W_OBJ_ROM_A};\r
         W_CPU_ROM_DO <= ROM_D;\r
         end\r
-     20:begin\r
+     18:begin\r
         ROM_A <= {3'h0,4'h5,1'b0,W_OBJ_ROM_A};\r
         W_OBJ_ROM_A_D <= ROM_D;\r
         end\r
-     22:begin\r
+     20:begin\r
         ROM_A <= {3'h0,W_A[15:0]};\r
         W_OBJ_ROM_B_D <= ROM_D;\r
         end\r

diff --git a/galaxian/src/roms.v b/galaxian/src/roms.v
index 4fcf3620308f6937ff17b892d206bfc49eb0d0b3..8498a35acdf07b301425f03a5da16c95710877ad 100644 (file)
--- a/galaxian/src/roms.v
+++ b/galaxian/src/roms.v
@@ -76,7 +76,6 @@ GALAXIAN_1H H_ROM(
 );
 
 reg [7:0]DATA_OUT;
-reg [7:0]DATA_OUT2;
 
 //    address map
 //--------------------------------------------------