NET "I_CLK_125M" LOC = "F13" | IOSTANDARD = LVCMOS33;
#-------------------------------------------
#---------- SW I/F -------------------------
-NET "I_PSW<0>" LOC = "K19" | IOSTANDARD = LVTTL | PULLUP;
-NET "I_PSW<1>" LOC = "F22" | IOSTANDARD = LVTTL | PULLUP;
-NET "I_PSW<2>" LOC = "G22" | IOSTANDARD = LVTTL | PULLUP;
-NET "I_PSW<3>" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP;
-NET "I_PSW<4>" LOC = "F23" | IOSTANDARD = LVTTL | PULLUP;
+NET "I_PSW<0>" LOC = "K19" | IOSTANDARD = LVTTL | PULLUP; #up
+NET "I_PSW<1>" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP; #down
+NET "I_PSW<2>" LOC = "G22" | IOSTANDARD = LVTTL | PULLUP; #left
+NET "I_PSW<3>" LOC = "F22" | IOSTANDARD = LVTTL | PULLUP; #right
+NET "I_PSW<4>" LOC = "F23" | IOSTANDARD = LVTTL | PULLUP; #btn
+NET "I_PSW<5>" LOC = "J10" | IOSTANDARD = LVTTL | PULLDOWN; #s8 - s1
+NET "I_PSW<6>" LOC = "J13" | IOSTANDARD = LVTTL | PULLDOWN; #s7 - c1
+NET "I_PSW<7>" LOC = "J15" | IOSTANDARD = LVTTL | PULLDOWN; #s6 - s2
+NET "I_PSW<8>" LOC = "J17" | IOSTANDARD = LVTTL | PULLDOWN; #s5 - c2
#-------------------------------------------
#--------- EEPROM I/F ----------------------
#NET "I_ROM_DB<0>" LOC = "P70";
//output O_ROM_WEn;\r
\r
// INPORT SW IF\r
-input [4:0]I_PSW;\r
+input [8:0]I_PSW;\r
\r
// SOUND OUT \r
output O_SOUND_OUT_L;\r
output O_VGA_H_SYNCn;\r
output O_VGA_V_SYNCn;\r
\r
-wire W_RESETn = |I_PSW[3:0];\r
+wire W_RESETn = |(~I_PSW[8:5]);\r
//------ CLOCK GEN ---------------------------\r
wire I_CLK_18432M;\r
wire W_CLK_12M,WB_CLK_12M;\r
\r
wire C1 = (L1|R1|U1|~D1) & ps_PSW[4];\r
`else\r
-wire L1 = I_PSW[2];\r
-wire R1 = I_PSW[3];\r
-wire U1 = I_PSW[0];\r
-wire D1 = I_PSW[1];\r
-wire J1 = I_PSW[4];\r
+wire L1 = ! I_PSW[2];\r
+wire R1 = ! I_PSW[3];\r
+wire U1 = ! I_PSW[0];\r
+wire D1 = ! I_PSW[1];\r
+wire J1 = ! I_PSW[4];\r
\r
-wire S1 = U1|J1;\r
-wire S2 = D1|J1;\r
+wire S1 = ! I_PSW[5];\r
+wire S2 = ! I_PSW[7];\r
\r
-wire C1 = L1|R1|U1|~D1;\r
+wire C1 = ! I_PSW[6];\r
`endif\r
-wire C2 = L1|R1|~U1|D1;\r
+wire C2 = ! I_PSW[8];\r
\r
wire L2 = L1;\r
wire R2 = R1;\r
\r
`else\r
\r
-assign O_VGA_R[2:0] = W_R;\r
-assign O_VGA_R[4:3] = 1'b0;\r
+assign O_VGA_R[4:0] = W_R;\r
\r
-assign O_VGA_G[2:0] = W_G;\r
-assign O_VGA_G[4:3] = 1'b0;\r
+assign O_VGA_G[4:0] = W_G;\r
\r
-assign O_VGA_B[1:0] = W_B;\r
-assign O_VGA_B[4:2] = 1'b0;\r
+assign O_VGA_B[4:0] = W_B;\r
\r
//assign O_VGA_H_SYNCn = W_H_SYNC | W_V_SYNC ; // AKIDUKI LCD USED\r
assign O_VGA_H_SYNCn = ~W_H_SYNC ;\r