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cee5a30d | 1 | //----------------------------------------------------------------------------- |
2 | // Gerhard de Koning Gans - May 2008 | |
3 | // Hagen Fritsch - June 2010 | |
4 | // Gerhard de Koning Gans - May 2011 | |
1e262141 | 5 | // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation |
cee5a30d | 6 | // |
7 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
8 | // at your option, any later version. See the LICENSE.txt file for the text of | |
9 | // the license. | |
10 | //----------------------------------------------------------------------------- | |
11 | // Routines to support iClass. | |
12 | //----------------------------------------------------------------------------- | |
13 | // Based on ISO14443a implementation. Still in experimental phase. | |
14 | // Contribution made during a security research at Radboud University Nijmegen | |
17505ce2 | 15 | // |
cee5a30d | 16 | // Please feel free to contribute and extend iClass support!! |
17 | //----------------------------------------------------------------------------- | |
18 | // | |
cee5a30d | 19 | // FIX: |
20 | // ==== | |
21 | // We still have sometimes a demodulation error when snooping iClass communication. | |
22 | // The resulting trace of a read-block-03 command may look something like this: | |
23 | // | |
17505ce2 | 24 | // + 22279: : 0c 03 e8 01 |
cee5a30d | 25 | // |
26 | // ...with an incorrect answer... | |
27 | // | |
28 | // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc | |
29 | // | |
30 | // We still left the error signalling bytes in the traces like 0xbb | |
31 | // | |
32 | // A correct trace should look like this: | |
33 | // | |
17505ce2 | 34 | // + 21112: : 0c 03 e8 01 |
35 | // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5 | |
cee5a30d | 36 | // |
37 | //----------------------------------------------------------------------------- | |
38 | ||
17505ce2 | 39 | #include "iclass.h" |
40 | ||
cee5a30d | 41 | #include "proxmark3.h" |
42 | #include "apps.h" | |
43 | #include "util.h" | |
44 | #include "string.h" | |
7e67e42f | 45 | #include "common.h" |
fecd8202 | 46 | #include "cmd.h" |
6e49717b | 47 | #include "iso14443a.h" |
1e262141 | 48 | // Needed for CRC in emulation mode; |
49 | // same construction as in ISO 14443; | |
50 | // different initial value (CRC_ICLASS) | |
51 | #include "iso14443crc.h" | |
c3963755 | 52 | #include "iso15693tools.h" |
b67f7ec3 | 53 | #include "protocols.h" |
10a8875c | 54 | #include "optimized_cipher.h" |
979c7655 | 55 | #include "usb_cdc.h" // for usb_poll_validate_length |
fc52fbd4 | 56 | #include "fpgaloader.h" |
10a8875c | 57 | |
1e262141 | 58 | static int timeout = 4096; |
cee5a30d | 59 | |
cee5a30d | 60 | //----------------------------------------------------------------------------- |
61 | // The software UART that receives commands from the reader, and its state | |
62 | // variables. | |
63 | //----------------------------------------------------------------------------- | |
64 | static struct { | |
17505ce2 | 65 | enum { |
66 | STATE_UNSYNCD, | |
67 | STATE_START_OF_COMMUNICATION, | |
68 | STATE_RECEIVING | |
69 | } state; | |
70 | uint16_t shiftReg; | |
71 | int bitCnt; | |
72 | int byteCnt; | |
73 | int byteCntMax; | |
74 | int posCnt; | |
75 | int nOutOfCnt; | |
76 | int OutOfCnt; | |
77 | int syncBit; | |
78 | int samples; | |
79 | int highCnt; | |
80 | int swapper; | |
81 | int counter; | |
82 | int bitBuffer; | |
83 | int dropPosition; | |
84 | uint8_t *output; | |
cee5a30d | 85 | } Uart; |
86 | ||
17505ce2 | 87 | static RAMFUNC int OutOfNDecoding(int bit) { |
9f693930 | 88 | //int error = 0; |
cee5a30d | 89 | int bitright; |
90 | ||
17505ce2 | 91 | if (!Uart.bitBuffer) { |
cee5a30d | 92 | Uart.bitBuffer = bit ^ 0xFF0; |
44964fd1 | 93 | return false; |
17505ce2 | 94 | } else { |
cee5a30d | 95 | Uart.bitBuffer <<= 4; |
96 | Uart.bitBuffer ^= bit; | |
97 | } | |
17505ce2 | 98 | |
99 | /*if (Uart.swapper) { | |
cee5a30d | 100 | Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF; |
101 | Uart.byteCnt++; | |
102 | Uart.swapper = 0; | |
17505ce2 | 103 | if (Uart.byteCnt > 15) { return true; } |
cee5a30d | 104 | } |
105 | else { | |
106 | Uart.swapper = 1; | |
107 | }*/ | |
108 | ||
17505ce2 | 109 | if (Uart.state != STATE_UNSYNCD) { |
cee5a30d | 110 | Uart.posCnt++; |
111 | ||
17505ce2 | 112 | if ((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) { |
cee5a30d | 113 | bit = 0x00; |
17505ce2 | 114 | } else { |
cee5a30d | 115 | bit = 0x01; |
116 | } | |
17505ce2 | 117 | if (((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) { |
cee5a30d | 118 | bitright = 0x00; |
17505ce2 | 119 | } else { |
cee5a30d | 120 | bitright = 0x01; |
121 | } | |
17505ce2 | 122 | if (bit != bitright) { |
123 | bit = bitright; | |
124 | } | |
125 | ||
cee5a30d | 126 | |
cee5a30d | 127 | // So, now we only have to deal with *bit*, lets see... |
17505ce2 | 128 | if (Uart.posCnt == 1) { |
cee5a30d | 129 | // measurement first half bitperiod |
17505ce2 | 130 | if (!bit) { |
cee5a30d | 131 | // Drop in first half means that we are either seeing |
132 | // an SOF or an EOF. | |
133 | ||
17505ce2 | 134 | if (Uart.nOutOfCnt == 1) { |
cee5a30d | 135 | // End of Communication |
136 | Uart.state = STATE_UNSYNCD; | |
137 | Uart.highCnt = 0; | |
17505ce2 | 138 | if (Uart.byteCnt == 0) { |
cee5a30d | 139 | // Its not straightforward to show single EOFs |
44964fd1 | 140 | // So just leave it and do not return true |
6a1f2d82 | 141 | Uart.output[0] = 0xf0; |
cee5a30d | 142 | Uart.byteCnt++; |
17505ce2 | 143 | } else { |
44964fd1 | 144 | return true; |
cee5a30d | 145 | } |
17505ce2 | 146 | } else if (Uart.state != STATE_START_OF_COMMUNICATION) { |
cee5a30d | 147 | // When not part of SOF or EOF, it is an error |
148 | Uart.state = STATE_UNSYNCD; | |
149 | Uart.highCnt = 0; | |
9f693930 | 150 | //error = 4; |
cee5a30d | 151 | } |
152 | } | |
17505ce2 | 153 | } else { |
cee5a30d | 154 | // measurement second half bitperiod |
155 | // Count the bitslot we are in... (ISO 15693) | |
156 | Uart.nOutOfCnt++; | |
17505ce2 | 157 | |
158 | if (!bit) { | |
159 | if (Uart.dropPosition) { | |
160 | if (Uart.state == STATE_START_OF_COMMUNICATION) { | |
9f693930 | 161 | //error = 1; |
17505ce2 | 162 | } else { |
9f693930 | 163 | //error = 7; |
cee5a30d | 164 | } |
165 | // It is an error if we already have seen a drop in current frame | |
166 | Uart.state = STATE_UNSYNCD; | |
167 | Uart.highCnt = 0; | |
17505ce2 | 168 | } else { |
cee5a30d | 169 | Uart.dropPosition = Uart.nOutOfCnt; |
170 | } | |
171 | } | |
172 | ||
173 | Uart.posCnt = 0; | |
174 | ||
17505ce2 | 175 | |
176 | if (Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) { | |
cee5a30d | 177 | Uart.nOutOfCnt = 0; |
17505ce2 | 178 | |
179 | if (Uart.state == STATE_START_OF_COMMUNICATION) { | |
180 | if (Uart.dropPosition == 4) { | |
cee5a30d | 181 | Uart.state = STATE_RECEIVING; |
182 | Uart.OutOfCnt = 256; | |
17505ce2 | 183 | } else if (Uart.dropPosition == 3) { |
cee5a30d | 184 | Uart.state = STATE_RECEIVING; |
185 | Uart.OutOfCnt = 4; | |
186 | //Uart.output[Uart.byteCnt] = 0xdd; | |
187 | //Uart.byteCnt++; | |
17505ce2 | 188 | } else { |
cee5a30d | 189 | Uart.state = STATE_UNSYNCD; |
190 | Uart.highCnt = 0; | |
191 | } | |
192 | Uart.dropPosition = 0; | |
17505ce2 | 193 | } else { |
cee5a30d | 194 | // RECEIVING DATA |
195 | // 1 out of 4 | |
17505ce2 | 196 | if (!Uart.dropPosition) { |
cee5a30d | 197 | Uart.state = STATE_UNSYNCD; |
198 | Uart.highCnt = 0; | |
9f693930 | 199 | //error = 9; |
17505ce2 | 200 | } else { |
cee5a30d | 201 | Uart.shiftReg >>= 2; |
17505ce2 | 202 | |
cee5a30d | 203 | // Swap bit order |
204 | Uart.dropPosition--; | |
17505ce2 | 205 | //if (Uart.dropPosition == 1) { Uart.dropPosition = 2; } |
206 | //else if (Uart.dropPosition == 2) { Uart.dropPosition = 1; } | |
207 | ||
cee5a30d | 208 | Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6); |
209 | Uart.bitCnt += 2; | |
210 | Uart.dropPosition = 0; | |
211 | ||
17505ce2 | 212 | if (Uart.bitCnt == 8) { |
cee5a30d | 213 | Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff); |
214 | Uart.byteCnt++; | |
cee5a30d | 215 | Uart.bitCnt = 0; |
216 | Uart.shiftReg = 0; | |
217 | } | |
218 | } | |
219 | } | |
17505ce2 | 220 | } else if (Uart.nOutOfCnt == Uart.OutOfCnt) { |
cee5a30d | 221 | // RECEIVING DATA |
222 | // 1 out of 256 | |
17505ce2 | 223 | if (!Uart.dropPosition) { |
cee5a30d | 224 | Uart.state = STATE_UNSYNCD; |
225 | Uart.highCnt = 0; | |
9f693930 | 226 | //error = 3; |
17505ce2 | 227 | } else { |
cee5a30d | 228 | Uart.dropPosition--; |
229 | Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff); | |
230 | Uart.byteCnt++; | |
cee5a30d | 231 | Uart.bitCnt = 0; |
232 | Uart.shiftReg = 0; | |
233 | Uart.nOutOfCnt = 0; | |
234 | Uart.dropPosition = 0; | |
235 | } | |
236 | } | |
237 | ||
17505ce2 | 238 | /*if (error) { |
cee5a30d | 239 | Uart.output[Uart.byteCnt] = 0xAA; |
240 | Uart.byteCnt++; | |
241 | Uart.output[Uart.byteCnt] = error & 0xFF; | |
242 | Uart.byteCnt++; | |
243 | Uart.output[Uart.byteCnt] = 0xAA; | |
244 | Uart.byteCnt++; | |
245 | Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF; | |
246 | Uart.byteCnt++; | |
247 | Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF; | |
248 | Uart.byteCnt++; | |
249 | Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF; | |
250 | Uart.byteCnt++; | |
251 | Uart.output[Uart.byteCnt] = 0xAA; | |
252 | Uart.byteCnt++; | |
44964fd1 | 253 | return true; |
cee5a30d | 254 | }*/ |
255 | } | |
256 | ||
17505ce2 | 257 | } else { |
cee5a30d | 258 | bit = Uart.bitBuffer & 0xf0; |
259 | bit >>= 4; | |
260 | bit ^= 0x0F; // drops become 1s ;-) | |
17505ce2 | 261 | if (bit) { |
cee5a30d | 262 | // should have been high or at least (4 * 128) / fc |
263 | // according to ISO this should be at least (9 * 128 + 20) / fc | |
17505ce2 | 264 | if (Uart.highCnt == 8) { |
cee5a30d | 265 | // we went low, so this could be start of communication |
266 | // it turns out to be safer to choose a less significant | |
267 | // syncbit... so we check whether the neighbour also represents the drop | |
268 | Uart.posCnt = 1; // apparently we are busy with our first half bit period | |
269 | Uart.syncBit = bit & 8; | |
270 | Uart.samples = 3; | |
17505ce2 | 271 | if (!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; } |
272 | else if (bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; } | |
273 | if (!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; } | |
274 | else if (bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; } | |
275 | if (!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0; | |
276 | if (Uart.syncBit && (Uart.bitBuffer & 8)) { | |
cee5a30d | 277 | Uart.syncBit = 8; |
278 | ||
279 | // the first half bit period is expected in next sample | |
280 | Uart.posCnt = 0; | |
281 | Uart.samples = 3; | |
282 | } | |
17505ce2 | 283 | } else if (bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; } |
cee5a30d | 284 | |
285 | Uart.syncBit <<= 4; | |
286 | Uart.state = STATE_START_OF_COMMUNICATION; | |
287 | Uart.bitCnt = 0; | |
288 | Uart.byteCnt = 0; | |
cee5a30d | 289 | Uart.nOutOfCnt = 0; |
290 | Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256 | |
291 | Uart.dropPosition = 0; | |
292 | Uart.shiftReg = 0; | |
9f693930 | 293 | //error = 0; |
17505ce2 | 294 | } else { |
cee5a30d | 295 | Uart.highCnt = 0; |
296 | } | |
17505ce2 | 297 | } else if (Uart.highCnt < 8) { |
298 | Uart.highCnt++; | |
cee5a30d | 299 | } |
300 | } | |
301 | ||
17505ce2 | 302 | return false; |
cee5a30d | 303 | } |
304 | ||
17505ce2 | 305 | |
cee5a30d | 306 | //============================================================================= |
1e262141 | 307 | // Manchester |
cee5a30d | 308 | //============================================================================= |
309 | ||
310 | static struct { | |
17505ce2 | 311 | enum { |
312 | DEMOD_UNSYNCD, | |
cee5a30d | 313 | DEMOD_START_OF_COMMUNICATION, |
314 | DEMOD_START_OF_COMMUNICATION2, | |
315 | DEMOD_START_OF_COMMUNICATION3, | |
316 | DEMOD_SOF_COMPLETE, | |
317 | DEMOD_MANCHESTER_D, | |
318 | DEMOD_MANCHESTER_E, | |
319 | DEMOD_END_OF_COMMUNICATION, | |
320 | DEMOD_END_OF_COMMUNICATION2, | |
321 | DEMOD_MANCHESTER_F, | |
17505ce2 | 322 | DEMOD_ERROR_WAIT |
323 | } state; | |
324 | int bitCount; | |
325 | int posCount; | |
326 | int syncBit; | |
327 | uint16_t shiftReg; | |
328 | int buffer; | |
329 | int buffer2; | |
330 | int buffer3; | |
331 | int buff; | |
332 | int samples; | |
333 | int len; | |
cee5a30d | 334 | enum { |
335 | SUB_NONE, | |
336 | SUB_FIRST_HALF, | |
337 | SUB_SECOND_HALF, | |
338 | SUB_BOTH | |
17505ce2 | 339 | } sub; |
340 | uint8_t *output; | |
cee5a30d | 341 | } Demod; |
342 | ||
17505ce2 | 343 | static RAMFUNC int ManchesterDecoding(int v) { |
cee5a30d | 344 | int bit; |
345 | int modulation; | |
346 | int error = 0; | |
347 | ||
348 | bit = Demod.buffer; | |
349 | Demod.buffer = Demod.buffer2; | |
350 | Demod.buffer2 = Demod.buffer3; | |
351 | Demod.buffer3 = v; | |
352 | ||
17505ce2 | 353 | if (Demod.buff < 3) { |
cee5a30d | 354 | Demod.buff++; |
44964fd1 | 355 | return false; |
cee5a30d | 356 | } |
357 | ||
17505ce2 | 358 | if (Demod.state==DEMOD_UNSYNCD) { |
cee5a30d | 359 | Demod.output[Demod.len] = 0xfa; |
360 | Demod.syncBit = 0; | |
361 | //Demod.samples = 0; | |
17505ce2 | 362 | Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part |
cee5a30d | 363 | |
17505ce2 | 364 | if (bit & 0x08) { |
cee5a30d | 365 | Demod.syncBit = 0x08; |
366 | } | |
367 | ||
17505ce2 | 368 | if (bit & 0x04) { |
369 | if (Demod.syncBit) { | |
cee5a30d | 370 | bit <<= 4; |
371 | } | |
372 | Demod.syncBit = 0x04; | |
373 | } | |
374 | ||
17505ce2 | 375 | if (bit & 0x02) { |
376 | if (Demod.syncBit) { | |
cee5a30d | 377 | bit <<= 2; |
378 | } | |
379 | Demod.syncBit = 0x02; | |
380 | } | |
381 | ||
17505ce2 | 382 | if (bit & 0x01 && Demod.syncBit) { |
cee5a30d | 383 | Demod.syncBit = 0x01; |
384 | } | |
17505ce2 | 385 | |
386 | if (Demod.syncBit) { | |
cee5a30d | 387 | Demod.len = 0; |
388 | Demod.state = DEMOD_START_OF_COMMUNICATION; | |
389 | Demod.sub = SUB_FIRST_HALF; | |
390 | Demod.bitCount = 0; | |
391 | Demod.shiftReg = 0; | |
cee5a30d | 392 | Demod.samples = 0; |
17505ce2 | 393 | if (Demod.posCount) { |
394 | //if (trigger) LED_A_OFF(); // Not useful in this case... | |
cee5a30d | 395 | switch(Demod.syncBit) { |
396 | case 0x08: Demod.samples = 3; break; | |
397 | case 0x04: Demod.samples = 2; break; | |
398 | case 0x02: Demod.samples = 1; break; | |
399 | case 0x01: Demod.samples = 0; break; | |
400 | } | |
401 | // SOF must be long burst... otherwise stay unsynced!!! | |
17505ce2 | 402 | if (!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) { |
cee5a30d | 403 | Demod.state = DEMOD_UNSYNCD; |
404 | } | |
17505ce2 | 405 | } else { |
cee5a30d | 406 | // SOF must be long burst... otherwise stay unsynced!!! |
17505ce2 | 407 | if (!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) { |
cee5a30d | 408 | Demod.state = DEMOD_UNSYNCD; |
409 | error = 0x88; | |
410 | } | |
411 | ||
412 | } | |
413 | error = 0; | |
414 | ||
415 | } | |
17505ce2 | 416 | } else { |
cee5a30d | 417 | modulation = bit & Demod.syncBit; |
418 | modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit; | |
cee5a30d | 419 | |
420 | Demod.samples += 4; | |
421 | ||
17505ce2 | 422 | if (Demod.posCount==0) { |
cee5a30d | 423 | Demod.posCount = 1; |
17505ce2 | 424 | if (modulation) { |
cee5a30d | 425 | Demod.sub = SUB_FIRST_HALF; |
17505ce2 | 426 | } else { |
cee5a30d | 427 | Demod.sub = SUB_NONE; |
428 | } | |
17505ce2 | 429 | } else { |
cee5a30d | 430 | Demod.posCount = 0; |
431 | /*(modulation && (Demod.sub == SUB_FIRST_HALF)) { | |
17505ce2 | 432 | if (Demod.state!=DEMOD_ERROR_WAIT) { |
cee5a30d | 433 | Demod.state = DEMOD_ERROR_WAIT; |
434 | Demod.output[Demod.len] = 0xaa; | |
435 | error = 0x01; | |
436 | } | |
437 | }*/ | |
17505ce2 | 438 | //else if (modulation) { |
439 | if (modulation) { | |
440 | if (Demod.sub == SUB_FIRST_HALF) { | |
cee5a30d | 441 | Demod.sub = SUB_BOTH; |
17505ce2 | 442 | } else { |
cee5a30d | 443 | Demod.sub = SUB_SECOND_HALF; |
444 | } | |
17505ce2 | 445 | } else if (Demod.sub == SUB_NONE) { |
446 | if (Demod.state == DEMOD_SOF_COMPLETE) { | |
cee5a30d | 447 | Demod.output[Demod.len] = 0x0f; |
448 | Demod.len++; | |
cee5a30d | 449 | Demod.state = DEMOD_UNSYNCD; |
17505ce2 | 450 | // error = 0x0f; |
44964fd1 | 451 | return true; |
17505ce2 | 452 | } else { |
cee5a30d | 453 | Demod.state = DEMOD_ERROR_WAIT; |
454 | error = 0x33; | |
455 | } | |
17505ce2 | 456 | /*if (Demod.state!=DEMOD_ERROR_WAIT) { |
cee5a30d | 457 | Demod.state = DEMOD_ERROR_WAIT; |
458 | Demod.output[Demod.len] = 0xaa; | |
459 | error = 0x01; | |
460 | }*/ | |
461 | } | |
462 | ||
463 | switch(Demod.state) { | |
464 | case DEMOD_START_OF_COMMUNICATION: | |
17505ce2 | 465 | if (Demod.sub == SUB_BOTH) { |
cee5a30d | 466 | //Demod.state = DEMOD_MANCHESTER_D; |
467 | Demod.state = DEMOD_START_OF_COMMUNICATION2; | |
468 | Demod.posCount = 1; | |
469 | Demod.sub = SUB_NONE; | |
17505ce2 | 470 | } else { |
cee5a30d | 471 | Demod.output[Demod.len] = 0xab; |
472 | Demod.state = DEMOD_ERROR_WAIT; | |
473 | error = 0xd2; | |
474 | } | |
475 | break; | |
476 | case DEMOD_START_OF_COMMUNICATION2: | |
17505ce2 | 477 | if (Demod.sub == SUB_SECOND_HALF) { |
cee5a30d | 478 | Demod.state = DEMOD_START_OF_COMMUNICATION3; |
17505ce2 | 479 | } else { |
cee5a30d | 480 | Demod.output[Demod.len] = 0xab; |
481 | Demod.state = DEMOD_ERROR_WAIT; | |
482 | error = 0xd3; | |
483 | } | |
484 | break; | |
485 | case DEMOD_START_OF_COMMUNICATION3: | |
17505ce2 | 486 | if (Demod.sub == SUB_SECOND_HALF) { |
487 | // Demod.state = DEMOD_MANCHESTER_D; | |
cee5a30d | 488 | Demod.state = DEMOD_SOF_COMPLETE; |
489 | //Demod.output[Demod.len] = Demod.syncBit & 0xFF; | |
490 | //Demod.len++; | |
17505ce2 | 491 | } else { |
cee5a30d | 492 | Demod.output[Demod.len] = 0xab; |
493 | Demod.state = DEMOD_ERROR_WAIT; | |
494 | error = 0xd4; | |
495 | } | |
496 | break; | |
497 | case DEMOD_SOF_COMPLETE: | |
498 | case DEMOD_MANCHESTER_D: | |
499 | case DEMOD_MANCHESTER_E: | |
500 | // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443) | |
501 | // 00001111 = 1 (0 in 14443) | |
17505ce2 | 502 | if (Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF |
cee5a30d | 503 | Demod.bitCount++; |
504 | Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100; | |
505 | Demod.state = DEMOD_MANCHESTER_D; | |
17505ce2 | 506 | } else if (Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF |
cee5a30d | 507 | Demod.bitCount++; |
508 | Demod.shiftReg >>= 1; | |
509 | Demod.state = DEMOD_MANCHESTER_E; | |
17505ce2 | 510 | } else if (Demod.sub == SUB_BOTH) { |
cee5a30d | 511 | Demod.state = DEMOD_MANCHESTER_F; |
17505ce2 | 512 | } else { |
cee5a30d | 513 | Demod.state = DEMOD_ERROR_WAIT; |
514 | error = 0x55; | |
515 | } | |
516 | break; | |
517 | ||
518 | case DEMOD_MANCHESTER_F: | |
519 | // Tag response does not need to be a complete byte! | |
17505ce2 | 520 | if (Demod.len > 0 || Demod.bitCount > 0) { |
521 | if (Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF | |
522 | Demod.shiftReg >>= (9 - Demod.bitCount); // right align data | |
cee5a30d | 523 | Demod.output[Demod.len] = Demod.shiftReg & 0xff; |
524 | Demod.len++; | |
cee5a30d | 525 | } |
526 | ||
527 | Demod.state = DEMOD_UNSYNCD; | |
44964fd1 | 528 | return true; |
17505ce2 | 529 | } else { |
cee5a30d | 530 | Demod.output[Demod.len] = 0xad; |
531 | Demod.state = DEMOD_ERROR_WAIT; | |
532 | error = 0x03; | |
533 | } | |
534 | break; | |
535 | ||
536 | case DEMOD_ERROR_WAIT: | |
537 | Demod.state = DEMOD_UNSYNCD; | |
538 | break; | |
539 | ||
540 | default: | |
541 | Demod.output[Demod.len] = 0xdd; | |
542 | Demod.state = DEMOD_UNSYNCD; | |
543 | break; | |
544 | } | |
545 | ||
17505ce2 | 546 | /*if (Demod.bitCount>=9) { |
cee5a30d | 547 | Demod.output[Demod.len] = Demod.shiftReg & 0xff; |
548 | Demod.len++; | |
549 | ||
550 | Demod.parityBits <<= 1; | |
551 | Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01); | |
552 | ||
553 | Demod.bitCount = 0; | |
554 | Demod.shiftReg = 0; | |
555 | }*/ | |
17505ce2 | 556 | if (Demod.bitCount >= 8) { |
cee5a30d | 557 | Demod.shiftReg >>= 1; |
558 | Demod.output[Demod.len] = (Demod.shiftReg & 0xff); | |
559 | Demod.len++; | |
cee5a30d | 560 | Demod.bitCount = 0; |
561 | Demod.shiftReg = 0; | |
562 | } | |
563 | ||
17505ce2 | 564 | if (error) { |
cee5a30d | 565 | Demod.output[Demod.len] = 0xBB; |
566 | Demod.len++; | |
567 | Demod.output[Demod.len] = error & 0xFF; | |
568 | Demod.len++; | |
569 | Demod.output[Demod.len] = 0xBB; | |
570 | Demod.len++; | |
571 | Demod.output[Demod.len] = bit & 0xFF; | |
572 | Demod.len++; | |
573 | Demod.output[Demod.len] = Demod.buffer & 0xFF; | |
574 | Demod.len++; | |
575 | // Look harder ;-) | |
576 | Demod.output[Demod.len] = Demod.buffer2 & 0xFF; | |
577 | Demod.len++; | |
578 | Demod.output[Demod.len] = Demod.syncBit & 0xFF; | |
579 | Demod.len++; | |
580 | Demod.output[Demod.len] = 0xBB; | |
581 | Demod.len++; | |
44964fd1 | 582 | return true; |
cee5a30d | 583 | } |
584 | ||
585 | } | |
586 | ||
587 | } // end (state != UNSYNCED) | |
588 | ||
17505ce2 | 589 | return false; |
cee5a30d | 590 | } |
591 | ||
592 | //============================================================================= | |
1e262141 | 593 | // Finally, a `sniffer' for iClass communication |
cee5a30d | 594 | // Both sides of communication! |
595 | //============================================================================= | |
596 | ||
597 | //----------------------------------------------------------------------------- | |
598 | // Record the sequence of commands sent by the reader to the tag, with | |
599 | // triggering so that we start recording at the point that the tag is moved | |
600 | // near the reader. | |
601 | //----------------------------------------------------------------------------- | |
17505ce2 | 602 | void RAMFUNC SnoopIClass(void) { |
cee5a30d | 603 | |
17505ce2 | 604 | // We won't start recording the frames that we acquire until we trigger; |
605 | // a good trigger condition to get started is probably when we see a | |
606 | // response from the tag. | |
607 | //int triggered = false; // false to wait first for card | |
cee5a30d | 608 | |
17505ce2 | 609 | // The command (reader -> tag) that we're receiving. |
cee5a30d | 610 | // The length of a received command will in most cases be no more than 18 bytes. |
611 | // So 32 should be enough! | |
f71f4deb | 612 | #define ICLASS_BUFFER_SIZE 32 |
613 | uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE]; | |
17505ce2 | 614 | // The response (tag -> reader) that we're receiving. |
f71f4deb | 615 | uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE]; |
17505ce2 | 616 | |
617 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
618 | ||
619 | // free all BigBuf memory | |
f71f4deb | 620 | BigBuf_free(); |
17505ce2 | 621 | // The DMA buffer, used to stream samples from the FPGA |
622 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); | |
623 | ||
44964fd1 | 624 | set_tracing(true); |
3000dc4e | 625 | clear_trace(); |
17505ce2 | 626 | iso14a_set_trigger(false); |
cee5a30d | 627 | |
f71f4deb | 628 | int lastRxCounter; |
17505ce2 | 629 | uint8_t *upTo; |
630 | int smpl; | |
631 | int maxBehindBy = 0; | |
cee5a30d | 632 | |
17505ce2 | 633 | // Count of samples received so far, so that we can include timing |
634 | // information in the trace buffer. | |
635 | int samples = 0; | |
636 | rsamples = 0; | |
cee5a30d | 637 | |
17505ce2 | 638 | // Set up the demodulator for tag -> reader responses. |
17cba269 | 639 | Demod.output = tagToReaderResponse; |
17505ce2 | 640 | Demod.len = 0; |
641 | Demod.state = DEMOD_UNSYNCD; | |
cee5a30d | 642 | |
17505ce2 | 643 | // Setup for the DMA. |
644 | FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A); | |
645 | upTo = dmaBuf; | |
646 | lastRxCounter = DMA_BUFFER_SIZE; | |
647 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); | |
cee5a30d | 648 | |
17505ce2 | 649 | // And the reader -> tag commands |
650 | memset(&Uart, 0, sizeof(Uart)); | |
17cba269 | 651 | Uart.output = readerToTagCmd; |
17505ce2 | 652 | Uart.byteCntMax = 32; // was 100 (greg)//////////////////////////////////////////////////////////////////////// |
653 | Uart.state = STATE_UNSYNCD; | |
cee5a30d | 654 | |
17505ce2 | 655 | // And put the FPGA in the appropriate mode |
656 | // Signal field is off with the appropriate LED | |
657 | LED_D_OFF(); | |
658 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER); | |
659 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
cee5a30d | 660 | |
81012e67 | 661 | uint32_t time_0 = GetCountSspClk(); |
55eaed8f MHS |
662 | uint32_t time_start = 0; |
663 | uint32_t time_stop = 0; | |
81012e67 | 664 | |
17505ce2 | 665 | int div = 0; |
666 | //int div2 = 0; | |
667 | int decbyte = 0; | |
668 | int decbyter = 0; | |
cee5a30d | 669 | |
17505ce2 | 670 | // And now we loop, receiving samples. |
671 | for (;;) { | |
672 | LED_A_ON(); | |
673 | WDT_HIT(); | |
674 | int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1); | |
675 | if (behindBy > maxBehindBy) { | |
676 | maxBehindBy = behindBy; | |
677 | if (behindBy > (9 * DMA_BUFFER_SIZE / 10)) { | |
678 | Dbprintf("blew circular buffer! behindBy=0x%x", behindBy); | |
679 | goto done; | |
680 | } | |
cee5a30d | 681 | } |
17505ce2 | 682 | if (behindBy < 1) continue; |
cee5a30d | 683 | |
17505ce2 | 684 | LED_A_OFF(); |
685 | smpl = upTo[0]; | |
686 | upTo++; | |
687 | lastRxCounter -= 1; | |
688 | if (upTo - dmaBuf > DMA_BUFFER_SIZE) { | |
689 | upTo -= DMA_BUFFER_SIZE; | |
690 | lastRxCounter += DMA_BUFFER_SIZE; | |
691 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo; | |
692 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; | |
693 | } | |
694 | ||
695 | //samples += 4; | |
696 | samples += 1; | |
697 | ||
698 | if (smpl & 0xF) { | |
699 | decbyte ^= (1 << (3 - div)); | |
700 | } | |
701 | ||
702 | // FOR READER SIDE COMMUMICATION... | |
703 | ||
704 | decbyter <<= 2; | |
705 | decbyter ^= (smpl & 0x30); | |
706 | ||
707 | div++; | |
708 | ||
709 | if ((div + 1) % 2 == 0) { | |
710 | smpl = decbyter; | |
711 | if (OutOfNDecoding((smpl & 0xF0) >> 4)) { | |
712 | rsamples = samples - Uart.samples; | |
713 | time_stop = (GetCountSspClk()-time_0) << 4; | |
714 | LED_C_ON(); | |
715 | ||
716 | //if (!LogTrace(Uart.output, Uart.byteCnt, rsamples, Uart.parityBits,true)) break; | |
717 | //if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, true)) break; | |
718 | uint8_t parity[MAX_PARITY_SIZE]; | |
719 | GetParity(Uart.output, Uart.byteCnt, parity); | |
720 | LogTrace(Uart.output, Uart.byteCnt, time_start, time_stop, parity, true); | |
721 | ||
722 | /* And ready to receive another command. */ | |
723 | Uart.state = STATE_UNSYNCD; | |
724 | /* And also reset the demod code, which might have been */ | |
725 | /* false-triggered by the commands from the reader. */ | |
726 | Demod.state = DEMOD_UNSYNCD; | |
727 | LED_B_OFF(); | |
728 | Uart.byteCnt = 0; | |
729 | } else { | |
730 | time_start = (GetCountSspClk()-time_0) << 4; | |
731 | } | |
732 | decbyter = 0; | |
733 | } | |
734 | ||
735 | if (div > 3) { | |
736 | smpl = decbyte; | |
737 | if (ManchesterDecoding(smpl & 0x0F)) { | |
738 | time_stop = (GetCountSspClk()-time_0) << 4; | |
739 | ||
740 | rsamples = samples - Demod.samples; | |
741 | LED_B_ON(); | |
742 | ||
743 | uint8_t parity[MAX_PARITY_SIZE]; | |
744 | GetParity(Demod.output, Demod.len, parity); | |
745 | LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, false); | |
746 | ||
747 | // And ready to receive another response. | |
748 | memset(&Demod, 0, sizeof(Demod)); | |
749 | Demod.output = tagToReaderResponse; | |
750 | Demod.state = DEMOD_UNSYNCD; | |
751 | LED_C_OFF(); | |
752 | } else { | |
753 | time_start = (GetCountSspClk()-time_0) << 4; | |
754 | } | |
755 | ||
756 | div = 0; | |
757 | decbyte = 0x00; | |
cee5a30d | 758 | } |
cee5a30d | 759 | |
17505ce2 | 760 | if (BUTTON_PRESS()) { |
761 | DbpString("cancelled_a"); | |
762 | goto done; | |
763 | } | |
764 | } | |
cee5a30d | 765 | |
17505ce2 | 766 | DbpString("COMMAND FINISHED"); |
cee5a30d | 767 | |
17505ce2 | 768 | Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt); |
3000dc4e | 769 | Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]); |
cee5a30d | 770 | |
771 | done: | |
17505ce2 | 772 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; |
773 | Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt); | |
3000dc4e | 774 | Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]); |
17505ce2 | 775 | LEDsoff(); |
1e262141 | 776 | } |
777 | ||
912a3e94 | 778 | void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) { |
17505ce2 | 779 | int i; |
780 | for (i = 0; i < 8; i++) { | |
912a3e94 | 781 | rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5); |
1e262141 | 782 | } |
783 | } | |
784 | ||
785 | //----------------------------------------------------------------------------- | |
786 | // Wait for commands from reader | |
787 | // Stop when button is pressed | |
44964fd1 | 788 | // Or return true when command is captured |
1e262141 | 789 | //----------------------------------------------------------------------------- |
790 | static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen) | |
791 | { | |
17505ce2 | 792 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen |
793 | // only, since we are receiving, not transmitting). | |
794 | // Signal field is off with the appropriate LED | |
795 | LED_D_OFF(); | |
796 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1e262141 | 797 | |
17505ce2 | 798 | // Now run a `software UART' on the stream of incoming samples. |
799 | Uart.output = received; | |
800 | Uart.byteCntMax = maxLen; | |
801 | Uart.state = STATE_UNSYNCD; | |
1e262141 | 802 | |
17505ce2 | 803 | for (;;) { |
804 | WDT_HIT(); | |
1e262141 | 805 | |
17505ce2 | 806 | if (BUTTON_PRESS()) return false; |
1e262141 | 807 | |
17505ce2 | 808 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
809 | AT91C_BASE_SSC->SSC_THR = 0x00; | |
810 | } | |
811 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
812 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
3fe4ff4f | 813 | |
17505ce2 | 814 | if (OutOfNDecoding(b & 0x0f)) { |
1e262141 | 815 | *len = Uart.byteCnt; |
44964fd1 | 816 | return true; |
1e262141 | 817 | } |
17505ce2 | 818 | } |
819 | } | |
1e262141 | 820 | } |
821 | ||
17505ce2 | 822 | static uint8_t encode4Bits(const uint8_t b) { |
645c960f MHS |
823 | uint8_t c = b & 0xF; |
824 | // OTA, the least significant bits first | |
825 | // The columns are | |
826 | // 1 - Bit value to send | |
827 | // 2 - Reversed (big-endian) | |
828 | // 3 - Encoded | |
829 | // 4 - Hex values | |
830 | ||
831 | switch(c){ | |
832 | // 1 2 3 4 | |
833 | case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55 | |
834 | case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95 | |
835 | case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65 | |
836 | case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5 | |
837 | case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59 | |
838 | case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99 | |
839 | case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69 | |
840 | case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9 | |
841 | case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56 | |
842 | case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96 | |
843 | case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66 | |
844 | case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6 | |
845 | case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a | |
846 | case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a | |
847 | case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a | |
848 | default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa | |
849 | ||
850 | } | |
851 | } | |
1e262141 | 852 | |
853 | //----------------------------------------------------------------------------- | |
854 | // Prepare tag messages | |
855 | //----------------------------------------------------------------------------- | |
17505ce2 | 856 | static void CodeIClassTagAnswer(const uint8_t *cmd, int len) { |
645c960f MHS |
857 | |
858 | /* | |
859 | * SOF comprises 3 parts; | |
860 | * * An unmodulated time of 56.64 us | |
17505ce2 | 861 | * * 24 pulses of 423.75 kHz (fc/32) |
645c960f MHS |
862 | * * A logic 1, which starts with an unmodulated time of 18.88us |
863 | * followed by 8 pulses of 423.75kHz (fc/32) | |
864 | * | |
865 | * | |
866 | * EOF comprises 3 parts: | |
867 | * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated | |
868 | * time of 18.88us. | |
869 | * - 24 pulses of fc/32 | |
870 | * - An unmodulated time of 56.64 us | |
871 | * | |
872 | * | |
873 | * A logic 0 starts with 8 pulses of fc/32 | |
874 | * followed by an unmodulated time of 256/fc (~18,88us). | |
875 | * | |
876 | * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by | |
877 | * 8 pulses of fc/32 (also 18.88us) | |
878 | * | |
879 | * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag, | |
880 | * works like this. | |
881 | * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us). | |
17505ce2 | 882 | * - A 0-bit input to the FPGA becomes an unmodulated time of 18.88us |
645c960f | 883 | * |
6b038d19 | 884 | * In this mode the SOF can be written as 00011101 = 0x1D |
645c960f MHS |
885 | * The EOF can be written as 10111000 = 0xb8 |
886 | * A logic 1 is 01 | |
887 | * A logic 0 is 10 | |
888 | * | |
889 | * */ | |
890 | ||
1e262141 | 891 | int i; |
892 | ||
893 | ToSendReset(); | |
894 | ||
895 | // Send SOF | |
645c960f | 896 | ToSend[++ToSendMax] = 0x1D; |
1e262141 | 897 | |
17505ce2 | 898 | for (i = 0; i < len; i++) { |
1e262141 | 899 | uint8_t b = cmd[i]; |
17505ce2 | 900 | ToSend[++ToSendMax] = encode4Bits(b & 0xF); // Least significant half |
901 | ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF); // Most significant half | |
1e262141 | 902 | } |
903 | ||
904 | // Send EOF | |
645c960f | 905 | ToSend[++ToSendMax] = 0xB8; |
81012e67 | 906 | //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end |
1e262141 | 907 | // Convert from last byte pos to length |
908 | ToSendMax++; | |
909 | } | |
910 | ||
17505ce2 | 911 | // Only SOF |
912 | static void CodeIClassTagSOF() { | |
81012e67 MHS |
913 | //So far a dummy implementation, not used |
914 | //int lastProxToAirDuration =0; | |
1e262141 | 915 | |
81012e67 | 916 | ToSendReset(); |
1e262141 | 917 | // Send SOF |
645c960f | 918 | ToSend[++ToSendMax] = 0x1D; |
17505ce2 | 919 | // lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning |
81012e67 | 920 | |
1e262141 | 921 | // Convert from last byte pos to length |
922 | ToSendMax++; | |
923 | } | |
1e262141 | 924 | |
17505ce2 | 925 | static void AppendCrc(uint8_t *data, int len) { |
926 | ComputeCrc14443(CRC_ICLASS, data, len, data+len, data+len+1); | |
927 | } | |
81cd0474 | 928 | |
17505ce2 | 929 | static int SendIClassAnswer(uint8_t *resp, int respLen, int delay) { |
930 | int i = 0, d = 0;//, u = 0, d = 0; | |
931 | uint8_t b = 0; | |
9f6e9d15 | 932 | |
17505ce2 | 933 | //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K); |
934 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K_8BIT); | |
ff7bb4ef | 935 | |
17505ce2 | 936 | AT91C_BASE_SSC->SSC_THR = 0x00; |
937 | FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR); | |
938 | while (!BUTTON_PRESS()) { | |
939 | if ((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){ | |
940 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
941 | } | |
942 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){ | |
943 | b = 0x00; | |
944 | if (d < delay) { | |
945 | d++; | |
f83cc126 | 946 | } |
17505ce2 | 947 | else { |
948 | if (i < respLen) { | |
949 | b = resp[i]; | |
950 | //Hack | |
951 | //b = 0xAC; | |
952 | } | |
953 | i++; | |
954 | } | |
955 | AT91C_BASE_SSC->SSC_THR = b; | |
ff7bb4ef | 956 | } |
9f6e9d15 | 957 | |
17505ce2 | 958 | // if (i > respLen +4) break; |
959 | if (i > respLen + 1) break; | |
81012e67 | 960 | } |
ff7bb4ef | 961 | |
17505ce2 | 962 | return 0; |
ff7bb4ef | 963 | } |
17505ce2 | 964 | |
965 | ||
966 | #define MODE_SIM_CSN 0 | |
967 | #define MODE_EXIT_AFTER_MAC 1 | |
968 | #define MODE_FULLSIM 2 | |
b67f7ec3 | 969 | |
ff7bb4ef MHS |
970 | /** |
971 | * @brief Does the actual simulation | |
972 | * @param csn - csn to use | |
973 | * @param breakAfterMacReceived if true, returns after reader MAC has been received. | |
974 | */ | |
17505ce2 | 975 | int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) { |
b67f7ec3 MHS |
976 | // free eventually allocated BigBuf memory |
977 | BigBuf_free_keep_EM(); | |
55eaed8f | 978 | |
61fe9073 | 979 | State cipher_state; |
17505ce2 | 980 | // State cipher_state_reserve; |
b67f7ec3 MHS |
981 | uint8_t *csn = BigBuf_get_EM_addr(); |
982 | uint8_t *emulator = csn; | |
983 | uint8_t sof_data[] = { 0x0F} ; | |
1e262141 | 984 | // CSN followed by two CRC bytes |
b67f7ec3 MHS |
985 | uint8_t anticoll_data[10] = { 0 }; |
986 | uint8_t csn_data[10] = { 0 }; | |
17505ce2 | 987 | memcpy(csn_data, csn, sizeof(csn_data)); |
988 | Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x", csn[0], csn[1], csn[2], csn[3], csn[4], csn[5], csn[6], csn[7]); | |
1e262141 | 989 | |
1e262141 | 990 | // Construct anticollision-CSN |
17505ce2 | 991 | rotateCSN(csn_data, anticoll_data); |
1e262141 | 992 | |
993 | // Compute CRC on both CSNs | |
b67f7ec3 MHS |
994 | ComputeCrc14443(CRC_ICLASS, anticoll_data, 8, &anticoll_data[8], &anticoll_data[9]); |
995 | ComputeCrc14443(CRC_ICLASS, csn_data, 8, &csn_data[8], &csn_data[9]); | |
996 | ||
61fe9073 | 997 | uint8_t diversified_key[8] = { 0 }; |
b67f7ec3 MHS |
998 | // e-Purse |
999 | uint8_t card_challenge_data[8] = { 0x00 }; | |
17505ce2 | 1000 | if (simulationMode == MODE_FULLSIM) { |
e5cd4ee4 MHS |
1001 | //The diversified key should be stored on block 3 |
1002 | //Get the diversified key from emulator memory | |
17505ce2 | 1003 | memcpy(diversified_key, emulator + (8*3), 8); |
b67f7ec3 | 1004 | //Card challenge, a.k.a e-purse is on block 2 |
17505ce2 | 1005 | memcpy(card_challenge_data, emulator + (8 * 2), 8); |
61fe9073 | 1006 | //Precalculate the cipher state, feeding it the CC |
17505ce2 | 1007 | cipher_state = opt_doTagMAC_1(card_challenge_data, diversified_key); |
b67f7ec3 | 1008 | } |
1e262141 | 1009 | |
ff7bb4ef | 1010 | int exitLoop = 0; |
1e262141 | 1011 | // Reader 0a |
1012 | // Tag 0f | |
1013 | // Reader 0c | |
1014 | // Tag anticoll. CSN | |
1015 | // Reader 81 anticoll. CSN | |
1016 | // Tag CSN | |
1017 | ||
55eaed8f | 1018 | uint8_t *modulated_response; |
b19caaef | 1019 | int modulated_response_size = 0; |
17505ce2 | 1020 | uint8_t *trace_data = NULL; |
55eaed8f | 1021 | int trace_data_size = 0; |
1e262141 | 1022 | |
645c960f | 1023 | // Respond SOF -- takes 1 bytes |
b67f7ec3 MHS |
1024 | uint8_t *resp_sof = BigBuf_malloc(2); |
1025 | int resp_sof_Len; | |
1e262141 | 1026 | |
1027 | // Anticollision CSN (rotated CSN) | |
645c960f | 1028 | // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte) |
b67f7ec3 MHS |
1029 | uint8_t *resp_anticoll = BigBuf_malloc(28); |
1030 | int resp_anticoll_len; | |
1e262141 | 1031 | |
1032 | // CSN | |
645c960f | 1033 | // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte) |
b67f7ec3 MHS |
1034 | uint8_t *resp_csn = BigBuf_malloc(30); |
1035 | int resp_csn_len; | |
1e262141 | 1036 | |
1037 | // e-Purse | |
b3cc5f29 | 1038 | // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit) |
b67f7ec3 MHS |
1039 | uint8_t *resp_cc = BigBuf_malloc(20); |
1040 | int resp_cc_len; | |
1e262141 | 1041 | |
f71f4deb | 1042 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); |
1e262141 | 1043 | int len; |
1044 | ||
1e262141 | 1045 | // Prepare card messages |
1046 | ToSendMax = 0; | |
1047 | ||
1048 | // First card answer: SOF | |
1049 | CodeIClassTagSOF(); | |
17505ce2 | 1050 | memcpy(resp_sof, ToSend, ToSendMax); |
1051 | resp_sof_Len = ToSendMax; | |
1e262141 | 1052 | |
1053 | // Anticollision CSN | |
b67f7ec3 | 1054 | CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data)); |
17505ce2 | 1055 | memcpy(resp_anticoll, ToSend, ToSendMax); |
1056 | resp_anticoll_len = ToSendMax; | |
1e262141 | 1057 | |
1058 | // CSN | |
b67f7ec3 | 1059 | CodeIClassTagAnswer(csn_data, sizeof(csn_data)); |
17505ce2 | 1060 | memcpy(resp_csn, ToSend, ToSendMax); |
1061 | resp_csn_len = ToSendMax; | |
1e262141 | 1062 | |
1063 | // e-Purse | |
b67f7ec3 MHS |
1064 | CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data)); |
1065 | memcpy(resp_cc, ToSend, ToSendMax); resp_cc_len = ToSendMax; | |
1e262141 | 1066 | |
b19caaef | 1067 | //This is used for responding to READ-block commands or other data which is dynamically generated |
c8387e85 MHS |
1068 | //First the 'trace'-data, not encoded for FPGA |
1069 | uint8_t *data_generic_trace = BigBuf_malloc(8 + 2);//8 bytes data + 2byte CRC is max tag answer | |
1070 | //Then storage for the modulated data | |
1071 | //Each bit is doubled when modulated for FPGA, and we also have SOF and EOF (2 bytes) | |
1072 | uint8_t *data_response = BigBuf_malloc( (8+2) * 2 + 2); | |
e3dc1e4c MHS |
1073 | |
1074 | // Start from off (no field generated) | |
fa541aca MHS |
1075 | //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1076 | //SpinDelay(200); | |
1077 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1078 | SpinDelay(100); | |
1079 | StartCountSspClk(); | |
1e262141 | 1080 | // We need to listen to the high-frequency, peak-detected path. |
1081 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
6a5d4e17 | 1082 | FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A); |
1e262141 | 1083 | |
1084 | // To control where we are in the protocol | |
1e262141 | 1085 | int cmdsRecvd = 0; |
81012e67 MHS |
1086 | uint32_t time_0 = GetCountSspClk(); |
1087 | uint32_t t2r_time =0; | |
1088 | uint32_t r2t_time =0; | |
912a3e94 | 1089 | |
1e262141 | 1090 | LED_A_ON(); |
f83cc126 | 1091 | bool buttonPressed = false; |
e5cd4ee4 | 1092 | uint8_t response_delay = 1; |
17505ce2 | 1093 | while (!exitLoop) { |
e5cd4ee4 | 1094 | response_delay = 1; |
1e262141 | 1095 | LED_B_OFF(); |
e3dc1e4c MHS |
1096 | //Signal tracer |
1097 | // Can be used to get a trigger for an oscilloscope.. | |
1098 | LED_C_OFF(); | |
3fe4ff4f | 1099 | |
17505ce2 | 1100 | if (!GetIClassCommandFromReader(receivedCmd, &len, 100)) { |
f83cc126 | 1101 | buttonPressed = true; |
1e262141 | 1102 | break; |
81cd0474 | 1103 | } |
81012e67 | 1104 | r2t_time = GetCountSspClk(); |
e3dc1e4c MHS |
1105 | //Signal tracer |
1106 | LED_C_ON(); | |
1e262141 | 1107 | |
81cd0474 | 1108 | // Okay, look at the command now. |
17505ce2 | 1109 | if (receivedCmd[0] == ICLASS_CMD_ACTALL) { |
1e262141 | 1110 | // Reader in anticollission phase |
17505ce2 | 1111 | modulated_response = resp_sof; |
1112 | modulated_response_size = resp_sof_Len; //order = 1; | |
b67f7ec3 MHS |
1113 | trace_data = sof_data; |
1114 | trace_data_size = sizeof(sof_data); | |
17505ce2 | 1115 | } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) { |
1e262141 | 1116 | // Reader asks for anticollission CSN |
17505ce2 | 1117 | modulated_response = resp_anticoll; |
1118 | modulated_response_size = resp_anticoll_len; //order = 2; | |
b67f7ec3 MHS |
1119 | trace_data = anticoll_data; |
1120 | trace_data_size = sizeof(anticoll_data); | |
1e262141 | 1121 | //DbpString("Reader requests anticollission CSN:"); |
17505ce2 | 1122 | } else if (receivedCmd[0] == ICLASS_CMD_SELECT) { |
1e262141 | 1123 | // Reader selects anticollission CSN. |
1124 | // Tag sends the corresponding real CSN | |
17505ce2 | 1125 | modulated_response = resp_csn; |
1126 | modulated_response_size = resp_csn_len; //order = 3; | |
b67f7ec3 MHS |
1127 | trace_data = csn_data; |
1128 | trace_data_size = sizeof(csn_data); | |
1e262141 | 1129 | //DbpString("Reader selects anticollission CSN:"); |
17505ce2 | 1130 | } else if (receivedCmd[0] == ICLASS_CMD_READCHECK_KD) { |
1e262141 | 1131 | // Read e-purse (88 02) |
17505ce2 | 1132 | modulated_response = resp_cc; |
1133 | modulated_response_size = resp_cc_len; //order = 4; | |
b67f7ec3 MHS |
1134 | trace_data = card_challenge_data; |
1135 | trace_data_size = sizeof(card_challenge_data); | |
1e262141 | 1136 | LED_B_ON(); |
17505ce2 | 1137 | } else if (receivedCmd[0] == ICLASS_CMD_CHECK) { |
1e262141 | 1138 | // Reader random and reader MAC!!! |
17505ce2 | 1139 | if (simulationMode == MODE_FULLSIM) { |
61fe9073 | 1140 | //NR, from reader, is in receivedCmd +1 |
17505ce2 | 1141 | opt_doTagMAC_2(cipher_state, receivedCmd+1, data_generic_trace, diversified_key); |
61fe9073 | 1142 | |
b19caaef | 1143 | trace_data = data_generic_trace; |
b67f7ec3 | 1144 | trace_data_size = 4; |
17505ce2 | 1145 | CodeIClassTagAnswer(trace_data, trace_data_size); |
b67f7ec3 MHS |
1146 | memcpy(data_response, ToSend, ToSendMax); |
1147 | modulated_response = data_response; | |
1148 | modulated_response_size = ToSendMax; | |
1477ba8a | 1149 | response_delay = 0; //We need to hurry here... (but maybe not too much... ??) |
10a8875c | 1150 | //exitLoop = true; |
17505ce2 | 1151 | } else { //Not fullsim, we don't respond |
b67f7ec3 | 1152 | // We do not know what to answer, so lets keep quiet |
17505ce2 | 1153 | modulated_response = resp_sof; |
1154 | modulated_response_size = 0; | |
b67f7ec3 MHS |
1155 | trace_data = NULL; |
1156 | trace_data_size = 0; | |
17505ce2 | 1157 | if (simulationMode == MODE_EXIT_AFTER_MAC) { |
b67f7ec3 MHS |
1158 | // dbprintf:ing ... |
1159 | Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x" | |
1160 | ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]); | |
1161 | Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len, | |
1162 | receivedCmd[0], receivedCmd[1], receivedCmd[2], | |
1163 | receivedCmd[3], receivedCmd[4], receivedCmd[5], | |
1164 | receivedCmd[6], receivedCmd[7], receivedCmd[8]); | |
17505ce2 | 1165 | if (reader_mac_buf != NULL) { |
1166 | memcpy(reader_mac_buf, receivedCmd+1, 8); | |
b67f7ec3 MHS |
1167 | } |
1168 | exitLoop = true; | |
9f6e9d15 | 1169 | } |
ff7bb4ef | 1170 | } |
b67f7ec3 | 1171 | |
17505ce2 | 1172 | } else if (receivedCmd[0] == ICLASS_CMD_HALT && len == 1) { |
1e262141 | 1173 | // Reader ends the session |
17505ce2 | 1174 | modulated_response = resp_sof; |
1175 | modulated_response_size = 0; //order = 0; | |
55eaed8f MHS |
1176 | trace_data = NULL; |
1177 | trace_data_size = 0; | |
17505ce2 | 1178 | } else if (simulationMode == MODE_FULLSIM && receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4) { |
b67f7ec3 MHS |
1179 | //Read block |
1180 | uint16_t blk = receivedCmd[1]; | |
c8387e85 | 1181 | //Take the data... |
17505ce2 | 1182 | memcpy(data_generic_trace, emulator + (blk << 3), 8); |
c8387e85 MHS |
1183 | //Add crc |
1184 | AppendCrc(data_generic_trace, 8); | |
1185 | trace_data = data_generic_trace; | |
1186 | trace_data_size = 10; | |
17505ce2 | 1187 | CodeIClassTagAnswer(trace_data, trace_data_size); |
c8387e85 MHS |
1188 | memcpy(data_response, ToSend, ToSendMax); |
1189 | modulated_response = data_response; | |
1190 | modulated_response_size = ToSendMax; | |
17505ce2 | 1191 | } else if (receivedCmd[0] == ICLASS_CMD_UPDATE && simulationMode == MODE_FULLSIM) { |
1192 | //Probably the reader wants to update the nonce. Let's just ignore that for now. | |
c8387e85 MHS |
1193 | // OBS! If this is implemented, don't forget to regenerate the cipher_state |
1194 | //We're expected to respond with the data+crc, exactly what's already in the receivedcmd | |
1195 | //receivedcmd is now UPDATE 1b | ADDRESS 1b| DATA 8b| Signature 4b or CRC 2b| | |
1196 | ||
1197 | //Take the data... | |
17505ce2 | 1198 | memcpy(data_generic_trace, receivedCmd+2, 8); |
c8387e85 MHS |
1199 | //Add crc |
1200 | AppendCrc(data_generic_trace, 8); | |
1201 | trace_data = data_generic_trace; | |
1202 | trace_data_size = 10; | |
17505ce2 | 1203 | CodeIClassTagAnswer(trace_data, trace_data_size); |
b67f7ec3 MHS |
1204 | memcpy(data_response, ToSend, ToSendMax); |
1205 | modulated_response = data_response; | |
1206 | modulated_response_size = ToSendMax; | |
17505ce2 | 1207 | } else if (receivedCmd[0] == ICLASS_CMD_PAGESEL) { |
1208 | //Pagesel | |
b19caaef MHS |
1209 | //Pagesel enables to select a page in the selected chip memory and return its configuration block |
1210 | //Chips with a single page will not answer to this command | |
1211 | // It appears we're fine ignoring this. | |
1212 | //Otherwise, we should answer 8bytes (block) + 2bytes CRC | |
17505ce2 | 1213 | } else { |
17cba269 | 1214 | //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44 |
1e262141 | 1215 | // Never seen this command before |
1216 | Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x", | |
1217 | len, | |
1218 | receivedCmd[0], receivedCmd[1], receivedCmd[2], | |
1219 | receivedCmd[3], receivedCmd[4], receivedCmd[5], | |
1220 | receivedCmd[6], receivedCmd[7], receivedCmd[8]); | |
1221 | // Do not respond | |
17505ce2 | 1222 | modulated_response = resp_sof; |
1223 | modulated_response_size = 0; //order = 0; | |
55eaed8f MHS |
1224 | trace_data = NULL; |
1225 | trace_data_size = 0; | |
1e262141 | 1226 | } |
1227 | ||
17505ce2 | 1228 | if (cmdsRecvd > 100) { |
81012e67 | 1229 | //DbpString("100 commands later..."); |
9f6e9d15 | 1230 | //break; |
17505ce2 | 1231 | } else { |
1e262141 | 1232 | cmdsRecvd++; |
1233 | } | |
55eaed8f | 1234 | /** |
6b038d19 | 1235 | A legit tag has about 380us delay between reader EOT and tag SOF. |
55eaed8f | 1236 | **/ |
17505ce2 | 1237 | if (modulated_response_size > 0) { |
e5cd4ee4 | 1238 | SendIClassAnswer(modulated_response, modulated_response_size, response_delay); |
81012e67 | 1239 | t2r_time = GetCountSspClk(); |
81cd0474 | 1240 | } |
f83cc126 | 1241 | |
d9de20fa | 1242 | uint8_t parity[MAX_PARITY_SIZE]; |
1243 | GetParity(receivedCmd, len, parity); | |
17505ce2 | 1244 | LogTrace(receivedCmd, len, (r2t_time-time_0) << 4, (r2t_time-time_0) << 4, parity, true); |
81012e67 | 1245 | |
d9de20fa | 1246 | if (trace_data != NULL) { |
1247 | GetParity(trace_data, trace_data_size, parity); | |
1248 | LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, false); | |
1249 | } | |
17505ce2 | 1250 | if (!get_tracing()) { |
d9de20fa | 1251 | DbpString("Trace full"); |
1252 | //break; | |
81cd0474 | 1253 | } |
81cd0474 | 1254 | } |
1e262141 | 1255 | |
9f6e9d15 | 1256 | //Dbprintf("%x", cmdsRecvd); |
1e262141 | 1257 | LED_A_OFF(); |
1258 | LED_B_OFF(); | |
7b941c8d MHS |
1259 | LED_C_OFF(); |
1260 | ||
17505ce2 | 1261 | if (buttonPressed) |
f83cc126 MHS |
1262 | { |
1263 | DbpString("Button pressed"); | |
1264 | } | |
f83cc126 | 1265 | return buttonPressed; |
1e262141 | 1266 | } |
1267 | ||
17505ce2 | 1268 | /** |
1269 | * @brief SimulateIClass simulates an iClass card. | |
1270 | * @param arg0 type of simulation | |
1271 | * - 0 uses the first 8 bytes in usb data as CSN | |
1272 | * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified | |
1273 | * in the usb data. This mode collects MAC from the reader, in order to do an offline | |
1274 | * attack on the keys. For more info, see "dismantling iclass" and proxclone.com. | |
1275 | * - Other : Uses the default CSN (031fec8af7ff12e0) | |
1276 | * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only) | |
1277 | * @param arg2 | |
1278 | * @param datain | |
1279 | */ | |
1280 | void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain) { | |
1281 | uint32_t simType = arg0; | |
1282 | uint32_t numberOfCSNS = arg1; | |
1283 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
e3dc1e4c | 1284 | |
17505ce2 | 1285 | // Enable and clear the trace |
1286 | set_tracing(true); | |
1287 | clear_trace(); | |
1288 | //Use the emulator memory for SIM | |
1289 | uint8_t *emulator = BigBuf_get_EM_addr(); | |
e3dc1e4c | 1290 | |
17505ce2 | 1291 | if (simType == 0) { |
1292 | // Use the CSN from commandline | |
1293 | memcpy(emulator, datain, 8); | |
1294 | doIClassSimulation(MODE_SIM_CSN,NULL); | |
1295 | } else if (simType == 1) { | |
1296 | //Default CSN | |
1297 | uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 }; | |
1298 | // Use the CSN from commandline | |
1299 | memcpy(emulator, csn_crc, 8); | |
1300 | doIClassSimulation(MODE_SIM_CSN,NULL); | |
1301 | } else if (simType == 2) { | |
1302 | uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 }; | |
1303 | Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS); | |
1304 | // In this mode, a number of csns are within datain. We'll simulate each one, one at a time | |
1305 | // in order to collect MAC's from the reader. This can later be used in an offlne-attack | |
1306 | // in order to obtain the keys, as in the "dismantling iclass"-paper. | |
1307 | int i = 0; | |
1308 | for ( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++) { | |
1309 | // The usb data is 512 bytes, fitting 65 8-byte CSNs in there. | |
1310 | memcpy(emulator, datain+(i*8), 8); | |
1311 | if (doIClassSimulation(MODE_EXIT_AFTER_MAC,mac_responses+i*8)) { | |
1312 | cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*8); | |
1313 | return; // Button pressed | |
1e262141 | 1314 | } |
1e262141 | 1315 | } |
17505ce2 | 1316 | cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*8); |
1317 | } else if (simType == 3) { | |
1318 | //This is 'full sim' mode, where we use the emulator storage for data. | |
1319 | doIClassSimulation(MODE_FULLSIM, NULL); | |
1320 | } else { | |
1321 | // We may want a mode here where we hardcode the csns to use (from proxclone). | |
1322 | // That will speed things up a little, but not required just yet. | |
1323 | Dbprintf("The mode is not implemented, reserved for future use"); | |
1e262141 | 1324 | } |
17505ce2 | 1325 | Dbprintf("Done..."); |
1e262141 | 1326 | |
1e262141 | 1327 | } |
1328 | ||
17505ce2 | 1329 | |
1e262141 | 1330 | /// THE READER CODE |
1331 | ||
1332 | //----------------------------------------------------------------------------- | |
1333 | // Transmit the command (to the tag) that was placed in ToSend[]. | |
1334 | //----------------------------------------------------------------------------- | |
17505ce2 | 1335 | static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait) { |
1336 | int c; | |
1337 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); | |
1338 | AT91C_BASE_SSC->SSC_THR = 0x00; | |
1339 | FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A); | |
1340 | ||
1341 | if (wait) { | |
1342 | if (*wait < 10) *wait = 10; | |
1343 | ||
1344 | for (c = 0; c < *wait;) { | |
1345 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1346 | AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing! | |
1347 | c++; | |
1348 | } | |
1349 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
1350 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
1351 | (void)r; | |
1352 | } | |
1353 | WDT_HIT(); | |
1354 | } | |
1355 | } | |
1356 | ||
1357 | uint8_t sendbyte; | |
1358 | bool firstpart = true; | |
1359 | c = 0; | |
1360 | for (;;) { | |
1361 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1362 | ||
1363 | // DOUBLE THE SAMPLES! | |
1364 | if (firstpart) { | |
1365 | sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4); | |
1366 | } else { | |
1367 | sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4); | |
1368 | c++; | |
1369 | } | |
1370 | if (sendbyte == 0xff) { | |
1371 | sendbyte = 0xfe; | |
1372 | } | |
1373 | AT91C_BASE_SSC->SSC_THR = sendbyte; | |
1374 | firstpart = !firstpart; | |
1375 | ||
1376 | if (c >= len) { | |
1377 | break; | |
1378 | } | |
1379 | } | |
1380 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
1381 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
1382 | (void)r; | |
1383 | } | |
1384 | WDT_HIT(); | |
1385 | } | |
1386 | if (samples && wait) *samples = (c + *wait) << 3; | |
1e262141 | 1387 | } |
1388 | ||
1389 | ||
1390 | //----------------------------------------------------------------------------- | |
1391 | // Prepare iClass reader command to send to FPGA | |
1392 | //----------------------------------------------------------------------------- | |
17505ce2 | 1393 | void CodeIClassCommand(const uint8_t *cmd, int len) { |
1394 | int i, j, k; | |
1395 | ||
1396 | ToSendReset(); | |
1397 | ||
1398 | // Start of Communication: 1 out of 4 | |
1399 | ToSend[++ToSendMax] = 0xf0; | |
1400 | ToSend[++ToSendMax] = 0x00; | |
1401 | ToSend[++ToSendMax] = 0x0f; | |
1402 | ToSend[++ToSendMax] = 0x00; | |
1403 | ||
1404 | // Modulate the bytes | |
1405 | for (i = 0; i < len; i++) { | |
1406 | uint8_t b = cmd[i]; | |
1407 | for (j = 0; j < 4; j++) { | |
1408 | for (k = 0; k < 4; k++) { | |
1409 | if (k == (b & 3)) { | |
f784539d | 1410 | ToSend[++ToSendMax] = 0x0f; |
17505ce2 | 1411 | } else { |
1412 | ToSend[++ToSendMax] = 0x00; | |
1413 | } | |
e3dc1e4c | 1414 | } |
17505ce2 | 1415 | b >>= 2; |
1416 | } | |
1417 | } | |
1418 | ||
1419 | // End of Communication | |
1420 | ToSend[++ToSendMax] = 0x00; | |
1421 | ToSend[++ToSendMax] = 0x00; | |
1422 | ToSend[++ToSendMax] = 0xf0; | |
1423 | ToSend[++ToSendMax] = 0x00; | |
1424 | ||
1425 | // Convert from last character reference to length | |
1426 | ToSendMax++; | |
1e262141 | 1427 | } |
1428 | ||
17505ce2 | 1429 | static void ReaderTransmitIClass(uint8_t *frame, int len) { |
6a1f2d82 | 1430 | int wait = 0; |
1431 | int samples = 0; | |
1432 | ||
1433 | // This is tied to other size changes | |
17505ce2 | 1434 | CodeIClassCommand(frame, len); |
6a1f2d82 | 1435 | |
1436 | // Select the card | |
1437 | TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait); | |
17505ce2 | 1438 | if (trigger) |
6a1f2d82 | 1439 | LED_A_ON(); |
1440 | ||
1441 | // Store reader command in buffer | |
d9de20fa | 1442 | uint8_t par[MAX_PARITY_SIZE]; |
1443 | GetParity(frame, len, par); | |
1444 | LogTrace(frame, len, rsamples, rsamples, par, true); | |
1e262141 | 1445 | } |
1446 | ||
1447 | //----------------------------------------------------------------------------- | |
1448 | // Wait a certain time for tag response | |
44964fd1 | 1449 | // If a response is captured return true |
1450 | // If it takes too long return false | |
1e262141 | 1451 | //----------------------------------------------------------------------------- |
17505ce2 | 1452 | static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) { |
1453 | //uint8_t *buffer | |
1e262141 | 1454 | // buffer needs to be 512 bytes |
1455 | int c; | |
1456 | ||
1457 | // Set FPGA mode to "reader listen mode", no modulation (listen | |
1458 | // only, since we are receiving, not transmitting). | |
1459 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN); | |
1460 | ||
1461 | // Now get the answer from the card | |
1462 | Demod.output = receivedResponse; | |
1463 | Demod.len = 0; | |
1464 | Demod.state = DEMOD_UNSYNCD; | |
1465 | ||
1466 | uint8_t b; | |
1467 | if (elapsed) *elapsed = 0; | |
1468 | ||
44964fd1 | 1469 | bool skip = false; |
1e262141 | 1470 | |
1471 | c = 0; | |
17505ce2 | 1472 | for (;;) { |
1e262141 | 1473 | WDT_HIT(); |
1474 | ||
17505ce2 | 1475 | if (BUTTON_PRESS()) return false; |
1e262141 | 1476 | |
17505ce2 | 1477 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
1e262141 | 1478 | AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!! |
1479 | if (elapsed) (*elapsed)++; | |
1480 | } | |
17505ce2 | 1481 | if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
1482 | if (c < timeout) { | |
1483 | c++; | |
1484 | } else { | |
1485 | return false; | |
1486 | } | |
1e262141 | 1487 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
1488 | skip = !skip; | |
17505ce2 | 1489 | if (skip) continue; |
1490 | ||
1491 | if (ManchesterDecoding(b & 0x0f)) { | |
1e262141 | 1492 | *samples = c << 3; |
44964fd1 | 1493 | return true; |
1e262141 | 1494 | } |
1495 | } | |
1496 | } | |
1497 | } | |
1498 | ||
17505ce2 | 1499 | static int ReaderReceiveIClass(uint8_t *receivedAnswer) { |
1500 | int samples = 0; | |
1501 | if (!GetIClassAnswer(receivedAnswer, 160, &samples, 0)) { | |
1502 | return false; | |
1503 | } | |
1504 | rsamples += samples; | |
1505 | uint8_t parity[MAX_PARITY_SIZE]; | |
1506 | GetParity(receivedAnswer, Demod.len, parity); | |
1507 | LogTrace(receivedAnswer, Demod.len, rsamples, rsamples, parity, false); | |
1508 | if (samples == 0) return false; | |
1509 | return Demod.len; | |
1e262141 | 1510 | } |
1511 | ||
17505ce2 | 1512 | static void setupIclassReader() { |
1513 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
1514 | // Reset trace buffer | |
1515 | set_tracing(true); | |
1516 | clear_trace(); | |
1517 | ||
1518 | // Setup SSC | |
1519 | FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A); | |
1520 | // Start from off (no field generated) | |
1521 | // Signal field is off with the appropriate LED | |
1522 | LED_D_OFF(); | |
1523 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
1524 | SpinDelay(200); | |
1525 | ||
1526 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
1527 | ||
1528 | // Now give it time to spin up. | |
1529 | // Signal field is on with the appropriate LED | |
1530 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); | |
1531 | SpinDelay(200); | |
1532 | LED_A_ON(); | |
aa41c605 MHS |
1533 | |
1534 | } | |
1535 | ||
17505ce2 | 1536 | static bool sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries) { |
1537 | while (retries-- > 0) { | |
c8dd9b09 | 1538 | ReaderTransmitIClass(command, cmdsize); |
17505ce2 | 1539 | if (expected_size == ReaderReceiveIClass(resp)) { |
aa53efc3 | 1540 | return true; |
c8dd9b09 MHS |
1541 | } |
1542 | } | |
aa53efc3 | 1543 | return false;//Error |
c8dd9b09 MHS |
1544 | } |
1545 | ||
1546 | /** | |
1547 | * @brief Talks to an iclass tag, sends the commands to get CSN and CC. | |
1548 | * @param card_data where the CSN and CC are stored for return | |
1549 | * @return 0 = fail | |
1550 | * 1 = Got CSN | |
1551 | * 2 = Got CSN and CC | |
1552 | */ | |
17505ce2 | 1553 | static uint8_t handshakeIclassTag_ext(uint8_t *card_data, bool use_credit_key) { |
c8dd9b09 | 1554 | static uint8_t act_all[] = { 0x0a }; |
aa53efc3 | 1555 | //static uint8_t identify[] = { 0x0c }; |
1556 | static uint8_t identify[] = { 0x0c, 0x00, 0x73, 0x33 }; | |
c8dd9b09 | 1557 | static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; |
aa53efc3 | 1558 | static uint8_t readcheck_cc[]= { 0x88, 0x02 }; |
1559 | if (use_credit_key) | |
1560 | readcheck_cc[0] = 0x18; | |
1561 | else | |
1562 | readcheck_cc[0] = 0x88; | |
caaf9618 | 1563 | |
f71f4deb | 1564 | uint8_t resp[ICLASS_BUFFER_SIZE]; |
c8dd9b09 MHS |
1565 | |
1566 | uint8_t read_status = 0; | |
1567 | ||
1568 | // Send act_all | |
1569 | ReaderTransmitIClass(act_all, 1); | |
1570 | // Card present? | |
17505ce2 | 1571 | if (!ReaderReceiveIClass(resp)) return read_status;//Fail |
c8dd9b09 MHS |
1572 | //Send Identify |
1573 | ReaderTransmitIClass(identify, 1); | |
1574 | //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC | |
17505ce2 | 1575 | uint8_t len = ReaderReceiveIClass(resp); |
1576 | if (len != 10) return read_status;//Fail | |
c8dd9b09 MHS |
1577 | |
1578 | //Copy the Anti-collision CSN to our select-packet | |
17505ce2 | 1579 | memcpy(&select[1], resp, 8); |
c8dd9b09 MHS |
1580 | //Select the card |
1581 | ReaderTransmitIClass(select, sizeof(select)); | |
1582 | //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC | |
17505ce2 | 1583 | len = ReaderReceiveIClass(resp); |
1584 | if (len != 10) return read_status;//Fail | |
c8dd9b09 MHS |
1585 | |
1586 | //Success - level 1, we got CSN | |
1587 | //Save CSN in response data | |
17505ce2 | 1588 | memcpy(card_data, resp, 8); |
c8dd9b09 MHS |
1589 | |
1590 | //Flag that we got to at least stage 1, read CSN | |
1591 | read_status = 1; | |
1592 | ||
34e2af02 | 1593 | // Card selected, now read e-purse (cc) (only 8 bytes no CRC) |
c8dd9b09 | 1594 | ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc)); |
17505ce2 | 1595 | if (ReaderReceiveIClass(resp) == 8) { |
c8dd9b09 | 1596 | //Save CC (e-purse) in response data |
17505ce2 | 1597 | memcpy(card_data+8, resp, 8); |
caaf9618 | 1598 | read_status++; |
c8dd9b09 MHS |
1599 | } |
1600 | ||
1601 | return read_status; | |
1602 | } | |
17505ce2 | 1603 | |
1604 | static uint8_t handshakeIclassTag(uint8_t *card_data) { | |
aa53efc3 | 1605 | return handshakeIclassTag_ext(card_data, false); |
1606 | } | |
c8dd9b09 | 1607 | |
caaf9618 | 1608 | |
1e262141 | 1609 | // Reader iClass Anticollission |
1610 | void ReaderIClass(uint8_t arg0) { | |
1e262141 | 1611 | |
17505ce2 | 1612 | uint8_t card_data[6 * 8] = {0}; |
83602aff | 1613 | memset(card_data, 0xFF, sizeof(card_data)); |
17505ce2 | 1614 | uint8_t last_csn[8] = {0,0,0,0,0,0,0,0}; |
34e2af02 | 1615 | uint8_t resp[ICLASS_BUFFER_SIZE]; |
1616 | memset(resp, 0xFF, sizeof(resp)); | |
caaf9618 | 1617 | //Read conf block CRC(0x01) => 0xfa 0x22 |
17505ce2 | 1618 | uint8_t readConf[] = { ICLASS_CMD_READ_OR_IDENTIFY, 0x01, 0xfa, 0x22}; |
34e2af02 | 1619 | //Read App Issuer Area block CRC(0x05) => 0xde 0x64 |
17505ce2 | 1620 | uint8_t readAA[] = { ICLASS_CMD_READ_OR_IDENTIFY, 0x05, 0xde, 0x64}; |
caaf9618 | 1621 | |
6ce0e538 | 1622 | int read_status= 0; |
caaf9618 | 1623 | uint8_t result_status = 0; |
34e2af02 | 1624 | // flag to read until one tag is found successfully |
6ce0e538 | 1625 | bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE; |
34e2af02 | 1626 | // flag to only try 5 times to find one tag then return |
6ce0e538 | 1627 | bool try_once = arg0 & FLAG_ICLASS_READER_ONE_TRY; |
34e2af02 | 1628 | // if neither abort_after_read nor try_once then continue reading until button pressed. |
1629 | ||
1630 | bool use_credit_key = arg0 & FLAG_ICLASS_READER_CEDITKEY; | |
1631 | // test flags for what blocks to be sure to read | |
1632 | uint8_t flagReadConfig = arg0 & FLAG_ICLASS_READER_CONF; | |
1633 | uint8_t flagReadCC = arg0 & FLAG_ICLASS_READER_CC; | |
1634 | uint8_t flagReadAA = arg0 & FLAG_ICLASS_READER_AA; | |
1635 | ||
1636 | set_tracing(true); | |
6ce0e538 | 1637 | setupIclassReader(); |
1e262141 | 1638 | |
17505ce2 | 1639 | uint16_t tryCnt = 0; |
979c7655 | 1640 | bool userCancelled = BUTTON_PRESS() || usb_poll_validate_length(); |
17505ce2 | 1641 | while (!userCancelled) { |
979c7655 | 1642 | // if only looking for one card try 2 times if we missed it the first time |
17505ce2 | 1643 | if (try_once && tryCnt > 2) { |
1644 | break; | |
1645 | } | |
6ce0e538 | 1646 | tryCnt++; |
17505ce2 | 1647 | if (!get_tracing()) { |
c8dd9b09 MHS |
1648 | DbpString("Trace full"); |
1649 | break; | |
1650 | } | |
1651 | WDT_HIT(); | |
4ab4336a | 1652 | |
aa53efc3 | 1653 | read_status = handshakeIclassTag_ext(card_data, use_credit_key); |
2e9d4b3f | 1654 | |
17505ce2 | 1655 | if (read_status == 0) continue; |
1656 | if (read_status == 1) result_status = FLAG_ICLASS_READER_CSN; | |
1657 | if (read_status == 2) result_status = FLAG_ICLASS_READER_CSN | FLAG_ICLASS_READER_CC; | |
caaf9618 MHS |
1658 | |
1659 | // handshakeIclass returns CSN|CC, but the actual block | |
1660 | // layout is CSN|CONFIG|CC, so here we reorder the data, | |
1661 | // moving CC forward 8 bytes | |
17505ce2 | 1662 | memcpy(card_data+16, card_data+8, 8); |
caaf9618 | 1663 | //Read block 1, config |
17505ce2 | 1664 | if (flagReadConfig) { |
1665 | if (sendCmdGetResponseWithRetries(readConf, sizeof(readConf), resp, 10, 10)) { | |
caaf9618 | 1666 | result_status |= FLAG_ICLASS_READER_CONF; |
34e2af02 | 1667 | memcpy(card_data+8, resp, 8); |
aa53efc3 | 1668 | } else { |
1669 | Dbprintf("Failed to dump config block"); | |
caaf9618 MHS |
1670 | } |
1671 | } | |
c8dd9b09 | 1672 | |
caaf9618 | 1673 | //Read block 5, AA |
17505ce2 | 1674 | if (flagReadAA) { |
1675 | if (sendCmdGetResponseWithRetries(readAA, sizeof(readAA), resp, 10, 10)) { | |
caaf9618 | 1676 | result_status |= FLAG_ICLASS_READER_AA; |
17505ce2 | 1677 | memcpy(card_data + (8*5), resp, 8); |
aa53efc3 | 1678 | } else { |
1679 | //Dbprintf("Failed to dump AA block"); | |
caaf9618 MHS |
1680 | } |
1681 | } | |
1682 | ||
1683 | // 0 : CSN | |
b67f7ec3 | 1684 | // 1 : Configuration |
caaf9618 MHS |
1685 | // 2 : e-purse |
1686 | // (3,4 write-only, kc and kd) | |
b67f7ec3 MHS |
1687 | // 5 Application issuer area |
1688 | // | |
34e2af02 | 1689 | //Then we can 'ship' back the 8 * 6 bytes of data, |
b67f7ec3 MHS |
1690 | // with 0xFF:s in block 3 and 4. |
1691 | ||
c8dd9b09 | 1692 | LED_B_ON(); |
17505ce2 | 1693 | //Send back to client, but don't bother if we already sent this - |
979c7655 | 1694 | // only useful if looping in arm (not try_once && not abort_after_read) |
17505ce2 | 1695 | if (memcmp(last_csn, card_data, 8) != 0) { |
34e2af02 | 1696 | // If caller requires that we get Conf, CC, AA, continue until we got it |
17505ce2 | 1697 | if ( (result_status ^ FLAG_ICLASS_READER_CSN ^ flagReadConfig ^ flagReadCC ^ flagReadAA) == 0) { |
1698 | cmd_send(CMD_ACK, result_status, 0, 0, card_data, sizeof(card_data)); | |
1699 | if (abort_after_read) { | |
f784539d | 1700 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
c8dd9b09 | 1701 | LED_A_OFF(); |
979c7655 | 1702 | LED_B_OFF(); |
c8dd9b09 MHS |
1703 | return; |
1704 | } | |
1705 | //Save that we already sent this.... | |
1706 | memcpy(last_csn, card_data, 8); | |
1707 | } | |
caaf9618 | 1708 | |
c8dd9b09 MHS |
1709 | } |
1710 | LED_B_OFF(); | |
979c7655 | 1711 | userCancelled = BUTTON_PRESS() || usb_poll_validate_length(); |
1712 | } | |
1713 | if (userCancelled) { | |
17505ce2 | 1714 | cmd_send(CMD_ACK, 0xFF, 0, 0, card_data, 0); |
979c7655 | 1715 | } else { |
17505ce2 | 1716 | cmd_send(CMD_ACK, 0, 0, 0, card_data, 0); |
6ce0e538 | 1717 | } |
3ac22ee1 | 1718 | LED_A_OFF(); |
cee5a30d | 1719 | } |
1720 | ||
c3963755 | 1721 | void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) { |
c8dd9b09 | 1722 | |
cb29e00a | 1723 | uint8_t card_data[USB_CMD_DATA_SIZE]={0}; |
39d3ce5d MHS |
1724 | uint16_t block_crc_LUT[255] = {0}; |
1725 | ||
17505ce2 | 1726 | //Generate a lookup table for block crc |
1727 | for (int block = 0; block < 255; block++){ | |
1728 | char bl = block; | |
1729 | block_crc_LUT[block] = iclass_crc16(&bl ,1); | |
39d3ce5d MHS |
1730 | } |
1731 | //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]); | |
c8dd9b09 | 1732 | |
c3963755 | 1733 | uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; |
1734 | uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 }; | |
17505ce2 | 1735 | |
1736 | uint16_t crc = 0; | |
1737 | uint8_t cardsize = 0; | |
1738 | uint8_t mem = 0; | |
1739 | ||
1740 | static struct memory_t { | |
1741 | int k16; | |
1742 | int book; | |
1743 | int k2; | |
1744 | int lockauth; | |
1745 | int keyaccess; | |
c3963755 | 1746 | } memory; |
17505ce2 | 1747 | |
f71f4deb | 1748 | uint8_t resp[ICLASS_BUFFER_SIZE]; |
17505ce2 | 1749 | |
1750 | setupIclassReader(); | |
44964fd1 | 1751 | set_tracing(true); |
c3963755 | 1752 | |
17505ce2 | 1753 | while (!BUTTON_PRESS()) { |
1754 | ||
39d3ce5d MHS |
1755 | WDT_HIT(); |
1756 | ||
17505ce2 | 1757 | if (!get_tracing()) { |
c3963755 | 1758 | DbpString("Trace full"); |
1759 | break; | |
1760 | } | |
17505ce2 | 1761 | |
c8dd9b09 | 1762 | uint8_t read_status = handshakeIclassTag(card_data); |
17505ce2 | 1763 | if (read_status < 2) continue; |
c8dd9b09 MHS |
1764 | |
1765 | //for now replay captured auth (as cc not updated) | |
17505ce2 | 1766 | memcpy(check+5, MAC, 4); |
c8dd9b09 | 1767 | |
17505ce2 | 1768 | if (!sendCmdGetResponseWithRetries(check, sizeof(check), resp, 4, 5)) { |
c8dd9b09 MHS |
1769 | Dbprintf("Error: Authentication Fail!"); |
1770 | continue; | |
1771 | } | |
1772 | ||
39d3ce5d MHS |
1773 | //first get configuration block (block 1) |
1774 | crc = block_crc_LUT[1]; | |
17505ce2 | 1775 | read[1] = 1; |
c8dd9b09 MHS |
1776 | read[2] = crc >> 8; |
1777 | read[3] = crc & 0xff; | |
1778 | ||
17505ce2 | 1779 | if (!sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10)) { |
39d3ce5d | 1780 | Dbprintf("Dump config (block 1) failed"); |
c8dd9b09 MHS |
1781 | continue; |
1782 | } | |
1783 | ||
17505ce2 | 1784 | mem = resp[5]; |
1785 | memory.k16 = (mem & 0x80); | |
1786 | memory.book = (mem & 0x20); | |
1787 | memory.k2 = (mem & 0x8); | |
1788 | memory.lockauth = (mem & 0x2); | |
1789 | memory.keyaccess = (mem & 0x1); | |
c8dd9b09 MHS |
1790 | |
1791 | cardsize = memory.k16 ? 255 : 32; | |
1792 | WDT_HIT(); | |
cb29e00a | 1793 | //Set card_data to all zeroes, we'll fill it with data |
17505ce2 | 1794 | memset(card_data, 0x0, USB_CMD_DATA_SIZE); |
1795 | uint8_t failedRead = 0; | |
1796 | uint32_t stored_data_length = 0; | |
c8dd9b09 | 1797 | //then loop around remaining blocks |
17505ce2 | 1798 | for (int block = 0; block < cardsize; block++) { |
1799 | read[1] = block; | |
39d3ce5d | 1800 | crc = block_crc_LUT[block]; |
c8dd9b09 MHS |
1801 | read[2] = crc >> 8; |
1802 | read[3] = crc & 0xff; | |
1803 | ||
17505ce2 | 1804 | if (sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10)) { |
c8dd9b09 | 1805 | Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x", |
17505ce2 | 1806 | block, resp[0], resp[1], resp[2], |
c8dd9b09 MHS |
1807 | resp[3], resp[4], resp[5], |
1808 | resp[6], resp[7]); | |
1809 | ||
cb29e00a | 1810 | //Fill up the buffer |
17505ce2 | 1811 | memcpy(card_data+stored_data_length, resp, 8); |
cb29e00a | 1812 | stored_data_length += 8; |
17505ce2 | 1813 | if (stored_data_length +8 > USB_CMD_DATA_SIZE) { |
1814 | //Time to send this off and start afresh | |
cb29e00a MHS |
1815 | cmd_send(CMD_ACK, |
1816 | stored_data_length,//data length | |
1817 | failedRead,//Failed blocks? | |
1818 | 0,//Not used ATM | |
1819 | card_data, stored_data_length); | |
1820 | //reset | |
1821 | stored_data_length = 0; | |
1822 | failedRead = 0; | |
1823 | } | |
1824 | ||
17505ce2 | 1825 | } else { |
cb29e00a | 1826 | failedRead = 1; |
17505ce2 | 1827 | stored_data_length += 8;//Otherwise, data becomes misaligned |
c8dd9b09 | 1828 | Dbprintf("Failed to dump block %d", block); |
c3963755 | 1829 | } |
1830 | } | |
428d6221 | 1831 | |
cb29e00a | 1832 | //Send off any remaining data |
17505ce2 | 1833 | if (stored_data_length > 0) { |
cb29e00a MHS |
1834 | cmd_send(CMD_ACK, |
1835 | stored_data_length,//data length | |
1836 | failedRead,//Failed blocks? | |
1837 | 0,//Not used ATM | |
17505ce2 | 1838 | card_data, |
1839 | stored_data_length); | |
cb29e00a | 1840 | } |
c8dd9b09 MHS |
1841 | //If we got here, let's break |
1842 | break; | |
c3963755 | 1843 | } |
cb29e00a MHS |
1844 | //Signal end of transmission |
1845 | cmd_send(CMD_ACK, | |
1846 | 0,//data length | |
1847 | 0,//Failed blocks? | |
1848 | 0,//Not used ATM | |
17505ce2 | 1849 | card_data, |
1850 | 0); | |
cb29e00a | 1851 | |
f784539d | 1852 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
c3963755 | 1853 | LED_A_OFF(); |
1854 | } | |
1855 | ||
aa53efc3 | 1856 | void iClass_Authentication(uint8_t *MAC) { |
3ac22ee1 | 1857 | uint8_t check[] = { ICLASS_CMD_CHECK, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; |
aa53efc3 | 1858 | uint8_t resp[ICLASS_BUFFER_SIZE]; |
17505ce2 | 1859 | memcpy(check+5, MAC, 4); |
aa53efc3 | 1860 | bool isOK; |
3ac22ee1 | 1861 | isOK = sendCmdGetResponseWithRetries(check, sizeof(check), resp, 4, 6); |
17505ce2 | 1862 | cmd_send(CMD_ACK,isOK, 0, 0, 0, 0); |
aa53efc3 | 1863 | } |
17505ce2 | 1864 | |
f784539d | 1865 | static bool iClass_ReadBlock(uint8_t blockNo, uint8_t *readdata) { |
3ac22ee1 | 1866 | uint8_t readcmd[] = {ICLASS_CMD_READ_OR_IDENTIFY, blockNo, 0x00, 0x00}; //0x88, 0x00 // can i use 0C? |
1867 | char bl = blockNo; | |
1868 | uint16_t rdCrc = iclass_crc16(&bl, 1); | |
1869 | readcmd[2] = rdCrc >> 8; | |
1870 | readcmd[3] = rdCrc & 0xff; | |
1871 | uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0}; | |
1872 | bool isOK = false; | |
912a3e94 | 1873 | |
3ac22ee1 | 1874 | //readcmd[1] = blockNo; |
1875 | isOK = sendCmdGetResponseWithRetries(readcmd, sizeof(readcmd), resp, 10, 10); | |
1876 | memcpy(readdata, resp, sizeof(resp)); | |
fecd8202 | 1877 | |
aa53efc3 | 1878 | return isOK; |
1879 | } | |
fecd8202 | 1880 | |
3ac22ee1 | 1881 | void iClass_ReadBlk(uint8_t blockno) { |
1882 | uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0}; | |
aa53efc3 | 1883 | bool isOK = false; |
3ac22ee1 | 1884 | isOK = iClass_ReadBlock(blockno, readblockdata); |
1885 | cmd_send(CMD_ACK, isOK, 0, 0, readblockdata, 8); | |
f784539d | 1886 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
aa53efc3 | 1887 | } |
fecd8202 | 1888 | |
3ac22ee1 | 1889 | void iClass_Dump(uint8_t blockno, uint8_t numblks) { |
1890 | uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0}; | |
aa53efc3 | 1891 | bool isOK = false; |
1892 | uint8_t blkCnt = 0; | |
fecd8202 | 1893 | |
aa53efc3 | 1894 | BigBuf_free(); |
1895 | uint8_t *dataout = BigBuf_malloc(255*8); | |
17505ce2 | 1896 | if (dataout == NULL) { |
aa53efc3 | 1897 | Dbprintf("out of memory"); |
b8dd1ef6 | 1898 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1899 | LED_D_OFF(); | |
17505ce2 | 1900 | cmd_send(CMD_ACK, 0, 1, 0, 0, 0); |
b8dd1ef6 | 1901 | LED_A_OFF(); |
aa53efc3 | 1902 | return; |
1903 | } | |
17505ce2 | 1904 | memset(dataout, 0xFF, 255*8); |
fecd8202 | 1905 | |
17505ce2 | 1906 | for ( ; blkCnt < numblks; blkCnt++) { |
3ac22ee1 | 1907 | isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata); |
1908 | if (!isOK || (readblockdata[0] == 0xBB || readblockdata[7] == 0xBB || readblockdata[2] == 0xBB)) { //try again | |
1909 | isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata); | |
aa53efc3 | 1910 | if (!isOK) { |
1911 | Dbprintf("Block %02X failed to read", blkCnt+blockno); | |
1912 | break; | |
1913 | } | |
fecd8202 | 1914 | } |
17505ce2 | 1915 | memcpy(dataout + (blkCnt*8), readblockdata, 8); |
aa53efc3 | 1916 | } |
1917 | //return pointer to dump memory in arg3 | |
17505ce2 | 1918 | cmd_send(CMD_ACK, isOK, blkCnt, BigBuf_max_traceLen(), 0, 0); |
aa53efc3 | 1919 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1920 | LEDsoff(); | |
1921 | BigBuf_free(); | |
1922 | } | |
1923 | ||
17505ce2 | 1924 | static bool iClass_WriteBlock_ext(uint8_t blockNo, uint8_t *data) { |
671ff89f | 1925 | uint8_t write[] = { ICLASS_CMD_UPDATE, blockNo, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; |
3ac22ee1 | 1926 | //uint8_t readblockdata[10]; |
1927 | //write[1] = blockNo; | |
aa53efc3 | 1928 | memcpy(write+2, data, 12); // data + mac |
17505ce2 | 1929 | char *wrCmd = (char *)(write+1); |
671ff89f | 1930 | uint16_t wrCrc = iclass_crc16(wrCmd, 13); |
1931 | write[14] = wrCrc >> 8; | |
1932 | write[15] = wrCrc & 0xff; | |
3ac22ee1 | 1933 | uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0}; |
671ff89f | 1934 | bool isOK = false; |
1935 | ||
17505ce2 | 1936 | isOK = sendCmdGetResponseWithRetries(write, sizeof(write), resp, sizeof(resp), 10); |
671ff89f | 1937 | if (isOK) { //if reader responded correctly |
3ac22ee1 | 1938 | //Dbprintf("WriteResp: %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X",resp[0],resp[1],resp[2],resp[3],resp[4],resp[5],resp[6],resp[7],resp[8],resp[9]); |
17505ce2 | 1939 | if (memcmp(write+2, resp, 8)) { //if response is not equal to write values |
671ff89f | 1940 | if (blockNo != 3 && blockNo != 4) { //if not programming key areas (note key blocks don't get programmed with actual key data it is xor data) |
1941 | //error try again | |
17505ce2 | 1942 | isOK = sendCmdGetResponseWithRetries(write, sizeof(write), resp, sizeof(resp), 10); |
1943 | } | |
fecd8202 | 1944 | } |
fecd8202 | 1945 | } |
aa53efc3 | 1946 | return isOK; |
1947 | } | |
1948 | ||
3ac22ee1 | 1949 | void iClass_WriteBlock(uint8_t blockNo, uint8_t *data) { |
1950 | bool isOK = iClass_WriteBlock_ext(blockNo, data); | |
aa53efc3 | 1951 | if (isOK){ |
17505ce2 | 1952 | Dbprintf("Write block [%02x] successful", blockNo); |
aa53efc3 | 1953 | } else { |
17505ce2 | 1954 | Dbprintf("Write block [%02x] failed", blockNo); |
aa53efc3 | 1955 | } |
17505ce2 | 1956 | cmd_send(CMD_ACK, isOK, 0, 0, 0, 0); |
f784539d | 1957 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
aa53efc3 | 1958 | } |
1959 | ||
3ac22ee1 | 1960 | void iClass_Clone(uint8_t startblock, uint8_t endblock, uint8_t *data) { |
aa53efc3 | 1961 | int i; |
1962 | int written = 0; | |
1963 | int total_block = (endblock - startblock) + 1; | |
17505ce2 | 1964 | for (i = 0; i < total_block; i++) { |
aa53efc3 | 1965 | // block number |
17505ce2 | 1966 | if (iClass_WriteBlock_ext(i+startblock, data + (i*12))){ |
1967 | Dbprintf("Write block [%02x] successful", i + startblock); | |
aa53efc3 | 1968 | written++; |
1969 | } else { | |
17505ce2 | 1970 | if (iClass_WriteBlock_ext(i+startblock, data + (i*12))){ |
1971 | Dbprintf("Write block [%02x] successful", i + startblock); | |
aa53efc3 | 1972 | written++; |
1973 | } else { | |
17505ce2 | 1974 | Dbprintf("Write block [%02x] failed", i + startblock); |
aa53efc3 | 1975 | } |
1976 | } | |
1977 | } | |
1978 | if (written == total_block) | |
1979 | Dbprintf("Clone complete"); | |
1980 | else | |
17505ce2 | 1981 | Dbprintf("Clone incomplete"); |
aa53efc3 | 1982 | |
17505ce2 | 1983 | cmd_send(CMD_ACK, 1, 0, 0, 0, 0); |
aa53efc3 | 1984 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1985 | LEDsoff(); | |
1986 | } |