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489ef36c | 1 | //----------------------------------------------------------------------------- |
2 | // Jonathan Westhues, split Nov 2006 | |
3 | // | |
4 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
5 | // at your option, any later version. See the LICENSE.txt file for the text of | |
6 | // the license. | |
7 | //----------------------------------------------------------------------------- | |
abb21530 | 8 | // Routines to support ISO 14443B. This includes both the reader software and |
9 | // the `fake tag' modes. | |
489ef36c | 10 | //----------------------------------------------------------------------------- |
11 | ||
12 | #include "proxmark3.h" | |
13 | #include "apps.h" | |
14 | #include "util.h" | |
15 | #include "string.h" | |
489ef36c | 16 | #include "iso14443crc.h" |
db25599d | 17 | #include "common.h" |
cef590d9 | 18 | #define RECEIVE_SAMPLES_TIMEOUT 20000 |
a62bf3af | 19 | #define ISO14443B_DMA_BUFFER_SIZE 256 |
489ef36c | 20 | |
a62bf3af | 21 | // PCB Block number for APDUs |
22 | static uint8_t pcb_blocknum = 0; | |
23 | ||
489ef36c | 24 | //============================================================================= |
25 | // An ISO 14443 Type B tag. We listen for commands from the reader, using | |
26 | // a UART kind of thing that's implemented in software. When we get a | |
27 | // frame (i.e., a group of bytes between SOF and EOF), we check the CRC. | |
28 | // If it's good, then we can do something appropriate with it, and send | |
29 | // a response. | |
30 | //============================================================================= | |
31 | ||
cef590d9 | 32 | |
33 | //----------------------------------------------------------------------------- | |
34 | // The software UART that receives commands from the reader, and its state | |
35 | // variables. | |
36 | //----------------------------------------------------------------------------- | |
37 | static struct { | |
38 | enum { | |
39 | STATE_UNSYNCD, | |
40 | STATE_GOT_FALLING_EDGE_OF_SOF, | |
41 | STATE_AWAITING_START_BIT, | |
42 | STATE_RECEIVING_DATA | |
43 | } state; | |
44 | uint16_t shiftReg; | |
45 | int bitCnt; | |
46 | int byteCnt; | |
47 | int byteCntMax; | |
48 | int posCnt; | |
49 | uint8_t *output; | |
50 | } Uart; | |
51 | ||
52 | static void UartReset() | |
53 | { | |
54 | Uart.byteCntMax = MAX_FRAME_SIZE; | |
55 | Uart.state = STATE_UNSYNCD; | |
56 | Uart.byteCnt = 0; | |
57 | Uart.bitCnt = 0; | |
58 | Uart.posCnt = 0; | |
59 | memset(Uart.output, 0x00, MAX_FRAME_SIZE); | |
60 | } | |
61 | ||
62 | static void UartInit(uint8_t *data) | |
63 | { | |
64 | Uart.output = data; | |
65 | UartReset(); | |
66 | } | |
67 | ||
68 | ||
69 | static struct { | |
70 | enum { | |
71 | DEMOD_UNSYNCD, | |
72 | DEMOD_PHASE_REF_TRAINING, | |
73 | DEMOD_AWAITING_FALLING_EDGE_OF_SOF, | |
74 | DEMOD_GOT_FALLING_EDGE_OF_SOF, | |
75 | DEMOD_AWAITING_START_BIT, | |
76 | DEMOD_RECEIVING_DATA | |
77 | } state; | |
78 | int bitCount; | |
79 | int posCount; | |
80 | int thisBit; | |
81 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. | |
82 | int metric; | |
83 | int metricN; | |
84 | */ | |
85 | uint16_t shiftReg; | |
86 | uint8_t *output; | |
87 | int len; | |
88 | int sumI; | |
89 | int sumQ; | |
90 | } Demod; | |
91 | ||
92 | static void DemodReset() | |
93 | { | |
94 | // Clear out the state of the "UART" that receives from the tag. | |
95 | Demod.len = 0; | |
96 | Demod.state = DEMOD_UNSYNCD; | |
97 | Demod.posCount = 0; | |
98 | Demod.sumI = 0; | |
99 | Demod.sumQ = 0; | |
100 | Demod.bitCount = 0; | |
101 | Demod.thisBit = 0; | |
102 | Demod.shiftReg = 0; | |
103 | memset(Demod.output, 0x00, MAX_FRAME_SIZE); | |
104 | } | |
105 | ||
106 | ||
107 | static void DemodInit(uint8_t *data) | |
108 | { | |
109 | Demod.output = data; | |
110 | DemodReset(); | |
111 | } | |
112 | ||
113 | ||
489ef36c | 114 | //----------------------------------------------------------------------------- |
115 | // Code up a string of octets at layer 2 (including CRC, we don't generate | |
116 | // that here) so that they can be transmitted to the reader. Doesn't transmit | |
117 | // them yet, just leaves them ready to send in ToSend[]. | |
118 | //----------------------------------------------------------------------------- | |
119 | static void CodeIso14443bAsTag(const uint8_t *cmd, int len) | |
120 | { | |
121 | int i; | |
122 | ||
123 | ToSendReset(); | |
124 | ||
125 | // Transmit a burst of ones, as the initial thing that lets the | |
126 | // reader get phase sync. This (TR1) must be > 80/fs, per spec, | |
127 | // but tag that I've tried (a Paypass) exceeds that by a fair bit, | |
128 | // so I will too. | |
129 | for(i = 0; i < 20; i++) { | |
130 | ToSendStuffBit(1); | |
131 | ToSendStuffBit(1); | |
132 | ToSendStuffBit(1); | |
133 | ToSendStuffBit(1); | |
134 | } | |
135 | ||
136 | // Send SOF. | |
137 | for(i = 0; i < 10; i++) { | |
138 | ToSendStuffBit(0); | |
139 | ToSendStuffBit(0); | |
140 | ToSendStuffBit(0); | |
141 | ToSendStuffBit(0); | |
142 | } | |
143 | for(i = 0; i < 2; i++) { | |
144 | ToSendStuffBit(1); | |
145 | ToSendStuffBit(1); | |
146 | ToSendStuffBit(1); | |
147 | ToSendStuffBit(1); | |
148 | } | |
149 | ||
150 | for(i = 0; i < len; i++) { | |
151 | int j; | |
152 | uint8_t b = cmd[i]; | |
153 | ||
154 | // Start bit | |
155 | ToSendStuffBit(0); | |
156 | ToSendStuffBit(0); | |
157 | ToSendStuffBit(0); | |
158 | ToSendStuffBit(0); | |
159 | ||
160 | // Data bits | |
161 | for(j = 0; j < 8; j++) { | |
162 | if(b & 1) { | |
163 | ToSendStuffBit(1); | |
164 | ToSendStuffBit(1); | |
165 | ToSendStuffBit(1); | |
166 | ToSendStuffBit(1); | |
167 | } else { | |
168 | ToSendStuffBit(0); | |
169 | ToSendStuffBit(0); | |
170 | ToSendStuffBit(0); | |
171 | ToSendStuffBit(0); | |
172 | } | |
173 | b >>= 1; | |
174 | } | |
175 | ||
176 | // Stop bit | |
177 | ToSendStuffBit(1); | |
178 | ToSendStuffBit(1); | |
179 | ToSendStuffBit(1); | |
180 | ToSendStuffBit(1); | |
181 | } | |
182 | ||
abb21530 | 183 | // Send EOF. |
489ef36c | 184 | for(i = 0; i < 10; i++) { |
185 | ToSendStuffBit(0); | |
186 | ToSendStuffBit(0); | |
187 | ToSendStuffBit(0); | |
188 | ToSendStuffBit(0); | |
189 | } | |
5b59bf20 | 190 | for(i = 0; i < 2; i++) { |
489ef36c | 191 | ToSendStuffBit(1); |
192 | ToSendStuffBit(1); | |
193 | ToSendStuffBit(1); | |
194 | ToSendStuffBit(1); | |
195 | } | |
196 | ||
197 | // Convert from last byte pos to length | |
198 | ToSendMax++; | |
489ef36c | 199 | } |
200 | ||
cef590d9 | 201 | |
489ef36c | 202 | |
203 | /* Receive & handle a bit coming from the reader. | |
abb21530 | 204 | * |
205 | * This function is called 4 times per bit (every 2 subcarrier cycles). | |
206 | * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us | |
489ef36c | 207 | * |
208 | * LED handling: | |
209 | * LED A -> ON once we have received the SOF and are expecting the rest. | |
210 | * LED A -> OFF once we have received EOF or are in error state or unsynced | |
211 | * | |
212 | * Returns: true if we received a EOF | |
213 | * false if we are still waiting for some more | |
214 | */ | |
36f84d47 | 215 | static RAMFUNC int Handle14443bUartBit(uint8_t bit) |
489ef36c | 216 | { |
217 | switch(Uart.state) { | |
218 | case STATE_UNSYNCD: | |
489ef36c | 219 | if(!bit) { |
220 | // we went low, so this could be the beginning | |
221 | // of an SOF | |
222 | Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF; | |
223 | Uart.posCnt = 0; | |
224 | Uart.bitCnt = 0; | |
225 | } | |
226 | break; | |
227 | ||
228 | case STATE_GOT_FALLING_EDGE_OF_SOF: | |
229 | Uart.posCnt++; | |
abb21530 | 230 | if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit |
489ef36c | 231 | if(bit) { |
abb21530 | 232 | if(Uart.bitCnt > 9) { |
489ef36c | 233 | // we've seen enough consecutive |
234 | // zeros that it's a valid SOF | |
235 | Uart.posCnt = 0; | |
236 | Uart.byteCnt = 0; | |
237 | Uart.state = STATE_AWAITING_START_BIT; | |
238 | LED_A_ON(); // Indicate we got a valid SOF | |
239 | } else { | |
240 | // didn't stay down long enough | |
241 | // before going high, error | |
36f84d47 | 242 | Uart.state = STATE_UNSYNCD; |
489ef36c | 243 | } |
244 | } else { | |
245 | // do nothing, keep waiting | |
246 | } | |
247 | Uart.bitCnt++; | |
248 | } | |
249 | if(Uart.posCnt >= 4) Uart.posCnt = 0; | |
abb21530 | 250 | if(Uart.bitCnt > 12) { |
489ef36c | 251 | // Give up if we see too many zeros without |
252 | // a one, too. | |
36f84d47 | 253 | LED_A_OFF(); |
254 | Uart.state = STATE_UNSYNCD; | |
489ef36c | 255 | } |
256 | break; | |
257 | ||
258 | case STATE_AWAITING_START_BIT: | |
259 | Uart.posCnt++; | |
260 | if(bit) { | |
abb21530 | 261 | if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs |
489ef36c | 262 | // stayed high for too long between |
263 | // characters, error | |
36f84d47 | 264 | Uart.state = STATE_UNSYNCD; |
489ef36c | 265 | } |
266 | } else { | |
267 | // falling edge, this starts the data byte | |
268 | Uart.posCnt = 0; | |
269 | Uart.bitCnt = 0; | |
270 | Uart.shiftReg = 0; | |
271 | Uart.state = STATE_RECEIVING_DATA; | |
489ef36c | 272 | } |
273 | break; | |
274 | ||
275 | case STATE_RECEIVING_DATA: | |
276 | Uart.posCnt++; | |
277 | if(Uart.posCnt == 2) { | |
278 | // time to sample a bit | |
279 | Uart.shiftReg >>= 1; | |
280 | if(bit) { | |
281 | Uart.shiftReg |= 0x200; | |
282 | } | |
283 | Uart.bitCnt++; | |
284 | } | |
285 | if(Uart.posCnt >= 4) { | |
286 | Uart.posCnt = 0; | |
287 | } | |
288 | if(Uart.bitCnt == 10) { | |
289 | if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001)) | |
290 | { | |
291 | // this is a data byte, with correct | |
292 | // start and stop bits | |
293 | Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff; | |
294 | Uart.byteCnt++; | |
295 | ||
296 | if(Uart.byteCnt >= Uart.byteCntMax) { | |
297 | // Buffer overflowed, give up | |
36f84d47 | 298 | LED_A_OFF(); |
299 | Uart.state = STATE_UNSYNCD; | |
489ef36c | 300 | } else { |
301 | // so get the next byte now | |
302 | Uart.posCnt = 0; | |
303 | Uart.state = STATE_AWAITING_START_BIT; | |
304 | } | |
46734099 | 305 | } else if (Uart.shiftReg == 0x000) { |
489ef36c | 306 | // this is an EOF byte |
307 | LED_A_OFF(); // Finished receiving | |
36f84d47 | 308 | Uart.state = STATE_UNSYNCD; |
22e24700 | 309 | if (Uart.byteCnt != 0) { |
489ef36c | 310 | return TRUE; |
22e24700 | 311 | } |
489ef36c | 312 | } else { |
313 | // this is an error | |
36f84d47 | 314 | LED_A_OFF(); |
46734099 | 315 | Uart.state = STATE_UNSYNCD; |
36f84d47 | 316 | } |
489ef36c | 317 | } |
318 | break; | |
319 | ||
320 | default: | |
36f84d47 | 321 | LED_A_OFF(); |
489ef36c | 322 | Uart.state = STATE_UNSYNCD; |
323 | break; | |
324 | } | |
325 | ||
489ef36c | 326 | return FALSE; |
327 | } | |
328 | ||
329 | //----------------------------------------------------------------------------- | |
330 | // Receive a command (from the reader to us, where we are the simulated tag), | |
331 | // and store it in the given buffer, up to the given maximum length. Keeps | |
332 | // spinning, waiting for a well-framed command, until either we get one | |
333 | // (returns TRUE) or someone presses the pushbutton on the board (FALSE). | |
334 | // | |
335 | // Assume that we're called with the SSC (to the FPGA) and ADC path set | |
336 | // correctly. | |
337 | //----------------------------------------------------------------------------- | |
36f84d47 | 338 | static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) |
489ef36c | 339 | { |
abb21530 | 340 | // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen |
489ef36c | 341 | // only, since we are receiving, not transmitting). |
342 | // Signal field is off with the appropriate LED | |
343 | LED_D_OFF(); | |
344 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION); | |
345 | ||
489ef36c | 346 | // Now run a `software UART' on the stream of incoming samples. |
36f84d47 | 347 | UartInit(received); |
489ef36c | 348 | |
349 | for(;;) { | |
350 | WDT_HIT(); | |
351 | ||
352 | if(BUTTON_PRESS()) return FALSE; | |
353 | ||
489ef36c | 354 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
355 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
36f84d47 | 356 | for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) { |
357 | if(Handle14443bUartBit(b & mask)) { | |
489ef36c | 358 | *len = Uart.byteCnt; |
359 | return TRUE; | |
360 | } | |
361 | } | |
362 | } | |
363 | } | |
36f84d47 | 364 | |
365 | return FALSE; | |
489ef36c | 366 | } |
367 | ||
368 | //----------------------------------------------------------------------------- | |
369 | // Main loop of simulated tag: receive commands from reader, decide what | |
370 | // response to send, and send it. | |
371 | //----------------------------------------------------------------------------- | |
abb21530 | 372 | void SimulateIso14443bTag(void) |
489ef36c | 373 | { |
b10a759f | 374 | // the only commands we understand is WUPB, AFI=0, Select All, N=1: |
375 | static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB | |
376 | // ... and REQB, AFI=0, Normal Request, N=1: | |
377 | static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB | |
378 | // ... and HLTB | |
379 | static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB | |
380 | // ... and ATTRIB | |
381 | static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB | |
36f84d47 | 382 | |
383 | // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922, | |
abb21530 | 384 | // supports only 106kBit/s in both directions, max frame size = 32Bytes, |
385 | // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported: | |
489ef36c | 386 | static const uint8_t response1[] = { |
387 | 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22, | |
388 | 0x00, 0x21, 0x85, 0x5e, 0xd7 | |
389 | }; | |
b10a759f | 390 | // response to HLTB and ATTRIB |
391 | static const uint8_t response2[] = {0x00, 0x78, 0xF0}; | |
489ef36c | 392 | |
cef590d9 | 393 | //uint8_t parity[MAX_PARITY_SIZE] = {0x00}; |
99cf19d9 | 394 | |
395 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
396 | ||
36f84d47 | 397 | clear_trace(); |
398 | set_tracing(TRUE); | |
399 | ||
400 | const uint8_t *resp; | |
401 | uint8_t *respCode; | |
402 | uint16_t respLen, respCodeLen; | |
17ad0e09 | 403 | |
404 | // allocate command receive buffer | |
cef590d9 | 405 | BigBuf_free(); BigBuf_Clear_ext(false); |
406 | ||
17ad0e09 | 407 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); |
489ef36c | 408 | |
99cf19d9 | 409 | uint16_t len; |
410 | uint16_t cmdsRecvd = 0; | |
411 | ||
abb21530 | 412 | // prepare the (only one) tag answer: |
489ef36c | 413 | CodeIso14443bAsTag(response1, sizeof(response1)); |
36f84d47 | 414 | uint8_t *resp1Code = BigBuf_malloc(ToSendMax); |
415 | memcpy(resp1Code, ToSend, ToSendMax); | |
416 | uint16_t resp1CodeLen = ToSendMax; | |
489ef36c | 417 | |
b10a759f | 418 | // prepare the (other) tag answer: |
419 | CodeIso14443bAsTag(response2, sizeof(response2)); | |
420 | uint8_t *resp2Code = BigBuf_malloc(ToSendMax); | |
421 | memcpy(resp2Code, ToSend, ToSendMax); | |
422 | uint16_t resp2CodeLen = ToSendMax; | |
423 | ||
489ef36c | 424 | // We need to listen to the high-frequency, peak-detected path. |
425 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
426 | FpgaSetupSsc(); | |
427 | ||
428 | cmdsRecvd = 0; | |
429 | ||
430 | for(;;) { | |
489ef36c | 431 | |
810f5379 | 432 | if (!GetIso14443bCommandFromReader(receivedCmd, &len)) { |
433 | Dbprintf("button pressed, received %d commands", cmdsRecvd); | |
434 | break; | |
489ef36c | 435 | } |
436 | ||
cef590d9 | 437 | if (tracing) |
438 | //LogTrace(receivedCmd, len, 0, 0, parity, TRUE); | |
439 | LogTrace(receivedCmd, len, 0, 0, NULL, TRUE); | |
440 | ||
489ef36c | 441 | |
36f84d47 | 442 | // Good, look at the command now. |
443 | if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0) | |
444 | || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) { | |
445 | resp = response1; | |
446 | respLen = sizeof(response1); | |
447 | respCode = resp1Code; | |
448 | respCodeLen = resp1CodeLen; | |
b10a759f | 449 | } else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0]) |
450 | || (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) { | |
451 | resp = response2; | |
452 | respLen = sizeof(response2); | |
453 | respCode = resp2Code; | |
454 | respCodeLen = resp2CodeLen; | |
489ef36c | 455 | } else { |
456 | Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd); | |
457 | // And print whether the CRC fails, just for good measure | |
36f84d47 | 458 | uint8_t b1, b2; |
b10a759f | 459 | if (len >= 3){ // if crc exists |
810f5379 | 460 | ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2); |
461 | if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) { | |
462 | // Not so good, try again. | |
463 | DbpString("+++CRC fail"); | |
464 | ||
465 | } else { | |
466 | DbpString("CRC passes"); | |
467 | } | |
b10a759f | 468 | } |
469 | //get rid of compiler warning | |
470 | respCodeLen = 0; | |
471 | resp = response1; | |
472 | respLen = 0; | |
473 | respCode = resp1Code; | |
474 | //don't crash at new command just wait and see if reader will send other new cmds. | |
475 | //break; | |
489ef36c | 476 | } |
477 | ||
489ef36c | 478 | cmdsRecvd++; |
479 | ||
480 | if(cmdsRecvd > 0x30) { | |
481 | DbpString("many commands later..."); | |
482 | break; | |
483 | } | |
484 | ||
36f84d47 | 485 | if(respCodeLen <= 0) continue; |
489ef36c | 486 | |
487 | // Modulate BPSK | |
488 | // Signal field is off with the appropriate LED | |
489 | LED_D_OFF(); | |
490 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK); | |
491 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
492 | FpgaSetupSsc(); | |
493 | ||
494 | // Transmit the response. | |
36f84d47 | 495 | uint16_t i = 0; |
cef590d9 | 496 | for(;;) { |
489ef36c | 497 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
cef590d9 | 498 | uint8_t b = respCode[i]; |
499 | ||
500 | AT91C_BASE_SSC->SSC_THR = b; | |
501 | ||
17ad0e09 | 502 | i++; |
cef590d9 | 503 | if(i > respCodeLen) { |
504 | break; | |
505 | } | |
506 | } | |
507 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
508 | volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
509 | (void)b; | |
489ef36c | 510 | } |
511 | } | |
36f84d47 | 512 | |
cef590d9 | 513 | // trace the response: |
514 | if (tracing) | |
515 | //LogTrace(resp, respLen, 0, 0, parity, FALSE); | |
516 | LogTrace(resp, respLen, 0, 0, NULL, FALSE); | |
489ef36c | 517 | } |
518 | } | |
519 | ||
520 | //============================================================================= | |
521 | // An ISO 14443 Type B reader. We take layer two commands, code them | |
522 | // appropriately, and then send them to the tag. We then listen for the | |
523 | // tag's response, which we leave in the buffer to be demodulated on the | |
524 | // PC side. | |
525 | //============================================================================= | |
526 | ||
489ef36c | 527 | /* |
528 | * Handles reception of a bit from the tag | |
529 | * | |
abb21530 | 530 | * This function is called 2 times per bit (every 4 subcarrier cycles). |
531 | * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us | |
532 | * | |
489ef36c | 533 | * LED handling: |
534 | * LED C -> ON once we have received the SOF and are expecting the rest. | |
535 | * LED C -> OFF once we have received EOF or are unsynced | |
536 | * | |
537 | * Returns: true if we received a EOF | |
538 | * false if we are still waiting for some more | |
539 | * | |
540 | */ | |
cef590d9 | 541 | #ifndef SUBCARRIER_DETECT_THRESHOLD |
542 | # define SUBCARRIER_DETECT_THRESHOLD 6 | |
543 | #endif | |
544 | ||
abb21530 | 545 | static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) |
489ef36c | 546 | { |
5b59bf20 | 547 | int v = 0; |
51d4f6f1 | 548 | // The soft decision on the bit uses an estimate of just the |
549 | // quadrant of the reference angle, not the exact angle. | |
489ef36c | 550 | #define MAKE_SOFT_DECISION() { \ |
5b59bf20 | 551 | if(Demod.sumI > 0) { \ |
552 | v = ci; \ | |
553 | } else { \ | |
554 | v = -ci; \ | |
555 | } \ | |
489ef36c | 556 | if(Demod.sumQ > 0) { \ |
557 | v += cq; \ | |
558 | } else { \ | |
559 | v -= cq; \ | |
560 | } \ | |
561 | } | |
562 | ||
cef590d9 | 563 | // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq) |
564 | /* #define CHECK_FOR_SUBCARRIER() { \ | |
565 | v = ci; \ | |
566 | if(v < 0) v = -v; \ | |
567 | if(cq > 0) { \ | |
568 | v += cq; \ | |
569 | } else { \ | |
570 | v -= cq; \ | |
571 | } \ | |
572 | } | |
573 | */ | |
abb21530 | 574 | // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq))) |
575 | #define CHECK_FOR_SUBCARRIER() { \ | |
cef590d9 | 576 | if(ci < 0) { \ |
577 | if(cq < 0) { /* ci < 0, cq < 0 */ \ | |
578 | if (cq < ci) { \ | |
579 | v = -cq - (ci >> 1); \ | |
580 | } else { \ | |
581 | v = -ci - (cq >> 1); \ | |
582 | } \ | |
583 | } else { /* ci < 0, cq >= 0 */ \ | |
584 | if (cq < -ci) { \ | |
585 | v = -ci + (cq >> 1); \ | |
586 | } else { \ | |
587 | v = cq - (ci >> 1); \ | |
588 | } \ | |
589 | } \ | |
590 | } else { \ | |
591 | if(cq < 0) { /* ci >= 0, cq < 0 */ \ | |
592 | if (-cq < ci) { \ | |
593 | v = ci - (cq >> 1); \ | |
594 | } else { \ | |
595 | v = -cq + (ci >> 1); \ | |
596 | } \ | |
597 | } else { /* ci >= 0, cq >= 0 */ \ | |
598 | if (cq < ci) { \ | |
599 | v = ci + (cq >> 1); \ | |
600 | } else { \ | |
601 | v = cq + (ci >> 1); \ | |
602 | } \ | |
603 | } \ | |
604 | } \ | |
605 | } | |
db25599d | 606 | |
607 | ||
489ef36c | 608 | switch(Demod.state) { |
609 | case DEMOD_UNSYNCD: | |
cef590d9 | 610 | |
abb21530 | 611 | CHECK_FOR_SUBCARRIER(); |
cef590d9 | 612 | |
613 | // subcarrier detected | |
614 | if(v > SUBCARRIER_DETECT_THRESHOLD) { | |
489ef36c | 615 | Demod.state = DEMOD_PHASE_REF_TRAINING; |
abb21530 | 616 | Demod.sumI = ci; |
617 | Demod.sumQ = cq; | |
618 | Demod.posCount = 1; | |
489ef36c | 619 | } |
620 | break; | |
621 | ||
622 | case DEMOD_PHASE_REF_TRAINING: | |
5b59bf20 | 623 | if(Demod.posCount < 8) { |
cef590d9 | 624 | |
abb21530 | 625 | CHECK_FOR_SUBCARRIER(); |
cef590d9 | 626 | |
abb21530 | 627 | if (v > SUBCARRIER_DETECT_THRESHOLD) { |
628 | // set the reference phase (will code a logic '1') by averaging over 32 1/fs. | |
629 | // note: synchronization time > 80 1/fs | |
b10a759f | 630 | Demod.sumI += ci; |
631 | Demod.sumQ += cq; | |
cef590d9 | 632 | ++Demod.posCount; |
633 | } else { | |
634 | // subcarrier lost | |
b10a759f | 635 | Demod.state = DEMOD_UNSYNCD; |
abb21530 | 636 | } |
489ef36c | 637 | } else { |
b10a759f | 638 | Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF; |
489ef36c | 639 | } |
489ef36c | 640 | break; |
641 | ||
642 | case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: | |
cef590d9 | 643 | |
489ef36c | 644 | MAKE_SOFT_DECISION(); |
cef590d9 | 645 | |
db25599d | 646 | //Dbprintf("ICE: %d %d %d %d %d", v, Demod.sumI, Demod.sumQ, ci, cq ); |
cef590d9 | 647 | if(v < 0) { // logic '0' detected |
489ef36c | 648 | Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF; |
abb21530 | 649 | Demod.posCount = 0; // start of SOF sequence |
489ef36c | 650 | } else { |
cef590d9 | 651 | // maximum length of TR1 = 200 1/fs |
652 | if(Demod.posCount > 25*2) Demod.state = DEMOD_UNSYNCD; | |
489ef36c | 653 | } |
cef590d9 | 654 | ++Demod.posCount; |
489ef36c | 655 | break; |
656 | ||
657 | case DEMOD_GOT_FALLING_EDGE_OF_SOF: | |
cef590d9 | 658 | ++Demod.posCount; |
659 | ||
489ef36c | 660 | MAKE_SOFT_DECISION(); |
cef590d9 | 661 | |
489ef36c | 662 | if(v > 0) { |
cef590d9 | 663 | // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges |
664 | if(Demod.posCount < 9*2) { | |
489ef36c | 665 | Demod.state = DEMOD_UNSYNCD; |
666 | } else { | |
a62bf3af | 667 | LED_C_ON(); // Got SOF |
489ef36c | 668 | Demod.state = DEMOD_AWAITING_START_BIT; |
669 | Demod.posCount = 0; | |
670 | Demod.len = 0; | |
489ef36c | 671 | } |
672 | } else { | |
cef590d9 | 673 | // low phase of SOF too long (> 12 etu) |
674 | if (Demod.posCount > 12*2) { | |
489ef36c | 675 | Demod.state = DEMOD_UNSYNCD; |
47286d89 | 676 | LED_C_OFF(); |
489ef36c | 677 | } |
678 | } | |
489ef36c | 679 | break; |
680 | ||
681 | case DEMOD_AWAITING_START_BIT: | |
cef590d9 | 682 | ++Demod.posCount; |
683 | ||
489ef36c | 684 | MAKE_SOFT_DECISION(); |
cef590d9 | 685 | |
686 | if (v > 0) { | |
abb21530 | 687 | if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs |
489ef36c | 688 | Demod.state = DEMOD_UNSYNCD; |
47286d89 | 689 | LED_C_OFF(); |
489ef36c | 690 | } |
abb21530 | 691 | } else { // start bit detected |
489ef36c | 692 | Demod.bitCount = 0; |
abb21530 | 693 | Demod.posCount = 1; // this was the first half |
489ef36c | 694 | Demod.thisBit = v; |
695 | Demod.shiftReg = 0; | |
696 | Demod.state = DEMOD_RECEIVING_DATA; | |
697 | } | |
698 | break; | |
699 | ||
700 | case DEMOD_RECEIVING_DATA: | |
cef590d9 | 701 | |
489ef36c | 702 | MAKE_SOFT_DECISION(); |
cef590d9 | 703 | |
704 | if (Demod.posCount == 0) { | |
705 | // first half of bit | |
489ef36c | 706 | Demod.thisBit = v; |
707 | Demod.posCount = 1; | |
cef590d9 | 708 | } else { |
709 | // second half of bit | |
489ef36c | 710 | Demod.thisBit += v; |
489ef36c | 711 | Demod.shiftReg >>= 1; |
489ef36c | 712 | |
cef590d9 | 713 | // logic '1' |
714 | if(Demod.thisBit > 0) Demod.shiftReg |= 0x200; | |
715 | ||
716 | ++Demod.bitCount; | |
717 | ||
489ef36c | 718 | if(Demod.bitCount == 10) { |
cef590d9 | 719 | |
489ef36c | 720 | uint16_t s = Demod.shiftReg; |
cef590d9 | 721 | |
722 | // stop bit == '1', start bit == '0' | |
723 | if((s & 0x200) && !(s & 0x001)) { | |
489ef36c | 724 | uint8_t b = (s >> 1); |
725 | Demod.output[Demod.len] = b; | |
cef590d9 | 726 | ++Demod.len; |
489ef36c | 727 | Demod.state = DEMOD_AWAITING_START_BIT; |
489ef36c | 728 | } else { |
729 | Demod.state = DEMOD_UNSYNCD; | |
47286d89 | 730 | LED_C_OFF(); |
cef590d9 | 731 | |
732 | // This is EOF (start, stop and all data bits == '0' | |
733 | if(s == 0) return TRUE; | |
489ef36c | 734 | } |
735 | } | |
736 | Demod.posCount = 0; | |
737 | } | |
738 | break; | |
739 | ||
740 | default: | |
741 | Demod.state = DEMOD_UNSYNCD; | |
47286d89 | 742 | LED_C_OFF(); |
489ef36c | 743 | break; |
744 | } | |
489ef36c | 745 | return FALSE; |
746 | } | |
747 | ||
748 | ||
489ef36c | 749 | /* |
750 | * Demodulate the samples we received from the tag, also log to tracebuffer | |
489ef36c | 751 | * quiet: set to 'TRUE' to disable debug output |
752 | */ | |
abb21530 | 753 | static void GetSamplesFor14443bDemod(int n, bool quiet) |
489ef36c | 754 | { |
755 | int max = 0; | |
abb21530 | 756 | bool gotFrame = FALSE; |
489ef36c | 757 | int lastRxCounter, ci, cq, samples = 0; |
758 | ||
759 | // Allocate memory from BigBuf for some buffers | |
760 | // free all previous allocations first | |
761 | BigBuf_free(); | |
b10a759f | 762 | |
489ef36c | 763 | // The response (tag -> reader) that we're receiving. |
489ef36c | 764 | // Set up the demodulator for tag -> reader responses. |
db25599d | 765 | DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); |
b10a759f | 766 | |
767 | // The DMA buffer, used to stream samples from the FPGA | |
768 | int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); | |
489ef36c | 769 | |
cef590d9 | 770 | // And put the FPGA in the appropriate mode |
771 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); | |
772 | ||
db25599d | 773 | // Setup and start DMA. |
774 | FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); | |
775 | ||
489ef36c | 776 | int8_t *upTo = dmaBuf; |
705bfa10 | 777 | lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; |
489ef36c | 778 | |
779 | // Signal field is ON with the appropriate LED: | |
abb21530 | 780 | LED_D_ON(); |
489ef36c | 781 | for(;;) { |
782 | int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR; | |
783 | if(behindBy > max) max = behindBy; | |
784 | ||
705bfa10 | 785 | while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1)) > 2) { |
489ef36c | 786 | ci = upTo[0]; |
787 | cq = upTo[1]; | |
788 | upTo += 2; | |
705bfa10 | 789 | if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { |
489ef36c | 790 | upTo = dmaBuf; |
791 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo; | |
705bfa10 | 792 | AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; |
489ef36c | 793 | } |
794 | lastRxCounter -= 2; | |
cef590d9 | 795 | |
796 | if(lastRxCounter <= 0) | |
797 | lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; | |
489ef36c | 798 | |
799 | samples += 2; | |
800 | ||
db25599d | 801 | // |
802 | gotFrame = Handle14443bSamplesDemod(ci , cq ); | |
803 | if ( gotFrame ) | |
51d4f6f1 | 804 | break; |
489ef36c | 805 | } |
806 | ||
abb21530 | 807 | if(samples > n || gotFrame) { |
489ef36c | 808 | break; |
809 | } | |
810 | } | |
abb21530 | 811 | |
cef590d9 | 812 | //disable |
489ef36c | 813 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; |
abb21530 | 814 | |
ff3e0744 | 815 | if (!quiet) { |
cef590d9 | 816 | Dbprintf("max behindby = %d, samples = %d, gotFrame = %s, Demod.state = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", |
b10a759f | 817 | max, |
818 | samples, | |
ff3e0744 | 819 | (gotFrame) ? "true" : "false", |
cef590d9 | 820 | Demod.state, |
b10a759f | 821 | Demod.len, |
822 | Demod.sumI, | |
823 | Demod.sumQ | |
824 | ); | |
825 | } | |
826 | ||
489ef36c | 827 | //Tracing |
cef590d9 | 828 | if (Demod.len > 0) |
829 | LogTrace(Demod.output, Demod.len, 0, 0, NULL, FALSE); | |
489ef36c | 830 | } |
831 | ||
832 | ||
489ef36c | 833 | //----------------------------------------------------------------------------- |
834 | // Transmit the command (to the tag) that was placed in ToSend[]. | |
835 | //----------------------------------------------------------------------------- | |
abb21530 | 836 | static void TransmitFor14443b(void) |
489ef36c | 837 | { |
838 | int c; | |
cef590d9 | 839 | volatile uint32_t r; |
489ef36c | 840 | FpgaSetupSsc(); |
a62bf3af | 841 | |
cef590d9 | 842 | while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) |
489ef36c | 843 | AT91C_BASE_SSC->SSC_THR = 0xff; |
489ef36c | 844 | |
845 | // Signal field is ON with the appropriate Red LED | |
846 | LED_D_ON(); | |
847 | // Signal we are transmitting with the Green LED | |
848 | LED_B_ON(); | |
abb21530 | 849 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); |
b10a759f | 850 | |
489ef36c | 851 | for(c = 0; c < 10;) { |
852 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
853 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
cef590d9 | 854 | ++c; |
489ef36c | 855 | } |
856 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
cef590d9 | 857 | r = AT91C_BASE_SSC->SSC_RHR; |
489ef36c | 858 | (void)r; |
859 | } | |
860 | WDT_HIT(); | |
861 | } | |
862 | ||
863 | c = 0; | |
864 | for(;;) { | |
865 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
866 | AT91C_BASE_SSC->SSC_THR = ToSend[c]; | |
cef590d9 | 867 | ++c; |
868 | if(c >= ToSendMax) | |
489ef36c | 869 | break; |
489ef36c | 870 | } |
871 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
cef590d9 | 872 | r = AT91C_BASE_SSC->SSC_RHR; |
489ef36c | 873 | (void)r; |
874 | } | |
875 | WDT_HIT(); | |
876 | } | |
877 | LED_B_OFF(); // Finished sending | |
878 | } | |
879 | ||
880 | ||
881 | //----------------------------------------------------------------------------- | |
882 | // Code a layer 2 command (string of octets, including CRC) into ToSend[], | |
abb21530 | 883 | // so that it is ready to transmit to the tag using TransmitFor14443b(). |
489ef36c | 884 | //----------------------------------------------------------------------------- |
885 | static void CodeIso14443bAsReader(const uint8_t *cmd, int len) | |
886 | { | |
887 | int i, j; | |
888 | uint8_t b; | |
889 | ||
890 | ToSendReset(); | |
891 | ||
892 | // Establish initial reference level | |
cef590d9 | 893 | for(i = 0; i < 40; i++) |
489ef36c | 894 | ToSendStuffBit(1); |
cef590d9 | 895 | |
489ef36c | 896 | // Send SOF |
cef590d9 | 897 | for(i = 0; i < 10; i++) |
489ef36c | 898 | ToSendStuffBit(0); |
489ef36c | 899 | |
900 | for(i = 0; i < len; i++) { | |
901 | // Stop bits/EGT | |
902 | ToSendStuffBit(1); | |
903 | ToSendStuffBit(1); | |
904 | // Start bit | |
905 | ToSendStuffBit(0); | |
906 | // Data bits | |
907 | b = cmd[i]; | |
908 | for(j = 0; j < 8; j++) { | |
cef590d9 | 909 | if(b & 1) |
489ef36c | 910 | ToSendStuffBit(1); |
cef590d9 | 911 | else |
489ef36c | 912 | ToSendStuffBit(0); |
cef590d9 | 913 | |
489ef36c | 914 | b >>= 1; |
915 | } | |
916 | } | |
917 | // Send EOF | |
918 | ToSendStuffBit(1); | |
cef590d9 | 919 | for(i = 0; i < 10; i++) |
489ef36c | 920 | ToSendStuffBit(0); |
cef590d9 | 921 | |
922 | for(i = 0; i < 8; i++) | |
489ef36c | 923 | ToSendStuffBit(1); |
cef590d9 | 924 | |
489ef36c | 925 | |
926 | // And then a little more, to make sure that the last character makes | |
927 | // it out before we switch to rx mode. | |
cef590d9 | 928 | for(i = 0; i < 24; i++) |
489ef36c | 929 | ToSendStuffBit(1); |
489ef36c | 930 | |
931 | // Convert from last character reference to length | |
cef590d9 | 932 | ++ToSendMax; |
489ef36c | 933 | } |
934 | ||
935 | ||
489ef36c | 936 | /** |
937 | Convenience function to encode, transmit and trace iso 14443b comms | |
938 | **/ | |
939 | static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) | |
940 | { | |
941 | CodeIso14443bAsReader(cmd, len); | |
abb21530 | 942 | TransmitFor14443b(); |
489ef36c | 943 | if (tracing) { |
cef590d9 | 944 | //uint8_t parity[MAX_PARITY_SIZE]; |
945 | //LogTrace(cmd,len, 0, 0, parity, TRUE); | |
946 | LogTrace(cmd,len, 0, 0, NULL, TRUE); | |
489ef36c | 947 | } |
948 | } | |
949 | ||
a62bf3af | 950 | /* Sends an APDU to the tag |
951 | * TODO: check CRC and preamble | |
952 | */ | |
953 | int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) | |
954 | { | |
955 | uint8_t message_frame[message_length + 4]; | |
956 | // PCB | |
957 | message_frame[0] = 0x0A | pcb_blocknum; | |
958 | pcb_blocknum ^= 1; | |
959 | // CID | |
960 | message_frame[1] = 0; | |
961 | // INF | |
962 | memcpy(message_frame + 2, message, message_length); | |
963 | // EDC (CRC) | |
964 | ComputeCrc14443(CRC_14443_B, message_frame, message_length + 2, &message_frame[message_length + 2], &message_frame[message_length + 3]); | |
965 | // send | |
966 | CodeAndTransmit14443bAsReader(message_frame, message_length + 4); | |
967 | // get response | |
cef590d9 | 968 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
a62bf3af | 969 | if(Demod.len < 3) |
a62bf3af | 970 | return 0; |
cef590d9 | 971 | |
a62bf3af | 972 | // TODO: Check CRC |
973 | // copy response contents | |
974 | if(response != NULL) | |
a62bf3af | 975 | memcpy(response, Demod.output, Demod.len); |
cef590d9 | 976 | |
a62bf3af | 977 | return Demod.len; |
978 | } | |
979 | ||
980 | /* Perform the ISO 14443 B Card Selection procedure | |
981 | * Currently does NOT do any collision handling. | |
982 | * It expects 0-1 cards in the device's range. | |
983 | * TODO: Support multiple cards (perform anticollision) | |
984 | * TODO: Verify CRC checksums | |
985 | */ | |
986 | int iso14443b_select_card() | |
987 | { | |
988 | // WUPB command (including CRC) | |
989 | // Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state | |
990 | static const uint8_t wupb[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; | |
991 | // ATTRIB command (with space for CRC) | |
992 | uint8_t attrib[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}; | |
993 | ||
994 | // first, wake up the tag | |
995 | CodeAndTransmit14443bAsReader(wupb, sizeof(wupb)); | |
996 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
997 | // ATQB too short? | |
998 | if (Demod.len < 14) | |
a62bf3af | 999 | return 2; |
a62bf3af | 1000 | |
1001 | // select the tag | |
1002 | // copy the PUPI to ATTRIB | |
1003 | memcpy(attrib + 1, Demod.output + 1, 4); | |
1004 | /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into | |
1005 | ATTRIB (Param 3) */ | |
1006 | attrib[7] = Demod.output[10] & 0x0F; | |
1007 | ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10); | |
1008 | CodeAndTransmit14443bAsReader(attrib, sizeof(attrib)); | |
1009 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
1010 | // Answer to ATTRIB too short? | |
1011 | if(Demod.len < 3) | |
a62bf3af | 1012 | return 2; |
cef590d9 | 1013 | |
a62bf3af | 1014 | // reset PCB block number |
1015 | pcb_blocknum = 0; | |
1016 | return 1; | |
1017 | } | |
1018 | ||
1019 | // Set up ISO 14443 Type B communication (similar to iso14443a_setup) | |
1020 | void iso14443b_setup() { | |
db25599d | 1021 | |
a62bf3af | 1022 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
cef590d9 | 1023 | |
1024 | BigBuf_free(); BigBuf_Clear_ext(false); | |
1025 | DemodReset(); | |
1026 | UartReset(); | |
ff3e0744 | 1027 | |
a62bf3af | 1028 | // Set up the synchronous serial port |
1029 | FpgaSetupSsc(); | |
cef590d9 | 1030 | |
a62bf3af | 1031 | // connect Demodulated Signal to ADC: |
1032 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
1033 | ||
1034 | // Signal field is on with the appropriate LED | |
1035 | LED_D_ON(); | |
1036 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); | |
cef590d9 | 1037 | SpinDelay(200); |
a62bf3af | 1038 | |
1039 | // Start the timer | |
ff3e0744 | 1040 | StartCountSspClk(); |
a62bf3af | 1041 | } |
489ef36c | 1042 | |
1043 | //----------------------------------------------------------------------------- | |
abb21530 | 1044 | // Read a SRI512 ISO 14443B tag. |
489ef36c | 1045 | // |
1046 | // SRI512 tags are just simple memory tags, here we're looking at making a dump | |
1047 | // of the contents of the memory. No anticollision algorithm is done, we assume | |
1048 | // we have a single tag in the field. | |
1049 | // | |
1050 | // I tried to be systematic and check every answer of the tag, every CRC, etc... | |
1051 | //----------------------------------------------------------------------------- | |
abb21530 | 1052 | void ReadSTMemoryIso14443b(uint32_t dwLast) |
489ef36c | 1053 | { |
17ad0e09 | 1054 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
489ef36c | 1055 | clear_trace(); |
1056 | set_tracing(TRUE); | |
1057 | ||
1058 | uint8_t i = 0x00; | |
1059 | ||
489ef36c | 1060 | // Make sure that we start from off, since the tags are stateful; |
1061 | // confusing things will happen if we don't reset them between reads. | |
1062 | LED_D_OFF(); | |
1063 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
99cf19d9 | 1064 | SpinDelay(200); |
1065 | ||
489ef36c | 1066 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
1067 | FpgaSetupSsc(); | |
1068 | ||
1069 | // Now give it time to spin up. | |
1070 | // Signal field is on with the appropriate LED | |
1071 | LED_D_ON(); | |
22e24700 | 1072 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); |
489ef36c | 1073 | SpinDelay(200); |
1074 | ||
1075 | // First command: wake up the tag using the INITIATE command | |
51d4f6f1 | 1076 | uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b}; |
489ef36c | 1077 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); |
abb21530 | 1078 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
489ef36c | 1079 | |
1080 | if (Demod.len == 0) { | |
22e24700 | 1081 | DbpString("No response from tag"); |
5ee53a0e | 1082 | set_tracing(FALSE); |
22e24700 | 1083 | return; |
489ef36c | 1084 | } else { |
705bfa10 | 1085 | Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x", |
1086 | Demod.output[0], Demod.output[1], Demod.output[2]); | |
489ef36c | 1087 | } |
705bfa10 | 1088 | |
489ef36c | 1089 | // There is a response, SELECT the uid |
1090 | DbpString("Now SELECT tag:"); | |
1091 | cmd1[0] = 0x0E; // 0x0E is SELECT | |
1092 | cmd1[1] = Demod.output[0]; | |
1093 | ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); | |
1094 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); | |
abb21530 | 1095 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
489ef36c | 1096 | if (Demod.len != 3) { |
22e24700 | 1097 | Dbprintf("Expected 3 bytes from tag, got %d", Demod.len); |
5ee53a0e | 1098 | set_tracing(FALSE); |
22e24700 | 1099 | return; |
489ef36c | 1100 | } |
1101 | // Check the CRC of the answer: | |
1102 | ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]); | |
1103 | if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) { | |
22e24700 | 1104 | DbpString("CRC Error reading select response."); |
5ee53a0e | 1105 | set_tracing(FALSE); |
22e24700 | 1106 | return; |
489ef36c | 1107 | } |
1108 | // Check response from the tag: should be the same UID as the command we just sent: | |
1109 | if (cmd1[1] != Demod.output[0]) { | |
22e24700 | 1110 | Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]); |
5ee53a0e | 1111 | set_tracing(FALSE); |
22e24700 | 1112 | return; |
489ef36c | 1113 | } |
705bfa10 | 1114 | |
489ef36c | 1115 | // Tag is now selected, |
1116 | // First get the tag's UID: | |
1117 | cmd1[0] = 0x0B; | |
1118 | ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]); | |
1119 | CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one | |
abb21530 | 1120 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
489ef36c | 1121 | if (Demod.len != 10) { |
22e24700 | 1122 | Dbprintf("Expected 10 bytes from tag, got %d", Demod.len); |
5ee53a0e | 1123 | set_tracing(FALSE); |
22e24700 | 1124 | return; |
489ef36c | 1125 | } |
1126 | // The check the CRC of the answer (use cmd1 as temporary variable): | |
1127 | ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]); | |
51d4f6f1 | 1128 | if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) { |
22e24700 | 1129 | Dbprintf("CRC Error reading block! Expected: %04x got: %04x", |
705bfa10 | 1130 | (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]); |
489ef36c | 1131 | // Do not return;, let's go on... (we should retry, maybe ?) |
1132 | } | |
1133 | Dbprintf("Tag UID (64 bits): %08x %08x", | |
705bfa10 | 1134 | (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4], |
1135 | (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]); | |
489ef36c | 1136 | |
1137 | // Now loop to read all 16 blocks, address from 0 to last block | |
132a0217 | 1138 | Dbprintf("Tag memory dump, block 0 to %d", dwLast); |
489ef36c | 1139 | cmd1[0] = 0x08; |
1140 | i = 0x00; | |
1141 | dwLast++; | |
1142 | for (;;) { | |
1143 | if (i == dwLast) { | |
1144 | DbpString("System area block (0xff):"); | |
1145 | i = 0xff; | |
1146 | } | |
1147 | cmd1[1] = i; | |
1148 | ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); | |
1149 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); | |
abb21530 | 1150 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
489ef36c | 1151 | if (Demod.len != 6) { // Check if we got an answer from the tag |
1152 | DbpString("Expected 6 bytes from tag, got less..."); | |
1153 | return; | |
1154 | } | |
1155 | // The check the CRC of the answer (use cmd1 as temporary variable): | |
1156 | ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]); | |
1157 | if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) { | |
132a0217 | 1158 | Dbprintf("CRC Error reading block! Expected: %04x got: %04x", |
705bfa10 | 1159 | (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]); |
489ef36c | 1160 | // Do not return;, let's go on... (we should retry, maybe ?) |
1161 | } | |
1162 | // Now print out the memory location: | |
22e24700 | 1163 | Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i, |
705bfa10 | 1164 | (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], |
17ad0e09 | 1165 | (Demod.output[4]<<8)+Demod.output[5]); |
1166 | if (i == 0xff) { | |
1167 | break; | |
1168 | } | |
489ef36c | 1169 | i++; |
1170 | } | |
5ee53a0e | 1171 | |
1172 | set_tracing(FALSE); | |
489ef36c | 1173 | } |
1174 | ||
1175 | ||
1176 | //============================================================================= | |
1177 | // Finally, the `sniffer' combines elements from both the reader and | |
1178 | // simulated tag, to show both sides of the conversation. | |
1179 | //============================================================================= | |
1180 | ||
1181 | //----------------------------------------------------------------------------- | |
1182 | // Record the sequence of commands sent by the reader to the tag, with | |
1183 | // triggering so that we start recording at the point that the tag is moved | |
1184 | // near the reader. | |
1185 | //----------------------------------------------------------------------------- | |
1186 | /* | |
1187 | * Memory usage for this function, (within BigBuf) | |
47286d89 | 1188 | * Last Received command (reader->tag) - MAX_FRAME_SIZE |
1189 | * Last Received command (tag->reader) - MAX_FRAME_SIZE | |
705bfa10 | 1190 | * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE |
47286d89 | 1191 | * Demodulated samples received - all the rest |
489ef36c | 1192 | */ |
abb21530 | 1193 | void RAMFUNC SnoopIso14443b(void) |
489ef36c | 1194 | { |
1195 | // We won't start recording the frames that we acquire until we trigger; | |
1196 | // a good trigger condition to get started is probably when we see a | |
1197 | // response from the tag. | |
47286d89 | 1198 | int triggered = TRUE; // TODO: set and evaluate trigger condition |
489ef36c | 1199 | |
1200 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
cef590d9 | 1201 | BigBuf_free(); BigBuf_Clear_ext(false); |
489ef36c | 1202 | |
1203 | clear_trace(); | |
1204 | set_tracing(TRUE); | |
1205 | ||
1206 | // The DMA buffer, used to stream samples from the FPGA | |
705bfa10 | 1207 | int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); |
489ef36c | 1208 | int lastRxCounter; |
1209 | int8_t *upTo; | |
1210 | int ci, cq; | |
1211 | int maxBehindBy = 0; | |
1212 | ||
1213 | // Count of samples received so far, so that we can include timing | |
1214 | // information in the trace buffer. | |
1215 | int samples = 0; | |
1216 | ||
1217 | DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); | |
1218 | UartInit(BigBuf_malloc(MAX_FRAME_SIZE)); | |
1219 | ||
1220 | // Print some debug information about the buffer sizes | |
1221 | Dbprintf("Snooping buffers initialized:"); | |
1222 | Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen()); | |
1223 | Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE); | |
1224 | Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE); | |
705bfa10 | 1225 | Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE); |
489ef36c | 1226 | |
abb21530 | 1227 | // Signal field is off, no reader signal, no tag signal |
1228 | LEDsoff(); | |
489ef36c | 1229 | |
1230 | // And put the FPGA in the appropriate mode | |
22e24700 | 1231 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP); |
489ef36c | 1232 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
1233 | ||
1234 | // Setup for the DMA. | |
1235 | FpgaSetupSsc(); | |
1236 | upTo = dmaBuf; | |
705bfa10 | 1237 | lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; |
1238 | FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); | |
cef590d9 | 1239 | //uint8_t parity[MAX_PARITY_SIZE] = {0x00}; |
5b95953d | 1240 | |
f53020e7 | 1241 | bool TagIsActive = FALSE; |
1242 | bool ReaderIsActive = FALSE; | |
489ef36c | 1243 | |
1244 | // And now we loop, receiving samples. | |
1245 | for(;;) { | |
1246 | int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & | |
705bfa10 | 1247 | (ISO14443B_DMA_BUFFER_SIZE-1); |
489ef36c | 1248 | if(behindBy > maxBehindBy) { |
1249 | maxBehindBy = behindBy; | |
489ef36c | 1250 | } |
abb21530 | 1251 | |
489ef36c | 1252 | if(behindBy < 2) continue; |
1253 | ||
1254 | ci = upTo[0]; | |
1255 | cq = upTo[1]; | |
1256 | upTo += 2; | |
1257 | lastRxCounter -= 2; | |
705bfa10 | 1258 | if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { |
489ef36c | 1259 | upTo = dmaBuf; |
705bfa10 | 1260 | lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; |
489ef36c | 1261 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; |
705bfa10 | 1262 | AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; |
51d4f6f1 | 1263 | WDT_HIT(); |
705bfa10 | 1264 | if(behindBy > (9*ISO14443B_DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not? |
132a0217 | 1265 | Dbprintf("blew circular buffer! behindBy=%d", behindBy); |
51d4f6f1 | 1266 | break; |
abb21530 | 1267 | } |
810f5379 | 1268 | |
abb21530 | 1269 | if(!tracing) { |
810f5379 | 1270 | DbpString("Trace full"); |
abb21530 | 1271 | break; |
1272 | } | |
810f5379 | 1273 | |
abb21530 | 1274 | if(BUTTON_PRESS()) { |
1275 | DbpString("cancelled"); | |
1276 | break; | |
1277 | } | |
489ef36c | 1278 | } |
1279 | ||
1280 | samples += 2; | |
1281 | ||
47286d89 | 1282 | if (!TagIsActive) { // no need to try decoding reader data if the tag is sending |
810f5379 | 1283 | if (Handle14443bUartBit(ci & 0x01)) { |
cef590d9 | 1284 | if(triggered && tracing) { |
1285 | //LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); | |
1286 | LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, TRUE); | |
1287 | } | |
810f5379 | 1288 | /* And ready to receive another command. */ |
1289 | UartReset(); | |
1290 | /* And also reset the demod code, which might have been */ | |
1291 | /* false-triggered by the commands from the reader. */ | |
1292 | DemodReset(); | |
489ef36c | 1293 | } |
810f5379 | 1294 | if (Handle14443bUartBit(cq & 0x01)) { |
cef590d9 | 1295 | if(triggered && tracing) { |
1296 | //LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); | |
1297 | LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, TRUE); | |
1298 | } | |
810f5379 | 1299 | /* And ready to receive another command. */ |
1300 | UartReset(); | |
1301 | /* And also reset the demod code, which might have been */ | |
1302 | /* false-triggered by the commands from the reader. */ | |
1303 | DemodReset(); | |
1304 | } | |
36f84d47 | 1305 | ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF); |
47286d89 | 1306 | } |
489ef36c | 1307 | |
47286d89 | 1308 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
d8af608f | 1309 | // is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103 |
cef590d9 | 1310 | if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) { |
489ef36c | 1311 | |
810f5379 | 1312 | //Use samples as a time measurement |
cef590d9 | 1313 | if(tracing) |
1314 | //LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE); | |
1315 | LogTrace(Demod.output, Demod.len, samples, samples, NULL, FALSE); | |
489ef36c | 1316 | |
810f5379 | 1317 | triggered = TRUE; |
1318 | ||
1319 | // And ready to receive another response. | |
1320 | DemodReset(); | |
1321 | } | |
22e24700 | 1322 | TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF); |
47286d89 | 1323 | } |
489ef36c | 1324 | } |
abb21530 | 1325 | |
489ef36c | 1326 | FpgaDisableSscDma(); |
abb21530 | 1327 | LEDsoff(); |
810f5379 | 1328 | |
489ef36c | 1329 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; |
1330 | DbpString("Snoop statistics:"); | |
1331 | Dbprintf(" Max behind by: %i", maxBehindBy); | |
1332 | Dbprintf(" Uart State: %x", Uart.state); | |
1333 | Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt); | |
1334 | Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax); | |
1335 | Dbprintf(" Trace length: %i", BigBuf_get_traceLen()); | |
810f5379 | 1336 | set_tracing(FALSE); |
489ef36c | 1337 | } |
1338 | ||
1339 | ||
1340 | /* | |
1341 | * Send raw command to tag ISO14443B | |
1342 | * @Input | |
1343 | * datalen len of buffer data | |
1344 | * recv bool when true wait for data from tag and send to client | |
1345 | * powerfield bool leave the field on when true | |
1346 | * data buffer with byte to send | |
1347 | * | |
1348 | * @Output | |
1349 | * none | |
1350 | * | |
1351 | */ | |
abb21530 | 1352 | void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[]) |
489ef36c | 1353 | { |
ff3e0744 | 1354 | // param ISO_ |
1355 | // param ISO_CONNECT | |
1356 | // param ISO14A_NO_DISCONNECT | |
1357 | //if (param & ISO14A_NO_DISCONNECT) | |
1358 | // return; | |
a62bf3af | 1359 | iso14443b_setup(); |
b10a759f | 1360 | |
99cf19d9 | 1361 | if ( datalen == 0 && recv == 0 && powerfield == 0){ |
db25599d | 1362 | |
1363 | } else { | |
cef590d9 | 1364 | clear_trace(); |
99cf19d9 | 1365 | set_tracing(TRUE); |
1366 | CodeAndTransmit14443bAsReader(data, datalen); | |
1367 | } | |
489ef36c | 1368 | |
810f5379 | 1369 | if (recv) { |
b10a759f | 1370 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, FALSE); |
cef590d9 | 1371 | uint16_t len = MIN(Demod.len, USB_CMD_DATA_SIZE); |
1372 | cmd_send(CMD_ACK, len, 0, 0, Demod.output, len); | |
489ef36c | 1373 | } |
abb21530 | 1374 | |
810f5379 | 1375 | if (!powerfield) { |
489ef36c | 1376 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
b10a759f | 1377 | FpgaDisableSscDma(); |
5ee53a0e | 1378 | set_tracing(FALSE); |
489ef36c | 1379 | LED_D_OFF(); |
1380 | } | |
1381 | } | |
1382 |