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489ef36c 1//-----------------------------------------------------------------------------
2// Jonathan Westhues, split Nov 2006
3//
4// This code is licensed to you under the terms of the GNU GPL, version 2 or,
5// at your option, any later version. See the LICENSE.txt file for the text of
6// the license.
7//-----------------------------------------------------------------------------
abb21530 8// Routines to support ISO 14443B. This includes both the reader software and
9// the `fake tag' modes.
489ef36c 10//-----------------------------------------------------------------------------
11
12#include "proxmark3.h"
13#include "apps.h"
14#include "util.h"
15#include "string.h"
489ef36c 16#include "iso14443crc.h"
db25599d 17#include "common.h"
5b59bf20 18#define RECEIVE_SAMPLES_TIMEOUT 600000
a62bf3af 19#define ISO14443B_DMA_BUFFER_SIZE 256
489ef36c 20
db25599d 21
a62bf3af 22// PCB Block number for APDUs
23static uint8_t pcb_blocknum = 0;
24
489ef36c 25//=============================================================================
26// An ISO 14443 Type B tag. We listen for commands from the reader, using
27// a UART kind of thing that's implemented in software. When we get a
28// frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
29// If it's good, then we can do something appropriate with it, and send
30// a response.
31//=============================================================================
32
33//-----------------------------------------------------------------------------
34// Code up a string of octets at layer 2 (including CRC, we don't generate
35// that here) so that they can be transmitted to the reader. Doesn't transmit
36// them yet, just leaves them ready to send in ToSend[].
37//-----------------------------------------------------------------------------
38static void CodeIso14443bAsTag(const uint8_t *cmd, int len)
39{
40 int i;
41
42 ToSendReset();
43
44 // Transmit a burst of ones, as the initial thing that lets the
45 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
46 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
47 // so I will too.
48 for(i = 0; i < 20; i++) {
49 ToSendStuffBit(1);
50 ToSendStuffBit(1);
51 ToSendStuffBit(1);
52 ToSendStuffBit(1);
53 }
54
55 // Send SOF.
56 for(i = 0; i < 10; i++) {
57 ToSendStuffBit(0);
58 ToSendStuffBit(0);
59 ToSendStuffBit(0);
60 ToSendStuffBit(0);
61 }
62 for(i = 0; i < 2; i++) {
63 ToSendStuffBit(1);
64 ToSendStuffBit(1);
65 ToSendStuffBit(1);
66 ToSendStuffBit(1);
67 }
68
69 for(i = 0; i < len; i++) {
70 int j;
71 uint8_t b = cmd[i];
72
73 // Start bit
74 ToSendStuffBit(0);
75 ToSendStuffBit(0);
76 ToSendStuffBit(0);
77 ToSendStuffBit(0);
78
79 // Data bits
80 for(j = 0; j < 8; j++) {
81 if(b & 1) {
82 ToSendStuffBit(1);
83 ToSendStuffBit(1);
84 ToSendStuffBit(1);
85 ToSendStuffBit(1);
86 } else {
87 ToSendStuffBit(0);
88 ToSendStuffBit(0);
89 ToSendStuffBit(0);
90 ToSendStuffBit(0);
91 }
92 b >>= 1;
93 }
94
95 // Stop bit
96 ToSendStuffBit(1);
97 ToSendStuffBit(1);
98 ToSendStuffBit(1);
99 ToSendStuffBit(1);
100 }
101
abb21530 102 // Send EOF.
489ef36c 103 for(i = 0; i < 10; i++) {
104 ToSendStuffBit(0);
105 ToSendStuffBit(0);
106 ToSendStuffBit(0);
107 ToSendStuffBit(0);
108 }
5b59bf20 109 for(i = 0; i < 2; i++) {
489ef36c 110 ToSendStuffBit(1);
111 ToSendStuffBit(1);
112 ToSendStuffBit(1);
113 ToSendStuffBit(1);
114 }
115
116 // Convert from last byte pos to length
117 ToSendMax++;
489ef36c 118}
119
120//-----------------------------------------------------------------------------
121// The software UART that receives commands from the reader, and its state
122// variables.
123//-----------------------------------------------------------------------------
124static struct {
125 enum {
126 STATE_UNSYNCD,
127 STATE_GOT_FALLING_EDGE_OF_SOF,
128 STATE_AWAITING_START_BIT,
36f84d47 129 STATE_RECEIVING_DATA
489ef36c 130 } state;
131 uint16_t shiftReg;
132 int bitCnt;
133 int byteCnt;
134 int byteCntMax;
135 int posCnt;
136 uint8_t *output;
137} Uart;
138
139/* Receive & handle a bit coming from the reader.
abb21530 140 *
141 * This function is called 4 times per bit (every 2 subcarrier cycles).
142 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
489ef36c 143 *
144 * LED handling:
145 * LED A -> ON once we have received the SOF and are expecting the rest.
146 * LED A -> OFF once we have received EOF or are in error state or unsynced
147 *
148 * Returns: true if we received a EOF
149 * false if we are still waiting for some more
150 */
36f84d47 151static RAMFUNC int Handle14443bUartBit(uint8_t bit)
489ef36c 152{
153 switch(Uart.state) {
154 case STATE_UNSYNCD:
489ef36c 155 if(!bit) {
156 // we went low, so this could be the beginning
157 // of an SOF
158 Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
159 Uart.posCnt = 0;
160 Uart.bitCnt = 0;
161 }
162 break;
163
164 case STATE_GOT_FALLING_EDGE_OF_SOF:
165 Uart.posCnt++;
abb21530 166 if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit
489ef36c 167 if(bit) {
abb21530 168 if(Uart.bitCnt > 9) {
489ef36c 169 // we've seen enough consecutive
170 // zeros that it's a valid SOF
171 Uart.posCnt = 0;
172 Uart.byteCnt = 0;
173 Uart.state = STATE_AWAITING_START_BIT;
174 LED_A_ON(); // Indicate we got a valid SOF
175 } else {
176 // didn't stay down long enough
177 // before going high, error
36f84d47 178 Uart.state = STATE_UNSYNCD;
489ef36c 179 }
180 } else {
181 // do nothing, keep waiting
182 }
183 Uart.bitCnt++;
184 }
185 if(Uart.posCnt >= 4) Uart.posCnt = 0;
abb21530 186 if(Uart.bitCnt > 12) {
489ef36c 187 // Give up if we see too many zeros without
188 // a one, too.
36f84d47 189 LED_A_OFF();
190 Uart.state = STATE_UNSYNCD;
489ef36c 191 }
192 break;
193
194 case STATE_AWAITING_START_BIT:
195 Uart.posCnt++;
196 if(bit) {
abb21530 197 if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
489ef36c 198 // stayed high for too long between
199 // characters, error
36f84d47 200 Uart.state = STATE_UNSYNCD;
489ef36c 201 }
202 } else {
203 // falling edge, this starts the data byte
204 Uart.posCnt = 0;
205 Uart.bitCnt = 0;
206 Uart.shiftReg = 0;
207 Uart.state = STATE_RECEIVING_DATA;
489ef36c 208 }
209 break;
210
211 case STATE_RECEIVING_DATA:
212 Uart.posCnt++;
213 if(Uart.posCnt == 2) {
214 // time to sample a bit
215 Uart.shiftReg >>= 1;
216 if(bit) {
217 Uart.shiftReg |= 0x200;
218 }
219 Uart.bitCnt++;
220 }
221 if(Uart.posCnt >= 4) {
222 Uart.posCnt = 0;
223 }
224 if(Uart.bitCnt == 10) {
225 if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
226 {
227 // this is a data byte, with correct
228 // start and stop bits
229 Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff;
230 Uart.byteCnt++;
231
232 if(Uart.byteCnt >= Uart.byteCntMax) {
233 // Buffer overflowed, give up
36f84d47 234 LED_A_OFF();
235 Uart.state = STATE_UNSYNCD;
489ef36c 236 } else {
237 // so get the next byte now
238 Uart.posCnt = 0;
239 Uart.state = STATE_AWAITING_START_BIT;
240 }
46734099 241 } else if (Uart.shiftReg == 0x000) {
489ef36c 242 // this is an EOF byte
243 LED_A_OFF(); // Finished receiving
36f84d47 244 Uart.state = STATE_UNSYNCD;
22e24700 245 if (Uart.byteCnt != 0) {
489ef36c 246 return TRUE;
22e24700 247 }
489ef36c 248 } else {
249 // this is an error
36f84d47 250 LED_A_OFF();
46734099 251 Uart.state = STATE_UNSYNCD;
36f84d47 252 }
489ef36c 253 }
254 break;
255
256 default:
36f84d47 257 LED_A_OFF();
489ef36c 258 Uart.state = STATE_UNSYNCD;
259 break;
260 }
261
489ef36c 262 return FALSE;
263}
264
36f84d47 265
266static void UartReset()
267{
268 Uart.byteCntMax = MAX_FRAME_SIZE;
269 Uart.state = STATE_UNSYNCD;
270 Uart.byteCnt = 0;
271 Uart.bitCnt = 0;
db25599d 272 Uart.posCnt = 0;
b10a759f 273 memset(Uart.output, 0x00, MAX_FRAME_SIZE);
36f84d47 274}
275
276
277static void UartInit(uint8_t *data)
278{
279 Uart.output = data;
280 UartReset();
281}
282
283
489ef36c 284//-----------------------------------------------------------------------------
285// Receive a command (from the reader to us, where we are the simulated tag),
286// and store it in the given buffer, up to the given maximum length. Keeps
287// spinning, waiting for a well-framed command, until either we get one
288// (returns TRUE) or someone presses the pushbutton on the board (FALSE).
289//
290// Assume that we're called with the SSC (to the FPGA) and ADC path set
291// correctly.
292//-----------------------------------------------------------------------------
36f84d47 293static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len)
489ef36c 294{
abb21530 295 // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen
489ef36c 296 // only, since we are receiving, not transmitting).
297 // Signal field is off with the appropriate LED
298 LED_D_OFF();
299 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
300
489ef36c 301 // Now run a `software UART' on the stream of incoming samples.
36f84d47 302 UartInit(received);
489ef36c 303
304 for(;;) {
305 WDT_HIT();
306
307 if(BUTTON_PRESS()) return FALSE;
308
489ef36c 309 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
310 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
36f84d47 311 for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) {
312 if(Handle14443bUartBit(b & mask)) {
489ef36c 313 *len = Uart.byteCnt;
314 return TRUE;
315 }
316 }
317 }
318 }
36f84d47 319
320 return FALSE;
489ef36c 321}
322
323//-----------------------------------------------------------------------------
324// Main loop of simulated tag: receive commands from reader, decide what
325// response to send, and send it.
326//-----------------------------------------------------------------------------
abb21530 327void SimulateIso14443bTag(void)
489ef36c 328{
b10a759f 329 // the only commands we understand is WUPB, AFI=0, Select All, N=1:
330 static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB
331 // ... and REQB, AFI=0, Normal Request, N=1:
332 static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB
333 // ... and HLTB
334 static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB
335 // ... and ATTRIB
336 static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
36f84d47 337
338 // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
abb21530 339 // supports only 106kBit/s in both directions, max frame size = 32Bytes,
340 // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
489ef36c 341 static const uint8_t response1[] = {
342 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
343 0x00, 0x21, 0x85, 0x5e, 0xd7
344 };
b10a759f 345 // response to HLTB and ATTRIB
346 static const uint8_t response2[] = {0x00, 0x78, 0xF0};
489ef36c 347
810f5379 348 uint8_t parity[MAX_PARITY_SIZE] = {0x00};
99cf19d9 349
350 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
351
36f84d47 352 clear_trace();
353 set_tracing(TRUE);
354
355 const uint8_t *resp;
356 uint8_t *respCode;
357 uint16_t respLen, respCodeLen;
17ad0e09 358
359 // allocate command receive buffer
99cf19d9 360 BigBuf_free();
17ad0e09 361 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
489ef36c 362
99cf19d9 363 uint16_t len;
364 uint16_t cmdsRecvd = 0;
365
abb21530 366 // prepare the (only one) tag answer:
489ef36c 367 CodeIso14443bAsTag(response1, sizeof(response1));
36f84d47 368 uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
369 memcpy(resp1Code, ToSend, ToSendMax);
370 uint16_t resp1CodeLen = ToSendMax;
489ef36c 371
b10a759f 372 // prepare the (other) tag answer:
373 CodeIso14443bAsTag(response2, sizeof(response2));
374 uint8_t *resp2Code = BigBuf_malloc(ToSendMax);
375 memcpy(resp2Code, ToSend, ToSendMax);
376 uint16_t resp2CodeLen = ToSendMax;
377
489ef36c 378 // We need to listen to the high-frequency, peak-detected path.
379 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
380 FpgaSetupSsc();
381
382 cmdsRecvd = 0;
383
384 for(;;) {
489ef36c 385
810f5379 386 if (!GetIso14443bCommandFromReader(receivedCmd, &len)) {
387 Dbprintf("button pressed, received %d commands", cmdsRecvd);
388 break;
489ef36c 389 }
390
810f5379 391 LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
489ef36c 392
36f84d47 393 // Good, look at the command now.
394 if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0)
395 || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) {
396 resp = response1;
397 respLen = sizeof(response1);
398 respCode = resp1Code;
399 respCodeLen = resp1CodeLen;
b10a759f 400 } else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0])
401 || (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) {
402 resp = response2;
403 respLen = sizeof(response2);
404 respCode = resp2Code;
405 respCodeLen = resp2CodeLen;
489ef36c 406 } else {
407 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
408 // And print whether the CRC fails, just for good measure
36f84d47 409 uint8_t b1, b2;
b10a759f 410 if (len >= 3){ // if crc exists
810f5379 411 ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
412 if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
413 // Not so good, try again.
414 DbpString("+++CRC fail");
415
416 } else {
417 DbpString("CRC passes");
418 }
b10a759f 419 }
420 //get rid of compiler warning
421 respCodeLen = 0;
422 resp = response1;
423 respLen = 0;
424 respCode = resp1Code;
425 //don't crash at new command just wait and see if reader will send other new cmds.
426 //break;
489ef36c 427 }
428
489ef36c 429 cmdsRecvd++;
430
431 if(cmdsRecvd > 0x30) {
432 DbpString("many commands later...");
433 break;
434 }
435
36f84d47 436 if(respCodeLen <= 0) continue;
489ef36c 437
438 // Modulate BPSK
439 // Signal field is off with the appropriate LED
440 LED_D_OFF();
441 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
442 AT91C_BASE_SSC->SSC_THR = 0xff;
443 FpgaSetupSsc();
444
17ad0e09 445 uint8_t c;
446 // clear receiving shift register and holding register
447 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
448 c = AT91C_BASE_SSC->SSC_RHR; (void) c;
449 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
450 c = AT91C_BASE_SSC->SSC_RHR; (void) c;
451
452 // Clear TXRDY:
453 AT91C_BASE_SSC->SSC_THR = 0x00;
454
489ef36c 455 // Transmit the response.
17ad0e09 456 uint16_t FpgaSendQueueDelay = 0;
36f84d47 457 uint16_t i = 0;
17ad0e09 458 for(;i < respCodeLen; ) {
489ef36c 459 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
17ad0e09 460 AT91C_BASE_SSC->SSC_THR = respCode[i++];
461 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
489ef36c 462 }
810f5379 463 if(BUTTON_PRESS()) break;
17ad0e09 464 }
465
466 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
467 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3;
468 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
469 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
470 AT91C_BASE_SSC->SSC_THR = 0x00;
471 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
472 i++;
489ef36c 473 }
474 }
36f84d47 475
810f5379 476 LogTrace(resp, respLen, 0, 0, parity, FALSE);
489ef36c 477 }
b10a759f 478 FpgaDisableSscDma();
5ee53a0e 479 set_tracing(FALSE);
489ef36c 480}
481
482//=============================================================================
483// An ISO 14443 Type B reader. We take layer two commands, code them
484// appropriately, and then send them to the tag. We then listen for the
485// tag's response, which we leave in the buffer to be demodulated on the
486// PC side.
487//=============================================================================
488
489static struct {
490 enum {
491 DEMOD_UNSYNCD,
492 DEMOD_PHASE_REF_TRAINING,
493 DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
494 DEMOD_GOT_FALLING_EDGE_OF_SOF,
495 DEMOD_AWAITING_START_BIT,
36f84d47 496 DEMOD_RECEIVING_DATA
489ef36c 497 } state;
498 int bitCount;
499 int posCount;
500 int thisBit;
abb21530 501/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
489ef36c 502 int metric;
503 int metricN;
abb21530 504*/
489ef36c 505 uint16_t shiftReg;
506 uint8_t *output;
507 int len;
508 int sumI;
509 int sumQ;
510} Demod;
511
512/*
513 * Handles reception of a bit from the tag
514 *
abb21530 515 * This function is called 2 times per bit (every 4 subcarrier cycles).
516 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us
517 *
489ef36c 518 * LED handling:
519 * LED C -> ON once we have received the SOF and are expecting the rest.
520 * LED C -> OFF once we have received EOF or are unsynced
521 *
522 * Returns: true if we received a EOF
523 * false if we are still waiting for some more
524 *
525 */
7838f4be 526 #define abs(x) ( ((x)<0) ? -(x) : (x) )
abb21530 527static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
489ef36c 528{
5b59bf20 529 int v = 0;
530 int ai = abs(ci);
531 int aq = abs(cq);
532 int halfci = (ai >> 1);
533 int halfcq = (aq >> 1);
489ef36c 534
51d4f6f1 535// The soft decision on the bit uses an estimate of just the
536// quadrant of the reference angle, not the exact angle.
489ef36c 537#define MAKE_SOFT_DECISION() { \
5b59bf20 538 if(Demod.sumI > 0) { \
539 v = ci; \
540 } else { \
541 v = -ci; \
542 } \
489ef36c 543 if(Demod.sumQ > 0) { \
544 v += cq; \
545 } else { \
546 v -= cq; \
547 } \
548 }
549
abb21530 550#define SUBCARRIER_DETECT_THRESHOLD 8
551
abb21530 552// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
553#define CHECK_FOR_SUBCARRIER() { \
5b59bf20 554 v = MAX(ai, aq) + MIN(halfci, halfcq); \
db25599d 555}
556
557
489ef36c 558 switch(Demod.state) {
559 case DEMOD_UNSYNCD:
abb21530 560 CHECK_FOR_SUBCARRIER();
561 if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected
489ef36c 562 Demod.state = DEMOD_PHASE_REF_TRAINING;
abb21530 563 Demod.sumI = ci;
564 Demod.sumQ = cq;
565 Demod.posCount = 1;
489ef36c 566 }
567 break;
568
569 case DEMOD_PHASE_REF_TRAINING:
5b59bf20 570 if(Demod.posCount < 8) {
571 //if(Demod.posCount < 10*2) {
abb21530 572 CHECK_FOR_SUBCARRIER();
573 if (v > SUBCARRIER_DETECT_THRESHOLD) {
574 // set the reference phase (will code a logic '1') by averaging over 32 1/fs.
575 // note: synchronization time > 80 1/fs
b10a759f 576 Demod.sumI += ci;
577 Demod.sumQ += cq;
abb21530 578 Demod.posCount++;
579 } else { // subcarrier lost
b10a759f 580 Demod.state = DEMOD_UNSYNCD;
abb21530 581 }
489ef36c 582 } else {
b10a759f 583 Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
489ef36c 584 }
489ef36c 585 break;
586
587 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
588 MAKE_SOFT_DECISION();
db25599d 589 //Dbprintf("ICE: %d %d %d %d %d", v, Demod.sumI, Demod.sumQ, ci, cq );
5b59bf20 590 if(v <= 0) { // logic '0' detected
489ef36c 591 Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
abb21530 592 Demod.posCount = 0; // start of SOF sequence
489ef36c 593 } else {
b10a759f 594 if(Demod.posCount > 25*2) { // maximum length of TR1 = 200 1/fs
489ef36c 595 Demod.state = DEMOD_UNSYNCD;
596 }
597 }
598 Demod.posCount++;
599 break;
600
601 case DEMOD_GOT_FALLING_EDGE_OF_SOF:
abb21530 602 Demod.posCount++;
489ef36c 603 MAKE_SOFT_DECISION();
604 if(v > 0) {
b10a759f 605 if(Demod.posCount < 10*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
489ef36c 606 Demod.state = DEMOD_UNSYNCD;
607 } else {
a62bf3af 608 LED_C_ON(); // Got SOF
489ef36c 609 Demod.state = DEMOD_AWAITING_START_BIT;
610 Demod.posCount = 0;
611 Demod.len = 0;
abb21530 612/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
489ef36c 613 Demod.metricN = 0;
614 Demod.metric = 0;
abb21530 615*/
489ef36c 616 }
617 } else {
b10a759f 618 if(Demod.posCount > 13*2) { // low phase of SOF too long (> 12 etu)
489ef36c 619 Demod.state = DEMOD_UNSYNCD;
47286d89 620 LED_C_OFF();
489ef36c 621 }
622 }
489ef36c 623 break;
624
625 case DEMOD_AWAITING_START_BIT:
abb21530 626 Demod.posCount++;
489ef36c 627 MAKE_SOFT_DECISION();
628 if(v > 0) {
abb21530 629 if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
489ef36c 630 Demod.state = DEMOD_UNSYNCD;
47286d89 631 LED_C_OFF();
489ef36c 632 }
abb21530 633 } else { // start bit detected
489ef36c 634 Demod.bitCount = 0;
abb21530 635 Demod.posCount = 1; // this was the first half
489ef36c 636 Demod.thisBit = v;
637 Demod.shiftReg = 0;
638 Demod.state = DEMOD_RECEIVING_DATA;
639 }
640 break;
641
642 case DEMOD_RECEIVING_DATA:
643 MAKE_SOFT_DECISION();
abb21530 644 if(Demod.posCount == 0) { // first half of bit
489ef36c 645 Demod.thisBit = v;
646 Demod.posCount = 1;
abb21530 647 } else { // second half of bit
489ef36c 648 Demod.thisBit += v;
649
abb21530 650/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
489ef36c 651 if(Demod.thisBit > 0) {
652 Demod.metric += Demod.thisBit;
653 } else {
654 Demod.metric -= Demod.thisBit;
655 }
656 (Demod.metricN)++;
abb21530 657*/
489ef36c 658
659 Demod.shiftReg >>= 1;
abb21530 660 if(Demod.thisBit > 0) { // logic '1'
489ef36c 661 Demod.shiftReg |= 0x200;
662 }
663
664 Demod.bitCount++;
665 if(Demod.bitCount == 10) {
666 uint16_t s = Demod.shiftReg;
abb21530 667 if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0'
489ef36c 668 uint8_t b = (s >> 1);
669 Demod.output[Demod.len] = b;
670 Demod.len++;
671 Demod.state = DEMOD_AWAITING_START_BIT;
489ef36c 672 } else {
673 Demod.state = DEMOD_UNSYNCD;
47286d89 674 LED_C_OFF();
675 if(s == 0x000) {
abb21530 676 // This is EOF (start, stop and all data bits == '0'
b10a759f 677 return TRUE;
47286d89 678 }
489ef36c 679 }
680 }
681 Demod.posCount = 0;
682 }
683 break;
684
685 default:
686 Demod.state = DEMOD_UNSYNCD;
47286d89 687 LED_C_OFF();
489ef36c 688 break;
689 }
489ef36c 690 return FALSE;
691}
692
693
694static void DemodReset()
695{
696 // Clear out the state of the "UART" that receives from the tag.
697 Demod.len = 0;
698 Demod.state = DEMOD_UNSYNCD;
abb21530 699 Demod.posCount = 0;
db25599d 700 Demod.sumI = 0;
701 Demod.sumQ = 0;
702 Demod.bitCount = 0;
703 Demod.thisBit = 0;
704 Demod.shiftReg = 0;
489ef36c 705 memset(Demod.output, 0x00, MAX_FRAME_SIZE);
706}
707
708
709static void DemodInit(uint8_t *data)
710{
711 Demod.output = data;
712 DemodReset();
713}
714
715
489ef36c 716/*
717 * Demodulate the samples we received from the tag, also log to tracebuffer
489ef36c 718 * quiet: set to 'TRUE' to disable debug output
719 */
abb21530 720static void GetSamplesFor14443bDemod(int n, bool quiet)
489ef36c 721{
722 int max = 0;
abb21530 723 bool gotFrame = FALSE;
489ef36c 724 int lastRxCounter, ci, cq, samples = 0;
725
726 // Allocate memory from BigBuf for some buffers
727 // free all previous allocations first
728 BigBuf_free();
b10a759f 729
730 // And put the FPGA in the appropriate mode
731 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
732
489ef36c 733 // The response (tag -> reader) that we're receiving.
489ef36c 734 // Set up the demodulator for tag -> reader responses.
db25599d 735 DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
b10a759f 736
737 // The DMA buffer, used to stream samples from the FPGA
738 int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
489ef36c 739
db25599d 740 // Setup and start DMA.
741 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
742
489ef36c 743 int8_t *upTo = dmaBuf;
705bfa10 744 lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
489ef36c 745
746 // Signal field is ON with the appropriate LED:
abb21530 747 LED_D_ON();
489ef36c 748 for(;;) {
749 int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
750 if(behindBy > max) max = behindBy;
751
705bfa10 752 while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1)) > 2) {
489ef36c 753 ci = upTo[0];
754 cq = upTo[1];
755 upTo += 2;
705bfa10 756 if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) {
489ef36c 757 upTo = dmaBuf;
758 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
705bfa10 759 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE;
489ef36c 760 }
761 lastRxCounter -= 2;
762 if(lastRxCounter <= 0) {
5b59bf20 763 lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
489ef36c 764 }
765
766 samples += 2;
767
db25599d 768 //
769 gotFrame = Handle14443bSamplesDemod(ci , cq );
770 if ( gotFrame )
51d4f6f1 771 break;
489ef36c 772 }
773
abb21530 774 if(samples > n || gotFrame) {
489ef36c 775 break;
776 }
777 }
abb21530 778
489ef36c 779 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
abb21530 780
ff3e0744 781 if (!quiet) {
782 Dbprintf("max behindby = %d, samples = %d, gotFrame = %s, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d",
b10a759f 783 max,
784 samples,
ff3e0744 785 (gotFrame) ? "true" : "false",
b10a759f 786 Demod.len,
787 Demod.sumI,
788 Demod.sumQ
789 );
790 }
791
489ef36c 792 //Tracing
810f5379 793 if (Demod.len > 0) {
794 uint8_t parity[MAX_PARITY_SIZE] = {0x00};
489ef36c 795 LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE);
796 }
797}
798
799
489ef36c 800//-----------------------------------------------------------------------------
801// Transmit the command (to the tag) that was placed in ToSend[].
802//-----------------------------------------------------------------------------
abb21530 803static void TransmitFor14443b(void)
489ef36c 804{
805 int c;
806
807 FpgaSetupSsc();
a62bf3af 808
489ef36c 809 while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
810 AT91C_BASE_SSC->SSC_THR = 0xff;
811 }
812
813 // Signal field is ON with the appropriate Red LED
814 LED_D_ON();
815 // Signal we are transmitting with the Green LED
816 LED_B_ON();
abb21530 817 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
b10a759f 818
489ef36c 819 for(c = 0; c < 10;) {
820 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
821 AT91C_BASE_SSC->SSC_THR = 0xff;
822 c++;
823 }
824 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
825 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
826 (void)r;
827 }
828 WDT_HIT();
829 }
830
831 c = 0;
832 for(;;) {
833 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
834 AT91C_BASE_SSC->SSC_THR = ToSend[c];
835 c++;
836 if(c >= ToSendMax) {
837 break;
838 }
839 }
840 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
841 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
842 (void)r;
843 }
844 WDT_HIT();
845 }
846 LED_B_OFF(); // Finished sending
847}
848
849
850//-----------------------------------------------------------------------------
851// Code a layer 2 command (string of octets, including CRC) into ToSend[],
abb21530 852// so that it is ready to transmit to the tag using TransmitFor14443b().
489ef36c 853//-----------------------------------------------------------------------------
854static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
855{
856 int i, j;
857 uint8_t b;
858
859 ToSendReset();
860
861 // Establish initial reference level
db25599d 862 for(i = 0; i < 40; i++) {
489ef36c 863 ToSendStuffBit(1);
864 }
865 // Send SOF
b10a759f 866 for(i = 0; i < 11; i++) {
489ef36c 867 ToSendStuffBit(0);
868 }
869
870 for(i = 0; i < len; i++) {
871 // Stop bits/EGT
872 ToSendStuffBit(1);
873 ToSendStuffBit(1);
874 // Start bit
875 ToSendStuffBit(0);
876 // Data bits
877 b = cmd[i];
878 for(j = 0; j < 8; j++) {
879 if(b & 1) {
880 ToSendStuffBit(1);
881 } else {
882 ToSendStuffBit(0);
883 }
884 b >>= 1;
885 }
886 }
887 // Send EOF
888 ToSendStuffBit(1);
b10a759f 889 for(i = 0; i < 11; i++) {
489ef36c 890 ToSendStuffBit(0);
891 }
892 for(i = 0; i < 8; i++) {
893 ToSendStuffBit(1);
894 }
895
896 // And then a little more, to make sure that the last character makes
897 // it out before we switch to rx mode.
b10a759f 898 for(i = 0; i < 10; i++) {
489ef36c 899 ToSendStuffBit(1);
900 }
901
902 // Convert from last character reference to length
903 ToSendMax++;
904}
905
906
489ef36c 907/**
908 Convenience function to encode, transmit and trace iso 14443b comms
909 **/
910static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
911{
912 CodeIso14443bAsReader(cmd, len);
abb21530 913 TransmitFor14443b();
489ef36c 914 if (tracing) {
915 uint8_t parity[MAX_PARITY_SIZE];
489ef36c 916 LogTrace(cmd,len, 0, 0, parity, TRUE);
917 }
918}
919
a62bf3af 920/* Sends an APDU to the tag
921 * TODO: check CRC and preamble
922 */
923int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response)
924{
925 uint8_t message_frame[message_length + 4];
926 // PCB
927 message_frame[0] = 0x0A | pcb_blocknum;
928 pcb_blocknum ^= 1;
929 // CID
930 message_frame[1] = 0;
931 // INF
932 memcpy(message_frame + 2, message, message_length);
933 // EDC (CRC)
934 ComputeCrc14443(CRC_14443_B, message_frame, message_length + 2, &message_frame[message_length + 2], &message_frame[message_length + 3]);
935 // send
936 CodeAndTransmit14443bAsReader(message_frame, message_length + 4);
937 // get response
938 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT*100, TRUE);
939 if(Demod.len < 3)
940 {
941 return 0;
942 }
943 // TODO: Check CRC
944 // copy response contents
945 if(response != NULL)
946 {
947 memcpy(response, Demod.output, Demod.len);
948 }
949 return Demod.len;
950}
951
952/* Perform the ISO 14443 B Card Selection procedure
953 * Currently does NOT do any collision handling.
954 * It expects 0-1 cards in the device's range.
955 * TODO: Support multiple cards (perform anticollision)
956 * TODO: Verify CRC checksums
957 */
958int iso14443b_select_card()
959{
960 // WUPB command (including CRC)
961 // Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state
962 static const uint8_t wupb[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
963 // ATTRIB command (with space for CRC)
964 uint8_t attrib[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00};
965
966 // first, wake up the tag
967 CodeAndTransmit14443bAsReader(wupb, sizeof(wupb));
968 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
969 // ATQB too short?
970 if (Demod.len < 14)
971 {
972 return 2;
973 }
974
975 // select the tag
976 // copy the PUPI to ATTRIB
977 memcpy(attrib + 1, Demod.output + 1, 4);
978 /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into
979 ATTRIB (Param 3) */
980 attrib[7] = Demod.output[10] & 0x0F;
981 ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10);
982 CodeAndTransmit14443bAsReader(attrib, sizeof(attrib));
983 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
984 // Answer to ATTRIB too short?
985 if(Demod.len < 3)
986 {
987 return 2;
988 }
989 // reset PCB block number
990 pcb_blocknum = 0;
991 return 1;
992}
993
994// Set up ISO 14443 Type B communication (similar to iso14443a_setup)
995void iso14443b_setup() {
db25599d 996
a62bf3af 997 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
ff3e0744 998
a62bf3af 999 BigBuf_free();
1000 // Set up the synchronous serial port
1001 FpgaSetupSsc();
1002 // connect Demodulated Signal to ADC:
1003 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1004
1005 // Signal field is on with the appropriate LED
1006 LED_D_ON();
1007 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
5b59bf20 1008
f445df40 1009 //SpinDelay(100);
a62bf3af 1010
1011 // Start the timer
ff3e0744 1012 StartCountSspClk();
a62bf3af 1013
1014 DemodReset();
1015 UartReset();
1016}
489ef36c 1017
1018//-----------------------------------------------------------------------------
abb21530 1019// Read a SRI512 ISO 14443B tag.
489ef36c 1020//
1021// SRI512 tags are just simple memory tags, here we're looking at making a dump
1022// of the contents of the memory. No anticollision algorithm is done, we assume
1023// we have a single tag in the field.
1024//
1025// I tried to be systematic and check every answer of the tag, every CRC, etc...
1026//-----------------------------------------------------------------------------
abb21530 1027void ReadSTMemoryIso14443b(uint32_t dwLast)
489ef36c 1028{
17ad0e09 1029 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
99cf19d9 1030 BigBuf_free();
1031
489ef36c 1032 clear_trace();
1033 set_tracing(TRUE);
1034
1035 uint8_t i = 0x00;
1036
489ef36c 1037 // Make sure that we start from off, since the tags are stateful;
1038 // confusing things will happen if we don't reset them between reads.
1039 LED_D_OFF();
1040 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
99cf19d9 1041 SpinDelay(200);
1042
489ef36c 1043 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1044 FpgaSetupSsc();
1045
1046 // Now give it time to spin up.
1047 // Signal field is on with the appropriate LED
1048 LED_D_ON();
22e24700 1049 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
489ef36c 1050 SpinDelay(200);
1051
1052 // First command: wake up the tag using the INITIATE command
51d4f6f1 1053 uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b};
489ef36c 1054 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
abb21530 1055 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 1056
1057 if (Demod.len == 0) {
22e24700 1058 DbpString("No response from tag");
5ee53a0e 1059 set_tracing(FALSE);
22e24700 1060 return;
489ef36c 1061 } else {
705bfa10 1062 Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x",
1063 Demod.output[0], Demod.output[1], Demod.output[2]);
489ef36c 1064 }
705bfa10 1065
489ef36c 1066 // There is a response, SELECT the uid
1067 DbpString("Now SELECT tag:");
1068 cmd1[0] = 0x0E; // 0x0E is SELECT
1069 cmd1[1] = Demod.output[0];
1070 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
1071 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
abb21530 1072 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 1073 if (Demod.len != 3) {
22e24700 1074 Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
5ee53a0e 1075 set_tracing(FALSE);
22e24700 1076 return;
489ef36c 1077 }
1078 // Check the CRC of the answer:
1079 ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
1080 if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
22e24700 1081 DbpString("CRC Error reading select response.");
5ee53a0e 1082 set_tracing(FALSE);
22e24700 1083 return;
489ef36c 1084 }
1085 // Check response from the tag: should be the same UID as the command we just sent:
1086 if (cmd1[1] != Demod.output[0]) {
22e24700 1087 Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]);
5ee53a0e 1088 set_tracing(FALSE);
22e24700 1089 return;
489ef36c 1090 }
705bfa10 1091
489ef36c 1092 // Tag is now selected,
1093 // First get the tag's UID:
1094 cmd1[0] = 0x0B;
1095 ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]);
1096 CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one
abb21530 1097 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 1098 if (Demod.len != 10) {
22e24700 1099 Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
5ee53a0e 1100 set_tracing(FALSE);
22e24700 1101 return;
489ef36c 1102 }
1103 // The check the CRC of the answer (use cmd1 as temporary variable):
1104 ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]);
51d4f6f1 1105 if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) {
22e24700 1106 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
705bfa10 1107 (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
489ef36c 1108 // Do not return;, let's go on... (we should retry, maybe ?)
1109 }
1110 Dbprintf("Tag UID (64 bits): %08x %08x",
705bfa10 1111 (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
1112 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
489ef36c 1113
1114 // Now loop to read all 16 blocks, address from 0 to last block
132a0217 1115 Dbprintf("Tag memory dump, block 0 to %d", dwLast);
489ef36c 1116 cmd1[0] = 0x08;
1117 i = 0x00;
1118 dwLast++;
1119 for (;;) {
1120 if (i == dwLast) {
1121 DbpString("System area block (0xff):");
1122 i = 0xff;
1123 }
1124 cmd1[1] = i;
1125 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
1126 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
abb21530 1127 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 1128 if (Demod.len != 6) { // Check if we got an answer from the tag
1129 DbpString("Expected 6 bytes from tag, got less...");
1130 return;
1131 }
1132 // The check the CRC of the answer (use cmd1 as temporary variable):
1133 ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]);
1134 if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
132a0217 1135 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
705bfa10 1136 (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
489ef36c 1137 // Do not return;, let's go on... (we should retry, maybe ?)
1138 }
1139 // Now print out the memory location:
22e24700 1140 Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i,
705bfa10 1141 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
17ad0e09 1142 (Demod.output[4]<<8)+Demod.output[5]);
1143 if (i == 0xff) {
1144 break;
1145 }
489ef36c 1146 i++;
1147 }
5ee53a0e 1148
1149 set_tracing(FALSE);
489ef36c 1150}
1151
1152
1153//=============================================================================
1154// Finally, the `sniffer' combines elements from both the reader and
1155// simulated tag, to show both sides of the conversation.
1156//=============================================================================
1157
1158//-----------------------------------------------------------------------------
1159// Record the sequence of commands sent by the reader to the tag, with
1160// triggering so that we start recording at the point that the tag is moved
1161// near the reader.
1162//-----------------------------------------------------------------------------
1163/*
1164 * Memory usage for this function, (within BigBuf)
47286d89 1165 * Last Received command (reader->tag) - MAX_FRAME_SIZE
1166 * Last Received command (tag->reader) - MAX_FRAME_SIZE
705bfa10 1167 * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE
47286d89 1168 * Demodulated samples received - all the rest
489ef36c 1169 */
abb21530 1170void RAMFUNC SnoopIso14443b(void)
489ef36c 1171{
1172 // We won't start recording the frames that we acquire until we trigger;
1173 // a good trigger condition to get started is probably when we see a
1174 // response from the tag.
47286d89 1175 int triggered = TRUE; // TODO: set and evaluate trigger condition
489ef36c 1176
1177 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1178 BigBuf_free();
1179
1180 clear_trace();
1181 set_tracing(TRUE);
1182
1183 // The DMA buffer, used to stream samples from the FPGA
705bfa10 1184 int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
489ef36c 1185 int lastRxCounter;
1186 int8_t *upTo;
1187 int ci, cq;
1188 int maxBehindBy = 0;
1189
1190 // Count of samples received so far, so that we can include timing
1191 // information in the trace buffer.
1192 int samples = 0;
1193
1194 DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
1195 UartInit(BigBuf_malloc(MAX_FRAME_SIZE));
1196
1197 // Print some debug information about the buffer sizes
1198 Dbprintf("Snooping buffers initialized:");
1199 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1200 Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE);
1201 Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE);
705bfa10 1202 Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE);
489ef36c 1203
abb21530 1204 // Signal field is off, no reader signal, no tag signal
1205 LEDsoff();
489ef36c 1206
1207 // And put the FPGA in the appropriate mode
22e24700 1208 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP);
489ef36c 1209 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1210
1211 // Setup for the DMA.
1212 FpgaSetupSsc();
1213 upTo = dmaBuf;
705bfa10 1214 lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
1215 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
810f5379 1216 uint8_t parity[MAX_PARITY_SIZE] = {0x00};
5b95953d 1217
f53020e7 1218 bool TagIsActive = FALSE;
1219 bool ReaderIsActive = FALSE;
489ef36c 1220
1221 // And now we loop, receiving samples.
1222 for(;;) {
1223 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
705bfa10 1224 (ISO14443B_DMA_BUFFER_SIZE-1);
489ef36c 1225 if(behindBy > maxBehindBy) {
1226 maxBehindBy = behindBy;
489ef36c 1227 }
abb21530 1228
489ef36c 1229 if(behindBy < 2) continue;
1230
1231 ci = upTo[0];
1232 cq = upTo[1];
1233 upTo += 2;
1234 lastRxCounter -= 2;
705bfa10 1235 if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) {
489ef36c 1236 upTo = dmaBuf;
705bfa10 1237 lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
489ef36c 1238 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
705bfa10 1239 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE;
51d4f6f1 1240 WDT_HIT();
705bfa10 1241 if(behindBy > (9*ISO14443B_DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not?
132a0217 1242 Dbprintf("blew circular buffer! behindBy=%d", behindBy);
51d4f6f1 1243 break;
abb21530 1244 }
810f5379 1245
abb21530 1246 if(!tracing) {
810f5379 1247 DbpString("Trace full");
abb21530 1248 break;
1249 }
810f5379 1250
abb21530 1251 if(BUTTON_PRESS()) {
1252 DbpString("cancelled");
1253 break;
1254 }
489ef36c 1255 }
1256
1257 samples += 2;
1258
47286d89 1259 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
810f5379 1260 if (Handle14443bUartBit(ci & 0x01)) {
1261 if ( triggered)
51d4f6f1 1262 LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
810f5379 1263
1264 /* And ready to receive another command. */
1265 UartReset();
1266 /* And also reset the demod code, which might have been */
1267 /* false-triggered by the commands from the reader. */
1268 DemodReset();
489ef36c 1269 }
810f5379 1270 if (Handle14443bUartBit(cq & 0x01)) {
1271 if (triggered)
51d4f6f1 1272 LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
810f5379 1273
1274 /* And ready to receive another command. */
1275 UartReset();
1276 /* And also reset the demod code, which might have been */
1277 /* false-triggered by the commands from the reader. */
1278 DemodReset();
1279 }
36f84d47 1280 ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF);
47286d89 1281 }
489ef36c 1282
47286d89 1283 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
d8af608f 1284 // is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103
5de79e20 1285 if(Handle14443bSamplesDemod(ci & 0xfe, cq & 0xfe)) {
489ef36c 1286
810f5379 1287 //Use samples as a time measurement
99cf19d9 1288 LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
489ef36c 1289
810f5379 1290 triggered = TRUE;
1291
1292 // And ready to receive another response.
1293 DemodReset();
1294 }
22e24700 1295 TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF);
47286d89 1296 }
489ef36c 1297 }
abb21530 1298
489ef36c 1299 FpgaDisableSscDma();
abb21530 1300 LEDsoff();
810f5379 1301
489ef36c 1302 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
1303 DbpString("Snoop statistics:");
1304 Dbprintf(" Max behind by: %i", maxBehindBy);
1305 Dbprintf(" Uart State: %x", Uart.state);
1306 Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt);
1307 Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax);
1308 Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
810f5379 1309 set_tracing(FALSE);
489ef36c 1310}
1311
1312
1313/*
1314 * Send raw command to tag ISO14443B
1315 * @Input
1316 * datalen len of buffer data
1317 * recv bool when true wait for data from tag and send to client
1318 * powerfield bool leave the field on when true
1319 * data buffer with byte to send
1320 *
1321 * @Output
1322 * none
1323 *
1324 */
abb21530 1325void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[])
489ef36c 1326{
ff3e0744 1327 // param ISO_
1328 // param ISO_CONNECT
1329 // param ISO14A_NO_DISCONNECT
1330 //if (param & ISO14A_NO_DISCONNECT)
1331 // return;
a62bf3af 1332 iso14443b_setup();
b10a759f 1333
99cf19d9 1334 if ( datalen == 0 && recv == 0 && powerfield == 0){
db25599d 1335
1336 } else {
99cf19d9 1337 set_tracing(TRUE);
1338 CodeAndTransmit14443bAsReader(data, datalen);
1339 }
489ef36c 1340
810f5379 1341 if (recv) {
b10a759f 1342 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, FALSE);
51d4f6f1 1343 uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE);
1344 cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen);
489ef36c 1345 }
abb21530 1346
810f5379 1347 if (!powerfield) {
489ef36c 1348 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
b10a759f 1349 FpgaDisableSscDma();
5ee53a0e 1350 set_tracing(FALSE);
489ef36c 1351 LED_D_OFF();
1352 }
1353}
1354
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