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[proxmark3-svn] / armsrc / iso14443a.c
1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18
19 #include "iso14443crc.h"
20 #include "iso14443a.h"
21 #include "crapto1.h"
22 #include "mifareutil.h"
23
24 static uint32_t iso14a_timeout;
25 uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
26 int rsamples = 0;
27 int traceLen = 0;
28 int tracing = TRUE;
29 uint8_t trigger = 0;
30 // the block number for the ISO14443-4 PCB
31 static uint8_t iso14_pcb_blocknum = 0;
32
33 //
34 // ISO14443 timing:
35 //
36 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
37 #define REQUEST_GUARD_TIME (7000/16 + 1)
38 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
39 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
40 // bool LastCommandWasRequest = FALSE;
41
42 //
43 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
44 //
45 // When the PM acts as reader and is receiving tag data, it takes
46 // 3 ticks delay in the AD converter
47 // 16 ticks until the modulation detector completes and sets curbit
48 // 8 ticks until bit_to_arm is assigned from curbit
49 // 8*16 ticks for the transfer from FPGA to ARM
50 // 4*16 ticks until we measure the time
51 // - 8*16 ticks because we measure the time of the previous transfer
52 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
53
54 // When the PM acts as a reader and is sending, it takes
55 // 4*16 ticks until we can write data to the sending hold register
56 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
57 // 8 ticks until the first transfer starts
58 // 8 ticks later the FPGA samples the data
59 // 1 tick to assign mod_sig_coil
60 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
61
62 // When the PM acts as tag and is receiving it takes
63 // 2 ticks delay in the RF part (for the first falling edge),
64 // 3 ticks for the A/D conversion,
65 // 8 ticks on average until the start of the SSC transfer,
66 // 8 ticks until the SSC samples the first data
67 // 7*16 ticks to complete the transfer from FPGA to ARM
68 // 8 ticks until the next ssp_clk rising edge
69 // 4*16 ticks until we measure the time
70 // - 8*16 ticks because we measure the time of the previous transfer
71 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
72
73 // The FPGA will report its internal sending delay in
74 uint16_t FpgaSendQueueDelay;
75 // the 5 first bits are the number of bits buffered in mod_sig_buf
76 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
77 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
78
79 // When the PM acts as tag and is sending, it takes
80 // 4*16 ticks until we can write data to the sending hold register
81 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
82 // 8 ticks until the first transfer starts
83 // 8 ticks later the FPGA samples the data
84 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
85 // + 1 tick to assign mod_sig_coil
86 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
87
88 // When the PM acts as sniffer and is receiving tag data, it takes
89 // 3 ticks A/D conversion
90 // 14 ticks to complete the modulation detection
91 // 8 ticks (on average) until the result is stored in to_arm
92 // + the delays in transferring data - which is the same for
93 // sniffing reader and tag data and therefore not relevant
94 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
95
96 // When the PM acts as sniffer and is receiving reader data, it takes
97 // 2 ticks delay in analogue RF receiver (for the falling edge of the
98 // start bit, which marks the start of the communication)
99 // 3 ticks A/D conversion
100 // 8 ticks on average until the data is stored in to_arm.
101 // + the delays in transferring data - which is the same for
102 // sniffing reader and tag data and therefore not relevant
103 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
104
105 //variables used for timing purposes:
106 //these are in ssp_clk cycles:
107 static uint32_t NextTransferTime;
108 static uint32_t LastTimeProxToAirStart;
109 static uint32_t LastProxToAirDuration;
110
111
112
113 // CARD TO READER - manchester
114 // Sequence D: 11110000 modulation with subcarrier during first half
115 // Sequence E: 00001111 modulation with subcarrier during second half
116 // Sequence F: 00000000 no modulation with subcarrier
117 // READER TO CARD - miller
118 // Sequence X: 00001100 drop after half a period
119 // Sequence Y: 00000000 no drop
120 // Sequence Z: 11000000 drop at start
121 #define SEC_D 0xf0
122 #define SEC_E 0x0f
123 #define SEC_F 0x00
124 #define SEC_X 0x0c
125 #define SEC_Y 0x00
126 #define SEC_Z 0xc0
127
128 const uint8_t OddByteParity[256] = {
129 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
132 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
140 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
141 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
144 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
145 };
146
147 void iso14a_set_trigger(bool enable) {
148 trigger = enable;
149 }
150
151 void iso14a_clear_trace() {
152 memset(trace, 0x44, TRACE_SIZE);
153 traceLen = 0;
154 }
155
156 void iso14a_set_tracing(bool enable) {
157 tracing = enable;
158 }
159
160 void iso14a_set_timeout(uint32_t timeout) {
161 iso14a_timeout = timeout;
162 }
163
164 //-----------------------------------------------------------------------------
165 // Generate the parity value for a byte sequence
166 //
167 //-----------------------------------------------------------------------------
168 byte_t oddparity (const byte_t bt)
169 {
170 return OddByteParity[bt];
171 }
172
173 void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par)
174 {
175 uint16_t paritybit_cnt = 0;
176 uint16_t paritybyte_cnt = 0;
177 uint8_t parityBits = 0;
178
179 for (uint16_t i = 0; i < iLen; i++) {
180 // Generate the parity bits
181 parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt));
182 if (paritybit_cnt == 7) {
183 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
184 parityBits = 0; // and advance to next Parity Byte
185 paritybyte_cnt++;
186 paritybit_cnt = 0;
187 } else {
188 paritybit_cnt++;
189 }
190 }
191
192 // save remaining parity bits
193 par[paritybyte_cnt] = parityBits;
194
195 }
196
197 void AppendCrc14443a(uint8_t* data, int len)
198 {
199 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
200 }
201
202 // The function LogTrace() is also used by the iClass implementation in iClass.c
203 bool RAMFUNC LogTrace(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag)
204 {
205 if (!tracing) return FALSE;
206
207 uint16_t num_paritybytes = (iLen-1)/8 + 1; // number of valid paritybytes in *parity
208 uint16_t duration = timestamp_end - timestamp_start;
209
210 // Return when trace is full
211 if (traceLen + sizeof(iLen) + sizeof(timestamp_start) + sizeof(duration) + num_paritybytes + iLen >= TRACE_SIZE) {
212 tracing = FALSE; // don't trace any more
213 return FALSE;
214 }
215
216 // Traceformat:
217 // 32 bits timestamp (little endian)
218 // 16 bits duration (little endian)
219 // 16 bits data length (little endian, Highest Bit used as readerToTag flag)
220 // y Bytes data
221 // x Bytes parity (one byte per 8 bytes data)
222
223 // timestamp (start)
224 trace[traceLen++] = ((timestamp_start >> 0) & 0xff);
225 trace[traceLen++] = ((timestamp_start >> 8) & 0xff);
226 trace[traceLen++] = ((timestamp_start >> 16) & 0xff);
227 trace[traceLen++] = ((timestamp_start >> 24) & 0xff);
228
229 // duration
230 trace[traceLen++] = ((duration >> 0) & 0xff);
231 trace[traceLen++] = ((duration >> 8) & 0xff);
232
233 // data length
234 trace[traceLen++] = ((iLen >> 0) & 0xff);
235 trace[traceLen++] = ((iLen >> 8) & 0xff);
236
237 // readerToTag flag
238 if (!readerToTag) {
239 trace[traceLen - 1] |= 0x80;
240 }
241
242 // data bytes
243 if (btBytes != NULL && iLen != 0) {
244 memcpy(trace + traceLen, btBytes, iLen);
245 }
246 traceLen += iLen;
247
248 // parity bytes
249 if (parity != NULL && iLen != 0) {
250 memcpy(trace + traceLen, parity, num_paritybytes);
251 }
252 traceLen += num_paritybytes;
253
254 return TRUE;
255 }
256
257 //=============================================================================
258 // ISO 14443 Type A - Miller decoder
259 //=============================================================================
260 // Basics:
261 // This decoder is used when the PM3 acts as a tag.
262 // The reader will generate "pauses" by temporarily switching of the field.
263 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
264 // The FPGA does a comparison with a threshold and would deliver e.g.:
265 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
266 // The Miller decoder needs to identify the following sequences:
267 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
268 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
269 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
270 // Note 1: the bitstream may start at any time. We therefore need to sync.
271 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
272 //-----------------------------------------------------------------------------
273 static tUart Uart;
274
275 // Lookup-Table to decide if 4 raw bits are a modulation.
276 // We accept two or three consecutive "0" in any position with the rest "1"
277 const bool Mod_Miller_LUT[] = {
278 TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE,
279 TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE
280 };
281 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
282 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
283
284 void UartReset()
285 {
286 Uart.state = STATE_UNSYNCD;
287 Uart.bitCount = 0;
288 Uart.len = 0; // number of decoded data bytes
289 Uart.parityLen = 0; // number of decoded parity bytes
290 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
291 Uart.parityBits = 0; // holds 8 parity bits
292 Uart.twoBits = 0x0000; // buffer for 2 Bits
293 Uart.highCnt = 0;
294 Uart.startTime = 0;
295 Uart.endTime = 0;
296 }
297
298 void UartInit(uint8_t *data, uint8_t *parity)
299 {
300 Uart.output = data;
301 Uart.parity = parity;
302 UartReset();
303 }
304
305 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
306 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
307 {
308
309 Uart.twoBits = (Uart.twoBits << 8) | bit;
310
311 if (Uart.state == STATE_UNSYNCD) { // not yet synced
312
313 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
314 if (Uart.twoBits == 0xffff) {
315 Uart.highCnt++;
316 } else {
317 Uart.highCnt = 0;
318 }
319 } else {
320 Uart.syncBit = 0xFFFF; // not set
321 // look for 00xx1111 (the start bit)
322 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
323 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
324 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
325 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
326 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
327 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
328 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
329 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
330 if (Uart.syncBit != 0xFFFF) {
331 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
332 Uart.startTime -= Uart.syncBit;
333 Uart.endTime = Uart.startTime;
334 Uart.state = STATE_START_OF_COMMUNICATION;
335 }
336 }
337
338 } else {
339
340 if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
341 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
342 UartReset();
343 Uart.highCnt = 6;
344 } else { // Modulation in first half = Sequence Z = logic "0"
345 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
346 UartReset();
347 Uart.highCnt = 6;
348 } else {
349 Uart.bitCount++;
350 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
351 Uart.state = STATE_MILLER_Z;
352 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
353 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
354 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
355 Uart.parityBits <<= 1; // make room for the parity bit
356 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
357 Uart.bitCount = 0;
358 Uart.shiftReg = 0;
359 if((Uart.len&0x0007) == 0) { // every 8 data bytes
360 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
361 Uart.parityBits = 0;
362 }
363 }
364 }
365 }
366 } else {
367 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
368 Uart.bitCount++;
369 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
370 Uart.state = STATE_MILLER_X;
371 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
372 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
373 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
374 Uart.parityBits <<= 1; // make room for the new parity bit
375 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
376 Uart.bitCount = 0;
377 Uart.shiftReg = 0;
378 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
379 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
380 Uart.parityBits = 0;
381 }
382 }
383 } else { // no modulation in both halves - Sequence Y
384 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
385 Uart.state = STATE_UNSYNCD;
386 Uart.bitCount--; // last "0" was part of EOC sequence
387 Uart.shiftReg <<= 1; // drop it
388 if(Uart.bitCount > 0) { // if we decoded some bits
389 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
390 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
391 Uart.parityBits <<= 1; // add a (void) parity bit
392 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
393 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
394 return TRUE;
395 } else if (Uart.len & 0x0007) { // there are some parity bits to store
396 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
397 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
398 }
399 if (Uart.len) {
400 return TRUE; // we are finished with decoding the raw data sequence
401 } else {
402 UartReset(); // Nothing receiver - start over
403 }
404 }
405 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
406 UartReset();
407 Uart.highCnt = 6;
408 } else { // a logic "0"
409 Uart.bitCount++;
410 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
411 Uart.state = STATE_MILLER_Y;
412 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
413 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
414 Uart.parityBits <<= 1; // make room for the parity bit
415 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
416 Uart.bitCount = 0;
417 Uart.shiftReg = 0;
418 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
419 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
420 Uart.parityBits = 0;
421 }
422 }
423 }
424 }
425 }
426
427 }
428
429 return FALSE; // not finished yet, need more data
430 }
431
432
433
434 //=============================================================================
435 // ISO 14443 Type A - Manchester decoder
436 //=============================================================================
437 // Basics:
438 // This decoder is used when the PM3 acts as a reader.
439 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
440 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
441 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
442 // The Manchester decoder needs to identify the following sequences:
443 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
444 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
445 // 8 ticks unmodulated: Sequence F = end of communication
446 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
447 // Note 1: the bitstream may start at any time. We therefore need to sync.
448 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
449 static tDemod Demod;
450
451 // Lookup-Table to decide if 4 raw bits are a modulation.
452 // We accept three or four "1" in any position
453 const bool Mod_Manchester_LUT[] = {
454 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
455 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
456 };
457
458 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
459 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
460
461
462 void DemodReset()
463 {
464 Demod.state = DEMOD_UNSYNCD;
465 Demod.len = 0; // number of decoded data bytes
466 Demod.parityLen = 0;
467 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
468 Demod.parityBits = 0; //
469 Demod.collisionPos = 0; // Position of collision bit
470 Demod.twoBits = 0xffff; // buffer for 2 Bits
471 Demod.highCnt = 0;
472 Demod.startTime = 0;
473 Demod.endTime = 0;
474 }
475
476 void DemodInit(uint8_t *data, uint8_t *parity)
477 {
478 Demod.output = data;
479 Demod.parity = parity;
480 DemodReset();
481 }
482
483 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
484 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
485 {
486
487 Demod.twoBits = (Demod.twoBits << 8) | bit;
488
489 if (Demod.state == DEMOD_UNSYNCD) {
490
491 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
492 if (Demod.twoBits == 0x0000) {
493 Demod.highCnt++;
494 } else {
495 Demod.highCnt = 0;
496 }
497 } else {
498 Demod.syncBit = 0xFFFF; // not set
499 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
500 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
501 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
502 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
503 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
504 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
505 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
506 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
507 if (Demod.syncBit != 0xFFFF) {
508 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
509 Demod.startTime -= Demod.syncBit;
510 Demod.bitCount = offset; // number of decoded data bits
511 Demod.state = DEMOD_MANCHESTER_DATA;
512 }
513 }
514
515 } else {
516
517 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
518 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
519 if (!Demod.collisionPos) {
520 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
521 }
522 } // modulation in first half only - Sequence D = 1
523 Demod.bitCount++;
524 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
525 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
526 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
527 Demod.parityBits <<= 1; // make room for the parity bit
528 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
529 Demod.bitCount = 0;
530 Demod.shiftReg = 0;
531 if((Demod.len&0x0007) == 0) { // every 8 data bytes
532 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
533 Demod.parityBits = 0;
534 }
535 }
536 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
537 } else { // no modulation in first half
538 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
539 Demod.bitCount++;
540 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
541 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
542 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
543 Demod.parityBits <<= 1; // make room for the new parity bit
544 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
545 Demod.bitCount = 0;
546 Demod.shiftReg = 0;
547 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
548 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
549 Demod.parityBits = 0;
550 }
551 }
552 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
553 } else { // no modulation in both halves - End of communication
554 if(Demod.bitCount > 0) { // there are some remaining data bits
555 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
556 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
557 Demod.parityBits <<= 1; // add a (void) parity bit
558 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
559 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
560 return TRUE;
561 } else if (Demod.len & 0x0007) { // there are some parity bits to store
562 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
563 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
564 }
565 if (Demod.len) {
566 return TRUE; // we are finished with decoding the raw data sequence
567 } else { // nothing received. Start over
568 DemodReset();
569 }
570 }
571 }
572
573 }
574
575 return FALSE; // not finished yet, need more data
576 }
577
578 //=============================================================================
579 // Finally, a `sniffer' for ISO 14443 Type A
580 // Both sides of communication!
581 //=============================================================================
582
583 //-----------------------------------------------------------------------------
584 // Record the sequence of commands sent by the reader to the tag, with
585 // triggering so that we start recording at the point that the tag is moved
586 // near the reader.
587 //-----------------------------------------------------------------------------
588 void RAMFUNC SnoopIso14443a(uint8_t param) {
589 // param:
590 // bit 0 - trigger from first card answer
591 // bit 1 - trigger from first reader 7-bit request
592
593 LEDsoff();
594 // init trace buffer
595 iso14a_clear_trace();
596 iso14a_set_tracing(TRUE);
597
598 // We won't start recording the frames that we acquire until we trigger;
599 // a good trigger condition to get started is probably when we see a
600 // response from the tag.
601 // triggered == FALSE -- to wait first for card
602 bool triggered = !(param & 0x03);
603
604 // The command (reader -> tag) that we're receiving.
605 // The length of a received command will in most cases be no more than 18 bytes.
606 // So 32 should be enough!
607 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
608 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
609
610 // The response (tag -> reader) that we're receiving.
611 uint8_t *receivedResponse = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
612 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
613
614 // As we receive stuff, we copy it from receivedCmd or receivedResponse
615 // into trace, along with its length and other annotations.
616 //uint8_t *trace = (uint8_t *)BigBuf;
617
618 // The DMA buffer, used to stream samples from the FPGA
619 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
620 uint8_t *data = dmaBuf;
621 uint8_t previous_data = 0;
622 int maxDataLen = 0;
623 int dataLen = 0;
624 bool TagIsActive = FALSE;
625 bool ReaderIsActive = FALSE;
626
627 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
628
629 // Set up the demodulator for tag -> reader responses.
630 DemodInit(receivedResponse, receivedResponsePar);
631
632 // Set up the demodulator for the reader -> tag commands
633 UartInit(receivedCmd, receivedCmdPar);
634
635 // Setup and start DMA.
636 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
637
638 // And now we loop, receiving samples.
639 for(uint32_t rsamples = 0; TRUE; ) {
640
641 if(BUTTON_PRESS()) {
642 DbpString("cancelled by button");
643 break;
644 }
645
646 LED_A_ON();
647 WDT_HIT();
648
649 int register readBufDataP = data - dmaBuf;
650 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
651 if (readBufDataP <= dmaBufDataP){
652 dataLen = dmaBufDataP - readBufDataP;
653 } else {
654 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
655 }
656 // test for length of buffer
657 if(dataLen > maxDataLen) {
658 maxDataLen = dataLen;
659 if(dataLen > 400) {
660 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
661 break;
662 }
663 }
664 if(dataLen < 1) continue;
665
666 // primary buffer was stopped( <-- we lost data!
667 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
668 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
669 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
670 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
671 }
672 // secondary buffer sets as primary, secondary buffer was stopped
673 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
674 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
675 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
676 }
677
678 LED_A_OFF();
679
680 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
681
682 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
683 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
684 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
685 LED_C_ON();
686
687 // check - if there is a short 7bit request from reader
688 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
689
690 if(triggered) {
691 if (!LogTrace(receivedCmd,
692 Uart.len,
693 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
694 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
695 Uart.parity,
696 TRUE)) break;
697 }
698 /* And ready to receive another command. */
699 UartReset();
700 /* And also reset the demod code, which might have been */
701 /* false-triggered by the commands from the reader. */
702 DemodReset();
703 LED_B_OFF();
704 }
705 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
706 }
707
708 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
709 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
710 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
711 LED_B_ON();
712
713 if (!LogTrace(receivedResponse,
714 Demod.len,
715 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
716 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
717 Demod.parity,
718 FALSE)) break;
719
720 if ((!triggered) && (param & 0x01)) triggered = TRUE;
721
722 // And ready to receive another response.
723 DemodReset();
724 LED_C_OFF();
725 }
726 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
727 }
728 }
729
730 previous_data = *data;
731 rsamples++;
732 data++;
733 if(data == dmaBuf + DMA_BUFFER_SIZE) {
734 data = dmaBuf;
735 }
736 } // main cycle
737
738 DbpString("COMMAND FINISHED");
739
740 FpgaDisableSscDma();
741 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
742 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
743 LEDsoff();
744 }
745
746 //-----------------------------------------------------------------------------
747 // Prepare tag messages
748 //-----------------------------------------------------------------------------
749 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
750 {
751 ToSendReset();
752
753 // Correction bit, might be removed when not needed
754 ToSendStuffBit(0);
755 ToSendStuffBit(0);
756 ToSendStuffBit(0);
757 ToSendStuffBit(0);
758 ToSendStuffBit(1); // 1
759 ToSendStuffBit(0);
760 ToSendStuffBit(0);
761 ToSendStuffBit(0);
762
763 // Send startbit
764 ToSend[++ToSendMax] = SEC_D;
765 LastProxToAirDuration = 8 * ToSendMax - 4;
766
767 for(uint16_t i = 0; i < len; i++) {
768 uint8_t b = cmd[i];
769
770 // Data bits
771 for(uint16_t j = 0; j < 8; j++) {
772 if(b & 1) {
773 ToSend[++ToSendMax] = SEC_D;
774 } else {
775 ToSend[++ToSendMax] = SEC_E;
776 }
777 b >>= 1;
778 }
779
780 // Get the parity bit
781 if (parity[i>>3] & (0x80>>(i&0x0007))) {
782 ToSend[++ToSendMax] = SEC_D;
783 LastProxToAirDuration = 8 * ToSendMax - 4;
784 } else {
785 ToSend[++ToSendMax] = SEC_E;
786 LastProxToAirDuration = 8 * ToSendMax;
787 }
788 }
789
790 // Send stopbit
791 ToSend[++ToSendMax] = SEC_F;
792
793 // Convert from last byte pos to length
794 ToSendMax++;
795 }
796
797 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
798 {
799 uint8_t par[MAX_PARITY_SIZE];
800
801 GetParity(cmd, len, par);
802 CodeIso14443aAsTagPar(cmd, len, par);
803 }
804
805
806 static void Code4bitAnswerAsTag(uint8_t cmd)
807 {
808 int i;
809
810 ToSendReset();
811
812 // Correction bit, might be removed when not needed
813 ToSendStuffBit(0);
814 ToSendStuffBit(0);
815 ToSendStuffBit(0);
816 ToSendStuffBit(0);
817 ToSendStuffBit(1); // 1
818 ToSendStuffBit(0);
819 ToSendStuffBit(0);
820 ToSendStuffBit(0);
821
822 // Send startbit
823 ToSend[++ToSendMax] = SEC_D;
824
825 uint8_t b = cmd;
826 for(i = 0; i < 4; i++) {
827 if(b & 1) {
828 ToSend[++ToSendMax] = SEC_D;
829 LastProxToAirDuration = 8 * ToSendMax - 4;
830 } else {
831 ToSend[++ToSendMax] = SEC_E;
832 LastProxToAirDuration = 8 * ToSendMax;
833 }
834 b >>= 1;
835 }
836
837 // Send stopbit
838 ToSend[++ToSendMax] = SEC_F;
839
840 // Convert from last byte pos to length
841 ToSendMax++;
842 }
843
844 //-----------------------------------------------------------------------------
845 // Wait for commands from reader
846 // Stop when button is pressed
847 // Or return TRUE when command is captured
848 //-----------------------------------------------------------------------------
849 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
850 {
851 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
852 // only, since we are receiving, not transmitting).
853 // Signal field is off with the appropriate LED
854 LED_D_OFF();
855 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
856
857 // Now run a `software UART' on the stream of incoming samples.
858 UartInit(received, parity);
859
860 // clear RXRDY:
861 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
862
863 for(;;) {
864 WDT_HIT();
865
866 if(BUTTON_PRESS()) return FALSE;
867
868 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
869 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
870 if(MillerDecoding(b, 0)) {
871 *len = Uart.len;
872 return TRUE;
873 }
874 }
875 }
876 }
877
878 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
879 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
880 int EmSend4bit(uint8_t resp);
881 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
882 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
883 int EmSendCmd(uint8_t *resp, uint16_t respLen);
884 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
885 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
886 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
887
888 static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
889
890 typedef struct {
891 uint8_t* response;
892 size_t response_n;
893 uint8_t* modulation;
894 size_t modulation_n;
895 uint32_t ProxToAirDuration;
896 } tag_response_info_t;
897
898 void reset_free_buffer() {
899 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
900 }
901
902 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
903 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
904 // This will need the following byte array for a modulation sequence
905 // 144 data bits (18 * 8)
906 // 18 parity bits
907 // 2 Start and stop
908 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
909 // 1 just for the case
910 // ----------- +
911 // 166 bytes, since every bit that needs to be send costs us a byte
912 //
913
914 // Prepare the tag modulation bits from the message
915 CodeIso14443aAsTag(response_info->response,response_info->response_n);
916
917 // Make sure we do not exceed the free buffer space
918 if (ToSendMax > max_buffer_size) {
919 Dbprintf("Out of memory, when modulating bits for tag answer:");
920 Dbhexdump(response_info->response_n,response_info->response,false);
921 return false;
922 }
923
924 // Copy the byte array, used for this modulation to the buffer position
925 memcpy(response_info->modulation,ToSend,ToSendMax);
926
927 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
928 response_info->modulation_n = ToSendMax;
929 response_info->ProxToAirDuration = LastProxToAirDuration;
930
931 return true;
932 }
933
934 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
935 // Retrieve and store the current buffer index
936 response_info->modulation = free_buffer_pointer;
937
938 // Determine the maximum size we can use from our buffer
939 size_t max_buffer_size = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + FREE_BUFFER_SIZE) - free_buffer_pointer;
940
941 // Forward the prepare tag modulation function to the inner function
942 if (prepare_tag_modulation(response_info,max_buffer_size)) {
943 // Update the free buffer offset
944 free_buffer_pointer += ToSendMax;
945 return true;
946 } else {
947 return false;
948 }
949 }
950
951 //-----------------------------------------------------------------------------
952 // Main loop of simulated tag: receive commands from reader, decide what
953 // response to send, and send it.
954 //-----------------------------------------------------------------------------
955 void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
956 {
957 // Enable and clear the trace
958 iso14a_clear_trace();
959 iso14a_set_tracing(TRUE);
960
961 uint8_t sak;
962
963 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
964 uint8_t response1[2];
965
966 switch (tagType) {
967 case 1: { // MIFARE Classic
968 // Says: I am Mifare 1k - original line
969 response1[0] = 0x04;
970 response1[1] = 0x00;
971 sak = 0x08;
972 } break;
973 case 2: { // MIFARE Ultralight
974 // Says: I am a stupid memory tag, no crypto
975 response1[0] = 0x04;
976 response1[1] = 0x00;
977 sak = 0x00;
978 } break;
979 case 3: { // MIFARE DESFire
980 // Says: I am a DESFire tag, ph33r me
981 response1[0] = 0x04;
982 response1[1] = 0x03;
983 sak = 0x20;
984 } break;
985 case 4: { // ISO/IEC 14443-4
986 // Says: I am a javacard (JCOP)
987 response1[0] = 0x04;
988 response1[1] = 0x00;
989 sak = 0x28;
990 } break;
991 case 5: { // MIFARE TNP3XXX
992 // Says: I am a toy
993 response1[0] = 0x01;
994 response1[1] = 0x0f;
995 sak = 0x01;
996 } break;
997 default: {
998 Dbprintf("Error: unkown tagtype (%d)",tagType);
999 return;
1000 } break;
1001 }
1002
1003 // The second response contains the (mandatory) first 24 bits of the UID
1004 uint8_t response2[5] = {0x00};
1005
1006 // Check if the uid uses the (optional) part
1007 uint8_t response2a[5] = {0x00};
1008
1009 if (uid_2nd) {
1010 response2[0] = 0x88;
1011 num_to_bytes(uid_1st,3,response2+1);
1012 num_to_bytes(uid_2nd,4,response2a);
1013 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1014
1015 // Configure the ATQA and SAK accordingly
1016 response1[0] |= 0x40;
1017 sak |= 0x04;
1018 } else {
1019 num_to_bytes(uid_1st,4,response2);
1020 // Configure the ATQA and SAK accordingly
1021 response1[0] &= 0xBF;
1022 sak &= 0xFB;
1023 }
1024
1025 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1026 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1027
1028 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1029 uint8_t response3[3] = {0x00};
1030 response3[0] = sak;
1031 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1032
1033 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1034 uint8_t response3a[3] = {0x00};
1035 response3a[0] = sak & 0xFB;
1036 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1037
1038 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1039 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1040 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1041 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1042 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1043 // TC(1) = 0x02: CID supported, NAD not supported
1044 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1045
1046 #define TAG_RESPONSE_COUNT 7
1047 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1048 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1049 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1050 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1051 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1052 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1053 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1054 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1055 };
1056
1057 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1058 // Such a response is less time critical, so we can prepare them on the fly
1059 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1060 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1061 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1062 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1063 tag_response_info_t dynamic_response_info = {
1064 .response = dynamic_response_buffer,
1065 .response_n = 0,
1066 .modulation = dynamic_modulation_buffer,
1067 .modulation_n = 0
1068 };
1069
1070 // Reset the offset pointer of the free buffer
1071 reset_free_buffer();
1072
1073 // Prepare the responses of the anticollision phase
1074 // there will be not enough time to do this at the moment the reader sends it REQA
1075 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
1076 prepare_allocated_tag_modulation(&responses[i]);
1077 }
1078
1079 int len = 0;
1080
1081 // To control where we are in the protocol
1082 int order = 0;
1083 int lastorder;
1084
1085 // Just to allow some checks
1086 int happened = 0;
1087 int happened2 = 0;
1088 int cmdsRecvd = 0;
1089
1090 // We need to listen to the high-frequency, peak-detected path.
1091 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1092
1093 // buffers used on software Uart:
1094 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
1095 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
1096
1097 cmdsRecvd = 0;
1098 tag_response_info_t* p_response;
1099
1100 LED_A_ON();
1101 for(;;) {
1102 // Clean receive command buffer
1103
1104 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1105 DbpString("Button press");
1106 break;
1107 }
1108
1109 p_response = NULL;
1110
1111 // Okay, look at the command now.
1112 lastorder = order;
1113 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1114 p_response = &responses[0]; order = 1;
1115 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1116 p_response = &responses[0]; order = 6;
1117 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1118 p_response = &responses[1]; order = 2;
1119 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1120 p_response = &responses[2]; order = 20;
1121 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1122 p_response = &responses[3]; order = 3;
1123 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1124 p_response = &responses[4]; order = 30;
1125 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1126 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1127 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1128 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1129 p_response = NULL;
1130 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1131
1132 if (tracing) {
1133 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1134 }
1135 p_response = NULL;
1136 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1137 p_response = &responses[5]; order = 7;
1138 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1139 if (tagType == 1 || tagType == 2) { // RATS not supported
1140 EmSend4bit(CARD_NACK_NA);
1141 p_response = NULL;
1142 } else {
1143 p_response = &responses[6]; order = 70;
1144 }
1145 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1146 if (tracing) {
1147 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1148 }
1149 uint32_t nr = bytes_to_num(receivedCmd,4);
1150 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1151 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1152 } else {
1153 // Check for ISO 14443A-4 compliant commands, look at left nibble
1154 switch (receivedCmd[0]) {
1155
1156 case 0x0B:
1157 case 0x0A: { // IBlock (command)
1158 dynamic_response_info.response[0] = receivedCmd[0];
1159 dynamic_response_info.response[1] = 0x00;
1160 dynamic_response_info.response[2] = 0x90;
1161 dynamic_response_info.response[3] = 0x00;
1162 dynamic_response_info.response_n = 4;
1163 } break;
1164
1165 case 0x1A:
1166 case 0x1B: { // Chaining command
1167 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1168 dynamic_response_info.response_n = 2;
1169 } break;
1170
1171 case 0xaa:
1172 case 0xbb: {
1173 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1174 dynamic_response_info.response_n = 2;
1175 } break;
1176
1177 case 0xBA: { //
1178 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1179 dynamic_response_info.response_n = 2;
1180 } break;
1181
1182 case 0xCA:
1183 case 0xC2: { // Readers sends deselect command
1184 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1185 dynamic_response_info.response_n = 2;
1186 } break;
1187
1188 default: {
1189 // Never seen this command before
1190 if (tracing) {
1191 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1192 }
1193 Dbprintf("Received unknown command (len=%d):",len);
1194 Dbhexdump(len,receivedCmd,false);
1195 // Do not respond
1196 dynamic_response_info.response_n = 0;
1197 } break;
1198 }
1199
1200 if (dynamic_response_info.response_n > 0) {
1201 // Copy the CID from the reader query
1202 dynamic_response_info.response[1] = receivedCmd[1];
1203
1204 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1205 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1206 dynamic_response_info.response_n += 2;
1207
1208 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1209 Dbprintf("Error preparing tag response");
1210 if (tracing) {
1211 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1212 }
1213 break;
1214 }
1215 p_response = &dynamic_response_info;
1216 }
1217 }
1218
1219 // Count number of wakeups received after a halt
1220 if(order == 6 && lastorder == 5) { happened++; }
1221
1222 // Count number of other messages after a halt
1223 if(order != 6 && lastorder == 5) { happened2++; }
1224
1225 if(cmdsRecvd > 999) {
1226 DbpString("1000 commands later...");
1227 break;
1228 }
1229 cmdsRecvd++;
1230
1231 if (p_response != NULL) {
1232 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1233 // do the tracing for the previous reader request and this tag answer:
1234 uint8_t par[MAX_PARITY_SIZE];
1235 GetParity(p_response->response, p_response->response_n, par);
1236
1237 EmLogTrace(Uart.output,
1238 Uart.len,
1239 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1240 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1241 Uart.parity,
1242 p_response->response,
1243 p_response->response_n,
1244 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1245 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1246 par);
1247 }
1248
1249 if (!tracing) {
1250 Dbprintf("Trace Full. Simulation stopped.");
1251 break;
1252 }
1253 }
1254
1255 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1256 LED_A_OFF();
1257 }
1258
1259
1260 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1261 // of bits specified in the delay parameter.
1262 void PrepareDelayedTransfer(uint16_t delay)
1263 {
1264 uint8_t bitmask = 0;
1265 uint8_t bits_to_shift = 0;
1266 uint8_t bits_shifted = 0;
1267
1268 delay &= 0x07;
1269 if (delay) {
1270 for (uint16_t i = 0; i < delay; i++) {
1271 bitmask |= (0x01 << i);
1272 }
1273 ToSend[ToSendMax++] = 0x00;
1274 for (uint16_t i = 0; i < ToSendMax; i++) {
1275 bits_to_shift = ToSend[i] & bitmask;
1276 ToSend[i] = ToSend[i] >> delay;
1277 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1278 bits_shifted = bits_to_shift;
1279 }
1280 }
1281 }
1282
1283
1284 //-------------------------------------------------------------------------------------
1285 // Transmit the command (to the tag) that was placed in ToSend[].
1286 // Parameter timing:
1287 // if NULL: transfer at next possible time, taking into account
1288 // request guard time and frame delay time
1289 // if == 0: transfer immediately and return time of transfer
1290 // if != 0: delay transfer until time specified
1291 //-------------------------------------------------------------------------------------
1292 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1293 {
1294
1295 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1296
1297 uint32_t ThisTransferTime = 0;
1298
1299 if (timing) {
1300 if(*timing == 0) { // Measure time
1301 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1302 } else {
1303 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1304 }
1305 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1306 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1307 LastTimeProxToAirStart = *timing;
1308 } else {
1309 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1310 while(GetCountSspClk() < ThisTransferTime);
1311 LastTimeProxToAirStart = ThisTransferTime;
1312 }
1313
1314 // clear TXRDY
1315 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1316
1317 uint16_t c = 0;
1318 for(;;) {
1319 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1320 AT91C_BASE_SSC->SSC_THR = cmd[c];
1321 c++;
1322 if(c >= len) {
1323 break;
1324 }
1325 }
1326 }
1327
1328 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1329 }
1330
1331
1332 //-----------------------------------------------------------------------------
1333 // Prepare reader command (in bits, support short frames) to send to FPGA
1334 //-----------------------------------------------------------------------------
1335 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
1336 {
1337 int i, j;
1338 int last;
1339 uint8_t b;
1340
1341 ToSendReset();
1342
1343 // Start of Communication (Seq. Z)
1344 ToSend[++ToSendMax] = SEC_Z;
1345 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1346 last = 0;
1347
1348 size_t bytecount = nbytes(bits);
1349 // Generate send structure for the data bits
1350 for (i = 0; i < bytecount; i++) {
1351 // Get the current byte to send
1352 b = cmd[i];
1353 size_t bitsleft = MIN((bits-(i*8)),8);
1354
1355 for (j = 0; j < bitsleft; j++) {
1356 if (b & 1) {
1357 // Sequence X
1358 ToSend[++ToSendMax] = SEC_X;
1359 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1360 last = 1;
1361 } else {
1362 if (last == 0) {
1363 // Sequence Z
1364 ToSend[++ToSendMax] = SEC_Z;
1365 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1366 } else {
1367 // Sequence Y
1368 ToSend[++ToSendMax] = SEC_Y;
1369 last = 0;
1370 }
1371 }
1372 b >>= 1;
1373 }
1374
1375 // Only transmit parity bit if we transmitted a complete byte
1376 if (j == 8) {
1377 // Get the parity bit
1378 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1379 // Sequence X
1380 ToSend[++ToSendMax] = SEC_X;
1381 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1382 last = 1;
1383 } else {
1384 if (last == 0) {
1385 // Sequence Z
1386 ToSend[++ToSendMax] = SEC_Z;
1387 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1388 } else {
1389 // Sequence Y
1390 ToSend[++ToSendMax] = SEC_Y;
1391 last = 0;
1392 }
1393 }
1394 }
1395 }
1396
1397 // End of Communication: Logic 0 followed by Sequence Y
1398 if (last == 0) {
1399 // Sequence Z
1400 ToSend[++ToSendMax] = SEC_Z;
1401 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1402 } else {
1403 // Sequence Y
1404 ToSend[++ToSendMax] = SEC_Y;
1405 last = 0;
1406 }
1407 ToSend[++ToSendMax] = SEC_Y;
1408
1409 // Convert to length of command:
1410 ToSendMax++;
1411 }
1412
1413 //-----------------------------------------------------------------------------
1414 // Prepare reader command to send to FPGA
1415 //-----------------------------------------------------------------------------
1416 void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity)
1417 {
1418 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1419 }
1420
1421 //-----------------------------------------------------------------------------
1422 // Wait for commands from reader
1423 // Stop when button is pressed (return 1) or field was gone (return 2)
1424 // Or return 0 when command is captured
1425 //-----------------------------------------------------------------------------
1426 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1427 {
1428 *len = 0;
1429
1430 uint32_t timer = 0, vtime = 0;
1431 int analogCnt = 0;
1432 int analogAVG = 0;
1433
1434 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1435 // only, since we are receiving, not transmitting).
1436 // Signal field is off with the appropriate LED
1437 LED_D_OFF();
1438 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1439
1440 // Set ADC to read field strength
1441 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1442 AT91C_BASE_ADC->ADC_MR =
1443 ADC_MODE_PRESCALE(32) |
1444 ADC_MODE_STARTUP_TIME(16) |
1445 ADC_MODE_SAMPLE_HOLD_TIME(8);
1446 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1447 // start ADC
1448 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1449
1450 // Now run a 'software UART' on the stream of incoming samples.
1451 UartInit(received, parity);
1452
1453 // Clear RXRDY:
1454 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1455
1456 for(;;) {
1457 WDT_HIT();
1458
1459 if (BUTTON_PRESS()) return 1;
1460
1461 // test if the field exists
1462 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1463 analogCnt++;
1464 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1465 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1466 if (analogCnt >= 32) {
1467 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1468 vtime = GetTickCount();
1469 if (!timer) timer = vtime;
1470 // 50ms no field --> card to idle state
1471 if (vtime - timer > 50) return 2;
1472 } else
1473 if (timer) timer = 0;
1474 analogCnt = 0;
1475 analogAVG = 0;
1476 }
1477 }
1478
1479 // receive and test the miller decoding
1480 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1481 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1482 if(MillerDecoding(b, 0)) {
1483 *len = Uart.len;
1484 return 0;
1485 }
1486 }
1487
1488 }
1489 }
1490
1491
1492 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1493 {
1494 uint8_t b;
1495 uint16_t i = 0;
1496 uint32_t ThisTransferTime;
1497
1498 // Modulate Manchester
1499 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1500
1501 // include correction bit if necessary
1502 if (Uart.parityBits & 0x01) {
1503 correctionNeeded = TRUE;
1504 }
1505 if(correctionNeeded) {
1506 // 1236, so correction bit needed
1507 i = 0;
1508 } else {
1509 i = 1;
1510 }
1511
1512 // clear receiving shift register and holding register
1513 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1514 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1515 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1516 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1517
1518 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1519 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1520 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1521 if (AT91C_BASE_SSC->SSC_RHR) break;
1522 }
1523
1524 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1525
1526 // Clear TXRDY:
1527 AT91C_BASE_SSC->SSC_THR = SEC_F;
1528
1529 // send cycle
1530 for(; i <= respLen; ) {
1531 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1532 AT91C_BASE_SSC->SSC_THR = resp[i++];
1533 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1534 }
1535
1536 if(BUTTON_PRESS()) {
1537 break;
1538 }
1539 }
1540
1541 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1542 for (i = 0; i < 2 ; ) {
1543 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1544 AT91C_BASE_SSC->SSC_THR = SEC_F;
1545 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1546 i++;
1547 }
1548 }
1549
1550 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1551
1552 return 0;
1553 }
1554
1555 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1556 Code4bitAnswerAsTag(resp);
1557 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1558 // do the tracing for the previous reader request and this tag answer:
1559 uint8_t par[1];
1560 GetParity(&resp, 1, par);
1561 EmLogTrace(Uart.output,
1562 Uart.len,
1563 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1564 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1565 Uart.parity,
1566 &resp,
1567 1,
1568 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1569 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1570 par);
1571 return res;
1572 }
1573
1574 int EmSend4bit(uint8_t resp){
1575 return EmSend4bitEx(resp, false);
1576 }
1577
1578 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1579 CodeIso14443aAsTagPar(resp, respLen, par);
1580 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1581 // do the tracing for the previous reader request and this tag answer:
1582 EmLogTrace(Uart.output,
1583 Uart.len,
1584 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1585 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1586 Uart.parity,
1587 resp,
1588 respLen,
1589 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1590 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1591 par);
1592 return res;
1593 }
1594
1595 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1596 uint8_t par[MAX_PARITY_SIZE];
1597 GetParity(resp, respLen, par);
1598 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1599 }
1600
1601 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1602 uint8_t par[MAX_PARITY_SIZE];
1603 GetParity(resp, respLen, par);
1604 return EmSendCmdExPar(resp, respLen, false, par);
1605 }
1606
1607 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1608 return EmSendCmdExPar(resp, respLen, false, par);
1609 }
1610
1611 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1612 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1613 {
1614 if (tracing) {
1615 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1616 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1617 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1618 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1619 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1620 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1621 reader_EndTime = tag_StartTime - exact_fdt;
1622 reader_StartTime = reader_EndTime - reader_modlen;
1623 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1624 return FALSE;
1625 } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1626 } else {
1627 return TRUE;
1628 }
1629 }
1630
1631 //-----------------------------------------------------------------------------
1632 // Wait a certain time for tag response
1633 // If a response is captured return TRUE
1634 // If it takes too long return FALSE
1635 //-----------------------------------------------------------------------------
1636 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1637 {
1638 uint32_t c;
1639
1640 // Set FPGA mode to "reader listen mode", no modulation (listen
1641 // only, since we are receiving, not transmitting).
1642 // Signal field is on with the appropriate LED
1643 LED_D_ON();
1644 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1645
1646 // Now get the answer from the card
1647 DemodInit(receivedResponse, receivedResponsePar);
1648
1649 // clear RXRDY:
1650 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1651
1652 c = 0;
1653 for(;;) {
1654 WDT_HIT();
1655
1656 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1657 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1658 if(ManchesterDecoding(b, offset, 0)) {
1659 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1660 return TRUE;
1661 } else if (c++ > iso14a_timeout) {
1662 return FALSE;
1663 }
1664 }
1665 }
1666 }
1667
1668 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1669 {
1670 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1671
1672 // Send command to tag
1673 TransmitFor14443a(ToSend, ToSendMax, timing);
1674 if(trigger)
1675 LED_A_ON();
1676
1677 // Log reader command in trace buffer
1678 if (tracing) {
1679 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1680 }
1681 }
1682
1683 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1684 {
1685 ReaderTransmitBitsPar(frame, len*8, par, timing);
1686 }
1687
1688 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1689 {
1690 // Generate parity and redirect
1691 uint8_t par[MAX_PARITY_SIZE];
1692 GetParity(frame, len/8, par);
1693 ReaderTransmitBitsPar(frame, len, par, timing);
1694 }
1695
1696 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1697 {
1698 // Generate parity and redirect
1699 uint8_t par[MAX_PARITY_SIZE];
1700 GetParity(frame, len, par);
1701 ReaderTransmitBitsPar(frame, len*8, par, timing);
1702 }
1703
1704 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1705 {
1706 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return FALSE;
1707 if (tracing) {
1708 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1709 }
1710 return Demod.len;
1711 }
1712
1713 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1714 {
1715 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
1716 if (tracing) {
1717 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1718 }
1719 return Demod.len;
1720 }
1721
1722 /* performs iso14443a anticollision procedure
1723 * fills the uid pointer unless NULL
1724 * fills resp_data unless NULL */
1725 int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr) {
1726 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1727 uint8_t sel_all[] = { 0x93,0x20 };
1728 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1729 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1730 uint8_t *resp = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
1731 uint8_t *resp_par = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
1732 byte_t uid_resp[4];
1733 size_t uid_resp_len;
1734
1735 uint8_t sak = 0x04; // cascade uid
1736 int cascade_level = 0;
1737 int len;
1738
1739 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1740 ReaderTransmitBitsPar(wupa,7,0, NULL);
1741
1742 // Receive the ATQA
1743 if(!ReaderReceive(resp, resp_par)) return 0;
1744
1745 if(p_hi14a_card) {
1746 memcpy(p_hi14a_card->atqa, resp, 2);
1747 p_hi14a_card->uidlen = 0;
1748 memset(p_hi14a_card->uid,0,10);
1749 }
1750
1751 // clear uid
1752 if (uid_ptr) {
1753 memset(uid_ptr,0,10);
1754 }
1755
1756 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1757 // which case we need to make a cascade 2 request and select - this is a long UID
1758 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1759 for(; sak & 0x04; cascade_level++) {
1760 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1761 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1762
1763 // SELECT_ALL
1764 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1765 if (!ReaderReceive(resp, resp_par)) return 0;
1766
1767 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1768 memset(uid_resp, 0, 4);
1769 uint16_t uid_resp_bits = 0;
1770 uint16_t collision_answer_offset = 0;
1771 // anti-collision-loop:
1772 while (Demod.collisionPos) {
1773 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1774 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1775 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1776 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1777 }
1778 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1779 uid_resp_bits++;
1780 // construct anticollosion command:
1781 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1782 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1783 sel_uid[2+i] = uid_resp[i];
1784 }
1785 collision_answer_offset = uid_resp_bits%8;
1786 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1787 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1788 }
1789 // finally, add the last bits and BCC of the UID
1790 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1791 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1792 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1793 }
1794
1795 } else { // no collision, use the response to SELECT_ALL as current uid
1796 memcpy(uid_resp, resp, 4);
1797 }
1798 uid_resp_len = 4;
1799
1800 // calculate crypto UID. Always use last 4 Bytes.
1801 if(cuid_ptr) {
1802 *cuid_ptr = bytes_to_num(uid_resp, 4);
1803 }
1804
1805 // Construct SELECT UID command
1806 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1807 memcpy(sel_uid+2, uid_resp, 4); // the UID
1808 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1809 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1810 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1811
1812 // Receive the SAK
1813 if (!ReaderReceive(resp, resp_par)) return 0;
1814 sak = resp[0];
1815
1816 // Test if more parts of the uid are coming
1817 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1818 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1819 // http://www.nxp.com/documents/application_note/AN10927.pdf
1820 uid_resp[0] = uid_resp[1];
1821 uid_resp[1] = uid_resp[2];
1822 uid_resp[2] = uid_resp[3];
1823
1824 uid_resp_len = 3;
1825 }
1826
1827 if(uid_ptr) {
1828 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1829 }
1830
1831 if(p_hi14a_card) {
1832 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1833 p_hi14a_card->uidlen += uid_resp_len;
1834 }
1835 }
1836
1837 if(p_hi14a_card) {
1838 p_hi14a_card->sak = sak;
1839 p_hi14a_card->ats_len = 0;
1840 }
1841
1842 // non iso14443a compliant tag
1843 if( (sak & 0x20) == 0) return 2;
1844
1845 // Request for answer to select
1846 AppendCrc14443a(rats, 2);
1847 ReaderTransmit(rats, sizeof(rats), NULL);
1848
1849 if (!(len = ReaderReceive(resp, resp_par))) return 0;
1850
1851
1852 if(p_hi14a_card) {
1853 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1854 p_hi14a_card->ats_len = len;
1855 }
1856
1857 // reset the PCB block number
1858 iso14_pcb_blocknum = 0;
1859 return 1;
1860 }
1861
1862 void iso14443a_setup(uint8_t fpga_minor_mode) {
1863 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1864 // Set up the synchronous serial port
1865 FpgaSetupSsc();
1866 // connect Demodulated Signal to ADC:
1867 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1868
1869 // Signal field is on with the appropriate LED
1870 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
1871 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
1872 LED_D_ON();
1873 } else {
1874 LED_D_OFF();
1875 }
1876 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
1877
1878 // Start the timer
1879 StartCountSspClk();
1880
1881 DemodReset();
1882 UartReset();
1883 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
1884 iso14a_set_timeout(1050); // 10ms default
1885 }
1886
1887 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
1888 uint8_t parity[MAX_PARITY_SIZE];
1889 uint8_t real_cmd[cmd_len+4];
1890 real_cmd[0] = 0x0a; //I-Block
1891 // put block number into the PCB
1892 real_cmd[0] |= iso14_pcb_blocknum;
1893 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1894 memcpy(real_cmd+2, cmd, cmd_len);
1895 AppendCrc14443a(real_cmd,cmd_len+2);
1896
1897 ReaderTransmit(real_cmd, cmd_len+4, NULL);
1898 size_t len = ReaderReceive(data, parity);
1899 uint8_t *data_bytes = (uint8_t *) data;
1900 if (!len)
1901 return 0; //DATA LINK ERROR
1902 // if we received an I- or R(ACK)-Block with a block number equal to the
1903 // current block number, toggle the current block number
1904 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1905 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1906 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1907 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1908 {
1909 iso14_pcb_blocknum ^= 1;
1910 }
1911
1912 return len;
1913 }
1914
1915 //-----------------------------------------------------------------------------
1916 // Read an ISO 14443a tag. Send out commands and store answers.
1917 //
1918 //-----------------------------------------------------------------------------
1919 void ReaderIso14443a(UsbCommand *c)
1920 {
1921 iso14a_command_t param = c->arg[0];
1922 uint8_t *cmd = c->d.asBytes;
1923 size_t len = c->arg[1];
1924 size_t lenbits = c->arg[2];
1925 uint32_t arg0 = 0;
1926 byte_t buf[USB_CMD_DATA_SIZE];
1927 uint8_t par[MAX_PARITY_SIZE];
1928
1929 if(param & ISO14A_CONNECT) {
1930 iso14a_clear_trace();
1931 }
1932
1933 iso14a_set_tracing(TRUE);
1934
1935 if(param & ISO14A_REQUEST_TRIGGER) {
1936 iso14a_set_trigger(TRUE);
1937 }
1938
1939 if(param & ISO14A_CONNECT) {
1940 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
1941 if(!(param & ISO14A_NO_SELECT)) {
1942 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1943 arg0 = iso14443a_select_card(NULL,card,NULL);
1944 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1945 }
1946 }
1947
1948 if(param & ISO14A_SET_TIMEOUT) {
1949 iso14a_set_timeout(c->arg[2]);
1950 }
1951
1952 if(param & ISO14A_APDU) {
1953 arg0 = iso14_apdu(cmd, len, buf);
1954 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1955 }
1956
1957 if(param & ISO14A_RAW) {
1958 if(param & ISO14A_APPEND_CRC) {
1959 AppendCrc14443a(cmd,len);
1960 len += 2;
1961 if (lenbits) lenbits += 16;
1962 }
1963 if(lenbits>0) {
1964 GetParity(cmd, lenbits/8, par);
1965 ReaderTransmitBitsPar(cmd, lenbits, par, NULL);
1966 } else {
1967 ReaderTransmit(cmd,len, NULL);
1968 }
1969 arg0 = ReaderReceive(buf, par);
1970 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1971 }
1972
1973 if(param & ISO14A_REQUEST_TRIGGER) {
1974 iso14a_set_trigger(FALSE);
1975 }
1976
1977 if(param & ISO14A_NO_DISCONNECT) {
1978 return;
1979 }
1980
1981 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1982 LEDsoff();
1983 }
1984
1985
1986 // Determine the distance between two nonces.
1987 // Assume that the difference is small, but we don't know which is first.
1988 // Therefore try in alternating directions.
1989 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1990
1991 uint16_t i;
1992 uint32_t nttmp1, nttmp2;
1993
1994 if (nt1 == nt2) return 0;
1995
1996 nttmp1 = nt1;
1997 nttmp2 = nt2;
1998
1999 for (i = 1; i < 32768; i++) {
2000 nttmp1 = prng_successor(nttmp1, 1);
2001 if (nttmp1 == nt2) return i;
2002 nttmp2 = prng_successor(nttmp2, 1);
2003 if (nttmp2 == nt1) return -i;
2004 }
2005
2006 return(-99999); // either nt1 or nt2 are invalid nonces
2007 }
2008
2009
2010 //-----------------------------------------------------------------------------
2011 // Recover several bits of the cypher stream. This implements (first stages of)
2012 // the algorithm described in "The Dark Side of Security by Obscurity and
2013 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2014 // (article by Nicolas T. Courtois, 2009)
2015 //-----------------------------------------------------------------------------
2016 void ReaderMifare(bool first_try)
2017 {
2018 // Mifare AUTH
2019 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2020 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2021 static uint8_t mf_nr_ar3;
2022
2023 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2024 uint8_t* receivedAnswerPar = (((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET);
2025
2026 iso14a_clear_trace();
2027 iso14a_set_tracing(TRUE);
2028
2029 byte_t nt_diff = 0;
2030 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2031 static byte_t par_low = 0;
2032 bool led_on = TRUE;
2033 uint8_t uid[10] ={0};
2034 uint32_t cuid;
2035
2036 uint32_t nt = 0;
2037 uint32_t previous_nt = 0;
2038 static uint32_t nt_attacked = 0;
2039 byte_t par_list[8] = {0x00};
2040 byte_t ks_list[8] = {0x00};
2041
2042 static uint32_t sync_time;
2043 static uint32_t sync_cycles;
2044 int catch_up_cycles = 0;
2045 int last_catch_up = 0;
2046 uint16_t consecutive_resyncs = 0;
2047 int isOK = 0;
2048
2049 if (first_try) {
2050 mf_nr_ar3 = 0;
2051 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2052 sync_time = GetCountSspClk() & 0xfffffff8;
2053 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2054 nt_attacked = 0;
2055 nt = 0;
2056 par[0] = 0;
2057 }
2058 else {
2059 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2060 mf_nr_ar3++;
2061 mf_nr_ar[3] = mf_nr_ar3;
2062 par[0] = par_low;
2063 }
2064
2065 LED_A_ON();
2066 LED_B_OFF();
2067 LED_C_OFF();
2068
2069
2070 for(uint16_t i = 0; TRUE; i++) {
2071
2072 WDT_HIT();
2073
2074 // Test if the action was cancelled
2075 if(BUTTON_PRESS()) {
2076 break;
2077 }
2078
2079 LED_C_ON();
2080
2081 if(!iso14443a_select_card(uid, NULL, &cuid)) {
2082 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
2083 continue;
2084 }
2085
2086 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2087 catch_up_cycles = 0;
2088
2089 // if we missed the sync time already, advance to the next nonce repeat
2090 while(GetCountSspClk() > sync_time) {
2091 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2092 }
2093
2094 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2095 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2096
2097 // Receive the (4 Byte) "random" nonce
2098 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2099 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2100 continue;
2101 }
2102
2103 previous_nt = nt;
2104 nt = bytes_to_num(receivedAnswer, 4);
2105
2106 // Transmit reader nonce with fake par
2107 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2108
2109 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2110 int nt_distance = dist_nt(previous_nt, nt);
2111 if (nt_distance == 0) {
2112 nt_attacked = nt;
2113 }
2114 else {
2115 if (nt_distance == -99999) { // invalid nonce received, try again
2116 continue;
2117 }
2118 sync_cycles = (sync_cycles - nt_distance);
2119 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2120 continue;
2121 }
2122 }
2123
2124 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2125 catch_up_cycles = -dist_nt(nt_attacked, nt);
2126 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2127 catch_up_cycles = 0;
2128 continue;
2129 }
2130 if (catch_up_cycles == last_catch_up) {
2131 consecutive_resyncs++;
2132 }
2133 else {
2134 last_catch_up = catch_up_cycles;
2135 consecutive_resyncs = 0;
2136 }
2137 if (consecutive_resyncs < 3) {
2138 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2139 }
2140 else {
2141 sync_cycles = sync_cycles + catch_up_cycles;
2142 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2143 }
2144 continue;
2145 }
2146
2147 consecutive_resyncs = 0;
2148
2149 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2150 if (ReaderReceive(receivedAnswer, receivedAnswerPar))
2151 {
2152 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2153
2154 if (nt_diff == 0)
2155 {
2156 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2157 }
2158
2159 led_on = !led_on;
2160 if(led_on) LED_B_ON(); else LED_B_OFF();
2161
2162 par_list[nt_diff] = SwapBits(par[0], 8);
2163 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2164
2165 // Test if the information is complete
2166 if (nt_diff == 0x07) {
2167 isOK = 1;
2168 break;
2169 }
2170
2171 nt_diff = (nt_diff + 1) & 0x07;
2172 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2173 par[0] = par_low;
2174 } else {
2175 if (nt_diff == 0 && first_try)
2176 {
2177 par[0]++;
2178 } else {
2179 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2180 }
2181 }
2182 }
2183
2184
2185 mf_nr_ar[3] &= 0x1F;
2186
2187 byte_t buf[28];
2188 memcpy(buf + 0, uid, 4);
2189 num_to_bytes(nt, 4, buf + 4);
2190 memcpy(buf + 8, par_list, 8);
2191 memcpy(buf + 16, ks_list, 8);
2192 memcpy(buf + 24, mf_nr_ar, 4);
2193
2194 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2195
2196 // Thats it...
2197 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2198 LEDsoff();
2199
2200 iso14a_set_tracing(FALSE);
2201 }
2202
2203 /**
2204 *MIFARE 1K simulate.
2205 *
2206 *@param flags :
2207 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2208 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2209 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2210 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2211 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2212 */
2213 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2214 {
2215 int cardSTATE = MFEMUL_NOFIELD;
2216 int _7BUID = 0;
2217 int vHf = 0; // in mV
2218 int res;
2219 uint32_t selTimer = 0;
2220 uint32_t authTimer = 0;
2221 uint16_t len = 0;
2222 uint8_t cardWRBL = 0;
2223 uint8_t cardAUTHSC = 0;
2224 uint8_t cardAUTHKEY = 0xff; // no authentication
2225 uint32_t cardRr = 0;
2226 uint32_t cuid = 0;
2227 //uint32_t rn_enc = 0;
2228 uint32_t ans = 0;
2229 uint32_t cardINTREG = 0;
2230 uint8_t cardINTBLOCK = 0;
2231 struct Crypto1State mpcs = {0, 0};
2232 struct Crypto1State *pcs;
2233 pcs = &mpcs;
2234 uint32_t numReads = 0;//Counts numer of times reader read a block
2235 uint8_t* receivedCmd = get_bigbufptr_recvcmdbuf();
2236 uint8_t* receivedCmd_par = receivedCmd + MAX_FRAME_SIZE;
2237 uint8_t* response = get_bigbufptr_recvrespbuf();
2238 uint8_t* response_par = response + MAX_FRAME_SIZE;
2239
2240 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2241 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2242 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2243 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2244 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2245
2246 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2247 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2248
2249 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2250 // This can be used in a reader-only attack.
2251 // (it can also be retrieved via 'hf 14a list', but hey...
2252 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2253 uint8_t ar_nr_collected = 0;
2254
2255 // clear trace
2256 iso14a_clear_trace();
2257 iso14a_set_tracing(TRUE);
2258
2259 // Authenticate response - nonce
2260 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2261
2262 //-- Determine the UID
2263 // Can be set from emulator memory, incoming data
2264 // and can be 7 or 4 bytes long
2265 if (flags & FLAG_4B_UID_IN_DATA)
2266 {
2267 // 4B uid comes from data-portion of packet
2268 memcpy(rUIDBCC1,datain,4);
2269 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2270
2271 } else if (flags & FLAG_7B_UID_IN_DATA) {
2272 // 7B uid comes from data-portion of packet
2273 memcpy(&rUIDBCC1[1],datain,3);
2274 memcpy(rUIDBCC2, datain+3, 4);
2275 _7BUID = true;
2276 } else {
2277 // get UID from emul memory
2278 emlGetMemBt(receivedCmd, 7, 1);
2279 _7BUID = !(receivedCmd[0] == 0x00);
2280 if (!_7BUID) { // ---------- 4BUID
2281 emlGetMemBt(rUIDBCC1, 0, 4);
2282 } else { // ---------- 7BUID
2283 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2284 emlGetMemBt(rUIDBCC2, 3, 4);
2285 }
2286 }
2287
2288 /*
2289 * Regardless of what method was used to set the UID, set fifth byte and modify
2290 * the ATQA for 4 or 7-byte UID
2291 */
2292 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2293 if (_7BUID) {
2294 rATQA[0] = 0x44;
2295 rUIDBCC1[0] = 0x88;
2296 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2297 }
2298
2299 // We need to listen to the high-frequency, peak-detected path.
2300 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2301
2302
2303 if (MF_DBGLEVEL >= 1) {
2304 if (!_7BUID) {
2305 Dbprintf("4B UID: %02x%02x%02x%02x",
2306 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2307 } else {
2308 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2309 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2310 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2311 }
2312 }
2313
2314 bool finished = FALSE;
2315 while (!BUTTON_PRESS() && !finished) {
2316 WDT_HIT();
2317
2318 // find reader field
2319 // Vref = 3300mV, and an 10:1 voltage divider on the input
2320 // can measure voltages up to 33000 mV
2321 if (cardSTATE == MFEMUL_NOFIELD) {
2322 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2323 if (vHf > MF_MINFIELDV) {
2324 cardSTATE_TO_IDLE();
2325 LED_A_ON();
2326 }
2327 }
2328 if(cardSTATE == MFEMUL_NOFIELD) continue;
2329
2330 //Now, get data
2331
2332 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2333 if (res == 2) { //Field is off!
2334 cardSTATE = MFEMUL_NOFIELD;
2335 LEDsoff();
2336 continue;
2337 } else if (res == 1) {
2338 break; //return value 1 means button press
2339 }
2340
2341 // REQ or WUP request in ANY state and WUP in HALTED state
2342 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2343 selTimer = GetTickCount();
2344 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2345 cardSTATE = MFEMUL_SELECT1;
2346
2347 // init crypto block
2348 LED_B_OFF();
2349 LED_C_OFF();
2350 crypto1_destroy(pcs);
2351 cardAUTHKEY = 0xff;
2352 continue;
2353 }
2354
2355 switch (cardSTATE) {
2356 case MFEMUL_NOFIELD:
2357 case MFEMUL_HALTED:
2358 case MFEMUL_IDLE:{
2359 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2360 break;
2361 }
2362 case MFEMUL_SELECT1:{
2363 // select all
2364 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2365 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2366 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2367 break;
2368 }
2369
2370 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2371 {
2372 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2373 }
2374 // select card
2375 if (len == 9 &&
2376 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2377 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2378 cuid = bytes_to_num(rUIDBCC1, 4);
2379 if (!_7BUID) {
2380 cardSTATE = MFEMUL_WORK;
2381 LED_B_ON();
2382 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2383 break;
2384 } else {
2385 cardSTATE = MFEMUL_SELECT2;
2386 }
2387 }
2388 break;
2389 }
2390 case MFEMUL_AUTH1:{
2391 if( len != 8)
2392 {
2393 cardSTATE_TO_IDLE();
2394 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2395 break;
2396 }
2397 uint32_t ar = bytes_to_num(receivedCmd, 4);
2398 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2399
2400 //Collect AR/NR
2401 if(ar_nr_collected < 2){
2402 if(ar_nr_responses[2] != ar)
2403 {// Avoid duplicates... probably not necessary, ar should vary.
2404 ar_nr_responses[ar_nr_collected*4] = cuid;
2405 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2406 ar_nr_responses[ar_nr_collected*4+2] = ar;
2407 ar_nr_responses[ar_nr_collected*4+3] = nr;
2408 ar_nr_collected++;
2409 }
2410 }
2411
2412 // --- crypto
2413 crypto1_word(pcs, ar , 1);
2414 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2415
2416 // test if auth OK
2417 if (cardRr != prng_successor(nonce, 64)){
2418 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2419 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2420 cardRr, prng_successor(nonce, 64));
2421 // Shouldn't we respond anything here?
2422 // Right now, we don't nack or anything, which causes the
2423 // reader to do a WUPA after a while. /Martin
2424 // -- which is the correct response. /piwi
2425 cardSTATE_TO_IDLE();
2426 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2427 break;
2428 }
2429
2430 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2431
2432 num_to_bytes(ans, 4, rAUTH_AT);
2433 // --- crypto
2434 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2435 LED_C_ON();
2436 cardSTATE = MFEMUL_WORK;
2437 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2438 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2439 GetTickCount() - authTimer);
2440 break;
2441 }
2442 case MFEMUL_SELECT2:{
2443 if (!len) {
2444 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2445 break;
2446 }
2447 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2448 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2449 break;
2450 }
2451
2452 // select 2 card
2453 if (len == 9 &&
2454 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2455 EmSendCmd(rSAK, sizeof(rSAK));
2456 cuid = bytes_to_num(rUIDBCC2, 4);
2457 cardSTATE = MFEMUL_WORK;
2458 LED_B_ON();
2459 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2460 break;
2461 }
2462
2463 // i guess there is a command). go into the work state.
2464 if (len != 4) {
2465 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2466 break;
2467 }
2468 cardSTATE = MFEMUL_WORK;
2469 //goto lbWORK;
2470 //intentional fall-through to the next case-stmt
2471 }
2472
2473 case MFEMUL_WORK:{
2474 if (len == 0) {
2475 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2476 break;
2477 }
2478
2479 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2480
2481 if(encrypted_data) {
2482 // decrypt seqence
2483 mf_crypto1_decrypt(pcs, receivedCmd, len);
2484 }
2485
2486 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2487 authTimer = GetTickCount();
2488 cardAUTHSC = receivedCmd[1] / 4; // received block num
2489 cardAUTHKEY = receivedCmd[0] - 0x60;
2490 crypto1_destroy(pcs);//Added by martin
2491 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2492
2493 if (!encrypted_data) { // first authentication
2494 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2495
2496 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2497 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2498 } else { // nested authentication
2499 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2500 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2501 num_to_bytes(ans, 4, rAUTH_AT);
2502 }
2503 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2504 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2505 cardSTATE = MFEMUL_AUTH1;
2506 break;
2507 }
2508
2509 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2510 // BUT... ACK --> NACK
2511 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2512 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2513 break;
2514 }
2515
2516 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2517 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2518 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2519 break;
2520 }
2521
2522 if(len != 4) {
2523 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2524 break;
2525 }
2526
2527 if(receivedCmd[0] == 0x30 // read block
2528 || receivedCmd[0] == 0xA0 // write block
2529 || receivedCmd[0] == 0xC0 // inc
2530 || receivedCmd[0] == 0xC1 // dec
2531 || receivedCmd[0] == 0xC2 // restore
2532 || receivedCmd[0] == 0xB0) { // transfer
2533 if (receivedCmd[1] >= 16 * 4) {
2534 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2535 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2536 break;
2537 }
2538
2539 if (receivedCmd[1] / 4 != cardAUTHSC) {
2540 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2541 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2542 break;
2543 }
2544 }
2545 // read block
2546 if (receivedCmd[0] == 0x30) {
2547 if (MF_DBGLEVEL >= 4) {
2548 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2549 }
2550 emlGetMem(response, receivedCmd[1], 1);
2551 AppendCrc14443a(response, 16);
2552 mf_crypto1_encrypt(pcs, response, 18, response_par);
2553 EmSendCmdPar(response, 18, response_par);
2554 numReads++;
2555 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
2556 Dbprintf("%d reads done, exiting", numReads);
2557 finished = true;
2558 }
2559 break;
2560 }
2561 // write block
2562 if (receivedCmd[0] == 0xA0) {
2563 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2564 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2565 cardSTATE = MFEMUL_WRITEBL2;
2566 cardWRBL = receivedCmd[1];
2567 break;
2568 }
2569 // increment, decrement, restore
2570 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2571 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2572 if (emlCheckValBl(receivedCmd[1])) {
2573 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2574 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2575 break;
2576 }
2577 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2578 if (receivedCmd[0] == 0xC1)
2579 cardSTATE = MFEMUL_INTREG_INC;
2580 if (receivedCmd[0] == 0xC0)
2581 cardSTATE = MFEMUL_INTREG_DEC;
2582 if (receivedCmd[0] == 0xC2)
2583 cardSTATE = MFEMUL_INTREG_REST;
2584 cardWRBL = receivedCmd[1];
2585 break;
2586 }
2587 // transfer
2588 if (receivedCmd[0] == 0xB0) {
2589 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2590 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2591 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2592 else
2593 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2594 break;
2595 }
2596 // halt
2597 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2598 LED_B_OFF();
2599 LED_C_OFF();
2600 cardSTATE = MFEMUL_HALTED;
2601 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2602 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2603 break;
2604 }
2605 // RATS
2606 if (receivedCmd[0] == 0xe0) {//RATS
2607 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2608 break;
2609 }
2610 // command not allowed
2611 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2612 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2613 break;
2614 }
2615 case MFEMUL_WRITEBL2:{
2616 if (len == 18){
2617 mf_crypto1_decrypt(pcs, receivedCmd, len);
2618 emlSetMem(receivedCmd, cardWRBL, 1);
2619 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2620 cardSTATE = MFEMUL_WORK;
2621 } else {
2622 cardSTATE_TO_IDLE();
2623 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2624 }
2625 break;
2626 }
2627
2628 case MFEMUL_INTREG_INC:{
2629 mf_crypto1_decrypt(pcs, receivedCmd, len);
2630 memcpy(&ans, receivedCmd, 4);
2631 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2632 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2633 cardSTATE_TO_IDLE();
2634 break;
2635 }
2636 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2637 cardINTREG = cardINTREG + ans;
2638 cardSTATE = MFEMUL_WORK;
2639 break;
2640 }
2641 case MFEMUL_INTREG_DEC:{
2642 mf_crypto1_decrypt(pcs, receivedCmd, len);
2643 memcpy(&ans, receivedCmd, 4);
2644 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2645 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2646 cardSTATE_TO_IDLE();
2647 break;
2648 }
2649 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2650 cardINTREG = cardINTREG - ans;
2651 cardSTATE = MFEMUL_WORK;
2652 break;
2653 }
2654 case MFEMUL_INTREG_REST:{
2655 mf_crypto1_decrypt(pcs, receivedCmd, len);
2656 memcpy(&ans, receivedCmd, 4);
2657 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2658 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2659 cardSTATE_TO_IDLE();
2660 break;
2661 }
2662 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2663 cardSTATE = MFEMUL_WORK;
2664 break;
2665 }
2666 }
2667 }
2668
2669 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2670 LEDsoff();
2671
2672 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2673 {
2674 //May just aswell send the collected ar_nr in the response aswell
2675 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2676 }
2677
2678 if(flags & FLAG_NR_AR_ATTACK)
2679 {
2680 if(ar_nr_collected > 1) {
2681 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2682 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
2683 ar_nr_responses[0], // UID
2684 ar_nr_responses[1], //NT
2685 ar_nr_responses[2], //AR1
2686 ar_nr_responses[3], //NR1
2687 ar_nr_responses[6], //AR2
2688 ar_nr_responses[7] //NR2
2689 );
2690 } else {
2691 Dbprintf("Failed to obtain two AR/NR pairs!");
2692 if(ar_nr_collected >0) {
2693 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2694 ar_nr_responses[0], // UID
2695 ar_nr_responses[1], //NT
2696 ar_nr_responses[2], //AR1
2697 ar_nr_responses[3] //NR1
2698 );
2699 }
2700 }
2701 }
2702 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
2703 }
2704
2705
2706
2707 //-----------------------------------------------------------------------------
2708 // MIFARE sniffer.
2709 //
2710 //-----------------------------------------------------------------------------
2711 void RAMFUNC SniffMifare(uint8_t param) {
2712 // param:
2713 // bit 0 - trigger from first card answer
2714 // bit 1 - trigger from first reader 7-bit request
2715
2716 // C(red) A(yellow) B(green)
2717 LEDsoff();
2718 // init trace buffer
2719 iso14a_clear_trace();
2720 iso14a_set_tracing(TRUE);
2721
2722 // The command (reader -> tag) that we're receiving.
2723 // The length of a received command will in most cases be no more than 18 bytes.
2724 // So 32 should be enough!
2725 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2726 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
2727 // The response (tag -> reader) that we're receiving.
2728 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2729 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
2730
2731 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2732 // into trace, along with its length and other annotations.
2733 //uint8_t *trace = (uint8_t *)BigBuf;
2734
2735 // The DMA buffer, used to stream samples from the FPGA
2736 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2737 uint8_t *data = dmaBuf;
2738 uint8_t previous_data = 0;
2739 int maxDataLen = 0;
2740 int dataLen = 0;
2741 bool ReaderIsActive = FALSE;
2742 bool TagIsActive = FALSE;
2743
2744 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2745
2746 // Set up the demodulator for tag -> reader responses.
2747 DemodInit(receivedResponse, receivedResponsePar);
2748
2749 // Set up the demodulator for the reader -> tag commands
2750 UartInit(receivedCmd, receivedCmdPar);
2751
2752 // Setup for the DMA.
2753 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2754
2755 LED_D_OFF();
2756
2757 // init sniffer
2758 MfSniffInit();
2759
2760 // And now we loop, receiving samples.
2761 for(uint32_t sniffCounter = 0; TRUE; ) {
2762
2763 if(BUTTON_PRESS()) {
2764 DbpString("cancelled by button");
2765 break;
2766 }
2767
2768 LED_A_ON();
2769 WDT_HIT();
2770
2771 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2772 // check if a transaction is completed (timeout after 2000ms).
2773 // if yes, stop the DMA transfer and send what we have so far to the client
2774 if (MfSniffSend(2000)) {
2775 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2776 sniffCounter = 0;
2777 data = dmaBuf;
2778 maxDataLen = 0;
2779 ReaderIsActive = FALSE;
2780 TagIsActive = FALSE;
2781 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2782 }
2783 }
2784
2785 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2786 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2787 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2788 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2789 } else {
2790 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
2791 }
2792 // test for length of buffer
2793 if(dataLen > maxDataLen) { // we are more behind than ever...
2794 maxDataLen = dataLen;
2795 if(dataLen > 400) {
2796 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
2797 break;
2798 }
2799 }
2800 if(dataLen < 1) continue;
2801
2802 // primary buffer was stopped ( <-- we lost data!
2803 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2804 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2805 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
2806 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
2807 }
2808 // secondary buffer sets as primary, secondary buffer was stopped
2809 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2810 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
2811 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2812 }
2813
2814 LED_A_OFF();
2815
2816 if (sniffCounter & 0x01) {
2817
2818 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2819 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2820 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2821 LED_C_INV();
2822 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
2823
2824 /* And ready to receive another command. */
2825 UartReset();
2826
2827 /* And also reset the demod code */
2828 DemodReset();
2829 }
2830 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2831 }
2832
2833 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2834 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2835 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2836 LED_C_INV();
2837
2838 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
2839
2840 // And ready to receive another response.
2841 DemodReset();
2842 }
2843 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2844 }
2845 }
2846
2847 previous_data = *data;
2848 sniffCounter++;
2849 data++;
2850 if(data == dmaBuf + DMA_BUFFER_SIZE) {
2851 data = dmaBuf;
2852 }
2853
2854 } // main cycle
2855
2856 DbpString("COMMAND FINISHED");
2857
2858 FpgaDisableSscDma();
2859 MfSniffEnd();
2860
2861 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
2862 LEDsoff();
2863 }
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