1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
5 // at your option, any later version. See the LICENSE.txt file for the text of
7 //-----------------------------------------------------------------------------
8 // Routines to support ISO 14443B. This includes both the reader software and
9 // the `fake tag' modes.
10 //-----------------------------------------------------------------------------
12 #include "proxmark3.h"
17 #include "iso14443crc.h"
19 #define RECEIVE_SAMPLES_TIMEOUT 2000
20 #define ISO14443B_DMA_BUFFER_SIZE 256
22 // PCB Block number for APDUs
23 static uint8_t pcb_blocknum
= 0;
25 //=============================================================================
26 // An ISO 14443 Type B tag. We listen for commands from the reader, using
27 // a UART kind of thing that's implemented in software. When we get a
28 // frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
29 // If it's good, then we can do something appropriate with it, and send
31 //=============================================================================
33 //-----------------------------------------------------------------------------
34 // Code up a string of octets at layer 2 (including CRC, we don't generate
35 // that here) so that they can be transmitted to the reader. Doesn't transmit
36 // them yet, just leaves them ready to send in ToSend[].
37 //-----------------------------------------------------------------------------
38 static void CodeIso14443bAsTag(const uint8_t *cmd
, int len
)
44 // Transmit a burst of ones, as the initial thing that lets the
45 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
46 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
48 for(i
= 0; i
< 20; i
++) {
56 for(i
= 0; i
< 10; i
++) {
62 for(i
= 0; i
< 2; i
++) {
69 for(i
= 0; i
< len
; i
++) {
80 for(j
= 0; j
< 8; j
++) {
103 for(i
= 0; i
< 10; i
++) {
109 for(i
= 0; i
< 2; i
++) {
116 // Convert from last byte pos to length
120 //-----------------------------------------------------------------------------
121 // The software UART that receives commands from the reader, and its state
123 //-----------------------------------------------------------------------------
127 STATE_GOT_FALLING_EDGE_OF_SOF
,
128 STATE_AWAITING_START_BIT
,
139 /* Receive & handle a bit coming from the reader.
141 * This function is called 4 times per bit (every 2 subcarrier cycles).
142 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
145 * LED A -> ON once we have received the SOF and are expecting the rest.
146 * LED A -> OFF once we have received EOF or are in error state or unsynced
148 * Returns: true if we received a EOF
149 * false if we are still waiting for some more
151 static RAMFUNC
int Handle14443bUartBit(uint8_t bit
)
156 // we went low, so this could be the beginning
158 Uart
.state
= STATE_GOT_FALLING_EDGE_OF_SOF
;
164 case STATE_GOT_FALLING_EDGE_OF_SOF
:
166 if(Uart
.posCnt
== 2) { // sample every 4 1/fs in the middle of a bit
168 if(Uart
.bitCnt
> 9) {
169 // we've seen enough consecutive
170 // zeros that it's a valid SOF
173 Uart
.state
= STATE_AWAITING_START_BIT
;
174 LED_A_ON(); // Indicate we got a valid SOF
176 // didn't stay down long enough
177 // before going high, error
178 Uart
.state
= STATE_UNSYNCD
;
181 // do nothing, keep waiting
185 if(Uart
.posCnt
>= 4) Uart
.posCnt
= 0;
186 if(Uart
.bitCnt
> 12) {
187 // Give up if we see too many zeros without
190 Uart
.state
= STATE_UNSYNCD
;
194 case STATE_AWAITING_START_BIT
:
197 if(Uart
.posCnt
> 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
198 // stayed high for too long between
200 Uart
.state
= STATE_UNSYNCD
;
203 // falling edge, this starts the data byte
207 Uart
.state
= STATE_RECEIVING_DATA
;
211 case STATE_RECEIVING_DATA
:
213 if(Uart
.posCnt
== 2) {
214 // time to sample a bit
217 Uart
.shiftReg
|= 0x200;
221 if(Uart
.posCnt
>= 4) {
224 if(Uart
.bitCnt
== 10) {
225 if((Uart
.shiftReg
& 0x200) && !(Uart
.shiftReg
& 0x001))
227 // this is a data byte, with correct
228 // start and stop bits
229 Uart
.output
[Uart
.byteCnt
] = (Uart
.shiftReg
>> 1) & 0xff;
232 if(Uart
.byteCnt
>= Uart
.byteCntMax
) {
233 // Buffer overflowed, give up
235 Uart
.state
= STATE_UNSYNCD
;
237 // so get the next byte now
239 Uart
.state
= STATE_AWAITING_START_BIT
;
241 } else if (Uart
.shiftReg
== 0x000) {
242 // this is an EOF byte
243 LED_A_OFF(); // Finished receiving
244 Uart
.state
= STATE_UNSYNCD
;
245 if (Uart
.byteCnt
!= 0) {
251 Uart
.state
= STATE_UNSYNCD
;
258 Uart
.state
= STATE_UNSYNCD
;
266 static void UartReset()
268 Uart
.byteCntMax
= MAX_FRAME_SIZE
;
269 Uart
.state
= STATE_UNSYNCD
;
275 static void UartInit(uint8_t *data
)
282 //-----------------------------------------------------------------------------
283 // Receive a command (from the reader to us, where we are the simulated tag),
284 // and store it in the given buffer, up to the given maximum length. Keeps
285 // spinning, waiting for a well-framed command, until either we get one
286 // (returns true) or someone presses the pushbutton on the board (false).
288 // Assume that we're called with the SSC (to the FPGA) and ADC path set
290 //-----------------------------------------------------------------------------
291 static int GetIso14443bCommandFromReader(uint8_t *received
, uint16_t *len
)
293 // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen
294 // only, since we are receiving, not transmitting).
295 // Signal field is off with the appropriate LED
297 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR
| FPGA_HF_SIMULATOR_NO_MODULATION
);
299 // Now run a `software UART' on the stream of incoming samples.
305 if(BUTTON_PRESS()) return false;
307 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
308 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
309 for(uint8_t mask
= 0x80; mask
!= 0x00; mask
>>= 1) {
310 if(Handle14443bUartBit(b
& mask
)) {
321 //-----------------------------------------------------------------------------
322 // Main loop of simulated tag: receive commands from reader, decide what
323 // response to send, and send it.
324 //-----------------------------------------------------------------------------
325 void SimulateIso14443bTag(void)
327 // the only commands we understand is WUPB, AFI=0, Select All, N=1:
328 static const uint8_t cmd1
[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB
329 // ... and REQB, AFI=0, Normal Request, N=1:
330 static const uint8_t cmd2
[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB
332 static const uint8_t cmd3
[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB
334 static const uint8_t cmd4
[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
336 // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
337 // supports only 106kBit/s in both directions, max frame size = 32Bytes,
338 // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
339 static const uint8_t response1
[] = {
340 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
341 0x00, 0x21, 0x85, 0x5e, 0xd7
343 // response to HLTB and ATTRIB
344 static const uint8_t response2
[] = {0x00, 0x78, 0xF0};
347 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
354 uint16_t respLen
, respCodeLen
;
356 // allocate command receive buffer
358 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
361 uint16_t cmdsRecvd
= 0;
363 // prepare the (only one) tag answer:
364 CodeIso14443bAsTag(response1
, sizeof(response1
));
365 uint8_t *resp1Code
= BigBuf_malloc(ToSendMax
);
366 memcpy(resp1Code
, ToSend
, ToSendMax
);
367 uint16_t resp1CodeLen
= ToSendMax
;
369 // prepare the (other) tag answer:
370 CodeIso14443bAsTag(response2
, sizeof(response2
));
371 uint8_t *resp2Code
= BigBuf_malloc(ToSendMax
);
372 memcpy(resp2Code
, ToSend
, ToSendMax
);
373 uint16_t resp2CodeLen
= ToSendMax
;
375 // We need to listen to the high-frequency, peak-detected path.
376 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
383 if(!GetIso14443bCommandFromReader(receivedCmd
, &len
)) {
384 Dbprintf("button pressed, received %d commands", cmdsRecvd
);
389 uint8_t parity
[MAX_PARITY_SIZE
];
390 LogTrace(receivedCmd
, len
, 0, 0, parity
, true);
393 // Good, look at the command now.
394 if ( (len
== sizeof(cmd1
) && memcmp(receivedCmd
, cmd1
, len
) == 0)
395 || (len
== sizeof(cmd2
) && memcmp(receivedCmd
, cmd2
, len
) == 0) ) {
397 respLen
= sizeof(response1
);
398 respCode
= resp1Code
;
399 respCodeLen
= resp1CodeLen
;
400 } else if ( (len
== sizeof(cmd3
) && receivedCmd
[0] == cmd3
[0])
401 || (len
== sizeof(cmd4
) && receivedCmd
[0] == cmd4
[0]) ) {
403 respLen
= sizeof(response2
);
404 respCode
= resp2Code
;
405 respCodeLen
= resp2CodeLen
;
407 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len
, cmdsRecvd
);
408 // And print whether the CRC fails, just for good measure
410 if (len
>= 3){ // if crc exists
411 ComputeCrc14443(CRC_14443_B
, receivedCmd
, len
-2, &b1
, &b2
);
412 if(b1
!= receivedCmd
[len
-2] || b2
!= receivedCmd
[len
-1]) {
413 // Not so good, try again.
414 DbpString("+++CRC fail");
417 DbpString("CRC passes");
420 //get rid of compiler warning
424 respCode
= resp1Code
;
425 //don't crash at new command just wait and see if reader will send other new cmds.
431 if(cmdsRecvd
> 0x30) {
432 DbpString("many commands later...");
436 if(respCodeLen
<= 0) continue;
439 // Signal field is off with the appropriate LED
441 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR
| FPGA_HF_SIMULATOR_MODULATE_BPSK
);
442 AT91C_BASE_SSC
->SSC_THR
= 0xff;
445 // Transmit the response.
448 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
449 uint8_t b
= respCode
[i
];
451 AT91C_BASE_SSC
->SSC_THR
= b
;
454 if(i
> respCodeLen
) {
458 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
459 volatile uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
464 // trace the response:
466 uint8_t parity
[MAX_PARITY_SIZE
];
467 LogTrace(resp
, respLen
, 0, 0, parity
, false);
473 //=============================================================================
474 // An ISO 14443 Type B reader. We take layer two commands, code them
475 // appropriately, and then send them to the tag. We then listen for the
476 // tag's response, which we leave in the buffer to be demodulated on the
478 //=============================================================================
483 DEMOD_PHASE_REF_TRAINING
,
484 DEMOD_AWAITING_FALLING_EDGE_OF_SOF
,
485 DEMOD_GOT_FALLING_EDGE_OF_SOF
,
486 DEMOD_AWAITING_START_BIT
,
492 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
504 * Handles reception of a bit from the tag
506 * This function is called 2 times per bit (every 4 subcarrier cycles).
507 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us
510 * LED C -> ON once we have received the SOF and are expecting the rest.
511 * LED C -> OFF once we have received EOF or are unsynced
513 * Returns: true if we received a EOF
514 * false if we are still waiting for some more
517 static RAMFUNC
int Handle14443bSamplesDemod(int ci
, int cq
)
521 // The soft decision on the bit uses an estimate of just the
522 // quadrant of the reference angle, not the exact angle.
523 #define MAKE_SOFT_DECISION() { \
524 if(Demod.sumI > 0) { \
529 if(Demod.sumQ > 0) { \
536 #define SUBCARRIER_DETECT_THRESHOLD 8
538 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
539 /* #define CHECK_FOR_SUBCARRIER() { \
549 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
551 //note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow
552 #define CHECK_FOR_SUBCARRIER() { \
553 v = MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2); \
557 if(cq < 0) { \ // ci < 0, cq < 0
559 v = -cq - (ci >> 1); \
561 v = -ci - (cq >> 1); \
563 } else { \ // ci < 0, cq >= 0
565 v = -ci + (cq >> 1); \
567 v = cq - (ci >> 1); \
571 if(cq < 0) { \ // ci >= 0, cq < 0
573 v = ci - (cq >> 1); \
575 v = -cq + (ci >> 1); \
577 } else { \ // ci >= 0, cq >= 0
579 v = ci + (cq >> 1); \
581 v = cq + (ci >> 1); \
588 switch(Demod
.state
) {
590 CHECK_FOR_SUBCARRIER();
591 if(v
> SUBCARRIER_DETECT_THRESHOLD
) { // subcarrier detected
592 Demod
.state
= DEMOD_PHASE_REF_TRAINING
;
599 case DEMOD_PHASE_REF_TRAINING
:
600 if(Demod
.posCount
< 8) {
601 CHECK_FOR_SUBCARRIER();
602 if (v
> SUBCARRIER_DETECT_THRESHOLD
) {
603 // set the reference phase (will code a logic '1') by averaging over 32 1/fs.
604 // note: synchronization time > 80 1/fs
608 } else { // subcarrier lost
609 Demod
.state
= DEMOD_UNSYNCD
;
612 Demod
.state
= DEMOD_AWAITING_FALLING_EDGE_OF_SOF
;
616 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF
:
617 MAKE_SOFT_DECISION();
618 if(v
< 0) { // logic '0' detected
619 Demod
.state
= DEMOD_GOT_FALLING_EDGE_OF_SOF
;
620 Demod
.posCount
= 0; // start of SOF sequence
622 if(Demod
.posCount
> 200/4) { // maximum length of TR1 = 200 1/fs
623 Demod
.state
= DEMOD_UNSYNCD
;
629 case DEMOD_GOT_FALLING_EDGE_OF_SOF
:
631 MAKE_SOFT_DECISION();
633 if(Demod
.posCount
< 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
634 Demod
.state
= DEMOD_UNSYNCD
;
636 LED_C_ON(); // Got SOF
637 Demod
.state
= DEMOD_AWAITING_START_BIT
;
640 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
646 if(Demod
.posCount
> 12*2) { // low phase of SOF too long (> 12 etu)
647 Demod
.state
= DEMOD_UNSYNCD
;
653 case DEMOD_AWAITING_START_BIT
:
655 MAKE_SOFT_DECISION();
657 if(Demod
.posCount
> 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
658 Demod
.state
= DEMOD_UNSYNCD
;
661 } else { // start bit detected
663 Demod
.posCount
= 1; // this was the first half
666 Demod
.state
= DEMOD_RECEIVING_DATA
;
670 case DEMOD_RECEIVING_DATA
:
671 MAKE_SOFT_DECISION();
672 if(Demod
.posCount
== 0) { // first half of bit
675 } else { // second half of bit
678 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
679 if(Demod.thisBit > 0) {
680 Demod.metric += Demod.thisBit;
682 Demod.metric -= Demod.thisBit;
687 Demod
.shiftReg
>>= 1;
688 if(Demod
.thisBit
> 0) { // logic '1'
689 Demod
.shiftReg
|= 0x200;
693 if(Demod
.bitCount
== 10) {
694 uint16_t s
= Demod
.shiftReg
;
695 if((s
& 0x200) && !(s
& 0x001)) { // stop bit == '1', start bit == '0'
696 uint8_t b
= (s
>> 1);
697 Demod
.output
[Demod
.len
] = b
;
699 Demod
.state
= DEMOD_AWAITING_START_BIT
;
701 Demod
.state
= DEMOD_UNSYNCD
;
704 // This is EOF (start, stop and all data bits == '0'
714 Demod
.state
= DEMOD_UNSYNCD
;
723 static void DemodReset()
725 // Clear out the state of the "UART" that receives from the tag.
727 Demod
.state
= DEMOD_UNSYNCD
;
729 memset(Demod
.output
, 0x00, MAX_FRAME_SIZE
);
733 static void DemodInit(uint8_t *data
)
741 * Demodulate the samples we received from the tag, also log to tracebuffer
742 * quiet: set to 'true' to disable debug output
744 static void GetSamplesFor14443bDemod(int n
, bool quiet
)
747 bool gotFrame
= false;
748 int lastRxCounter
, ci
, cq
, samples
= 0;
750 // Allocate memory from BigBuf for some buffers
751 // free all previous allocations first
754 // The response (tag -> reader) that we're receiving.
755 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
757 // The DMA buffer, used to stream samples from the FPGA
758 int8_t *dmaBuf
= (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE
);
760 // Set up the demodulator for tag -> reader responses.
761 DemodInit(receivedResponse
);
763 // Setup and start DMA.
764 FpgaSetupSscDma((uint8_t*) dmaBuf
, ISO14443B_DMA_BUFFER_SIZE
);
766 int8_t *upTo
= dmaBuf
;
767 lastRxCounter
= ISO14443B_DMA_BUFFER_SIZE
;
769 // Signal field is ON with the appropriate LED:
771 // And put the FPGA in the appropriate mode
772 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
);
775 int behindBy
= lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
776 if(behindBy
> max
) max
= behindBy
;
778 while(((lastRxCounter
-AT91C_BASE_PDC_SSC
->PDC_RCR
) & (ISO14443B_DMA_BUFFER_SIZE
-1)) > 2) {
782 if(upTo
>= dmaBuf
+ ISO14443B_DMA_BUFFER_SIZE
) {
784 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) upTo
;
785 AT91C_BASE_PDC_SSC
->PDC_RNCR
= ISO14443B_DMA_BUFFER_SIZE
;
788 if(lastRxCounter
<= 0) {
789 lastRxCounter
+= ISO14443B_DMA_BUFFER_SIZE
;
794 if(Handle14443bSamplesDemod(ci
, cq
)) {
800 if(samples
> n
|| gotFrame
) {
805 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
807 if (!quiet
) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max
, samples
, gotFrame
, Demod
.len
, Demod
.sumI
, Demod
.sumQ
);
809 if (tracing
&& Demod
.len
> 0) {
810 uint8_t parity
[MAX_PARITY_SIZE
];
811 LogTrace(Demod
.output
, Demod
.len
, 0, 0, parity
, false);
816 //-----------------------------------------------------------------------------
817 // Transmit the command (to the tag) that was placed in ToSend[].
818 //-----------------------------------------------------------------------------
819 static void TransmitFor14443b(void)
825 while(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
826 AT91C_BASE_SSC
->SSC_THR
= 0xff;
829 // Signal field is ON with the appropriate Red LED
831 // Signal we are transmitting with the Green LED
833 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX
| FPGA_HF_READER_TX_SHALLOW_MOD
);
835 for(c
= 0; c
< 10;) {
836 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
837 AT91C_BASE_SSC
->SSC_THR
= 0xff;
840 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
841 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
849 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
850 AT91C_BASE_SSC
->SSC_THR
= ToSend
[c
];
856 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
857 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
862 LED_B_OFF(); // Finished sending
866 //-----------------------------------------------------------------------------
867 // Code a layer 2 command (string of octets, including CRC) into ToSend[],
868 // so that it is ready to transmit to the tag using TransmitFor14443b().
869 //-----------------------------------------------------------------------------
870 static void CodeIso14443bAsReader(const uint8_t *cmd
, int len
)
877 // Establish initial reference level
878 for(i
= 0; i
< 40; i
++) {
882 for(i
= 0; i
< 10; i
++) {
886 for(i
= 0; i
< len
; i
++) {
894 for(j
= 0; j
< 8; j
++) {
905 for(i
= 0; i
< 10; i
++) {
908 for(i
= 0; i
< 8; i
++) {
912 // And then a little more, to make sure that the last character makes
913 // it out before we switch to rx mode.
914 for(i
= 0; i
< 24; i
++) {
918 // Convert from last character reference to length
924 Convenience function to encode, transmit and trace iso 14443b comms
926 static void CodeAndTransmit14443bAsReader(const uint8_t *cmd
, int len
)
928 CodeIso14443bAsReader(cmd
, len
);
931 uint8_t parity
[MAX_PARITY_SIZE
];
932 LogTrace(cmd
,len
, 0, 0, parity
, true);
936 /* Sends an APDU to the tag
937 * TODO: check CRC and preamble
939 int iso14443b_apdu(uint8_t const *message
, size_t message_length
, uint8_t *response
)
941 uint8_t message_frame
[message_length
+ 4];
943 message_frame
[0] = 0x0A | pcb_blocknum
;
946 message_frame
[1] = 0;
948 memcpy(message_frame
+ 2, message
, message_length
);
950 ComputeCrc14443(CRC_14443_B
, message_frame
, message_length
+ 2, &message_frame
[message_length
+ 2], &message_frame
[message_length
+ 3]);
952 CodeAndTransmit14443bAsReader(message_frame
, message_length
+ 4);
954 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
*100, true);
960 // copy response contents
963 memcpy(response
, Demod
.output
, Demod
.len
);
968 /* Perform the ISO 14443 B Card Selection procedure
969 * Currently does NOT do any collision handling.
970 * It expects 0-1 cards in the device's range.
971 * TODO: Support multiple cards (perform anticollision)
972 * TODO: Verify CRC checksums
974 int iso14443b_select_card()
976 // WUPB command (including CRC)
977 // Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state
978 static const uint8_t wupb
[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
979 // ATTRIB command (with space for CRC)
980 uint8_t attrib
[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00};
982 // first, wake up the tag
983 CodeAndTransmit14443bAsReader(wupb
, sizeof(wupb
));
984 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, true);
992 // copy the PUPI to ATTRIB
993 memcpy(attrib
+ 1, Demod
.output
+ 1, 4);
994 /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into
996 attrib
[7] = Demod
.output
[10] & 0x0F;
997 ComputeCrc14443(CRC_14443_B
, attrib
, 9, attrib
+ 9, attrib
+ 10);
998 CodeAndTransmit14443bAsReader(attrib
, sizeof(attrib
));
999 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, true);
1000 // Answer to ATTRIB too short?
1005 // reset PCB block number
1010 // Set up ISO 14443 Type B communication (similar to iso14443a_setup)
1011 void iso14443b_setup() {
1012 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1013 // Set up the synchronous serial port
1015 // connect Demodulated Signal to ADC:
1016 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1018 // Signal field is on with the appropriate LED
1020 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX
| FPGA_HF_READER_TX_SHALLOW_MOD
);
1029 //-----------------------------------------------------------------------------
1030 // Read a SRI512 ISO 14443B tag.
1032 // SRI512 tags are just simple memory tags, here we're looking at making a dump
1033 // of the contents of the memory. No anticollision algorithm is done, we assume
1034 // we have a single tag in the field.
1036 // I tried to be systematic and check every answer of the tag, every CRC, etc...
1037 //-----------------------------------------------------------------------------
1038 void ReadSTMemoryIso14443b(uint32_t dwLast
)
1042 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1043 // Make sure that we start from off, since the tags are stateful;
1044 // confusing things will happen if we don't reset them between reads.
1046 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1049 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1052 // Now give it time to spin up.
1053 // Signal field is on with the appropriate LED
1055 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
);
1061 // First command: wake up the tag using the INITIATE command
1062 uint8_t cmd1
[] = {0x06, 0x00, 0x97, 0x5b};
1063 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
1064 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, true);
1066 if (Demod
.len
== 0) {
1067 DbpString("No response from tag");
1070 Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x",
1071 Demod
.output
[0], Demod
.output
[1], Demod
.output
[2]);
1074 // There is a response, SELECT the uid
1075 DbpString("Now SELECT tag:");
1076 cmd1
[0] = 0x0E; // 0x0E is SELECT
1077 cmd1
[1] = Demod
.output
[0];
1078 ComputeCrc14443(CRC_14443_B
, cmd1
, 2, &cmd1
[2], &cmd1
[3]);
1079 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
1080 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, true);
1081 if (Demod
.len
!= 3) {
1082 Dbprintf("Expected 3 bytes from tag, got %d", Demod
.len
);
1085 // Check the CRC of the answer:
1086 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 1 , &cmd1
[2], &cmd1
[3]);
1087 if(cmd1
[2] != Demod
.output
[1] || cmd1
[3] != Demod
.output
[2]) {
1088 DbpString("CRC Error reading select response.");
1091 // Check response from the tag: should be the same UID as the command we just sent:
1092 if (cmd1
[1] != Demod
.output
[0]) {
1093 Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1
[1], Demod
.output
[0]);
1097 // Tag is now selected,
1098 // First get the tag's UID:
1100 ComputeCrc14443(CRC_14443_B
, cmd1
, 1 , &cmd1
[1], &cmd1
[2]);
1101 CodeAndTransmit14443bAsReader(cmd1
, 3); // Only first three bytes for this one
1102 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, true);
1103 if (Demod
.len
!= 10) {
1104 Dbprintf("Expected 10 bytes from tag, got %d", Demod
.len
);
1107 // The check the CRC of the answer (use cmd1 as temporary variable):
1108 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 8, &cmd1
[2], &cmd1
[3]);
1109 if(cmd1
[2] != Demod
.output
[8] || cmd1
[3] != Demod
.output
[9]) {
1110 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
1111 (cmd1
[2]<<8)+cmd1
[3], (Demod
.output
[8]<<8)+Demod
.output
[9]);
1112 // Do not return;, let's go on... (we should retry, maybe ?)
1114 Dbprintf("Tag UID (64 bits): %08x %08x",
1115 (Demod
.output
[7]<<24) + (Demod
.output
[6]<<16) + (Demod
.output
[5]<<8) + Demod
.output
[4],
1116 (Demod
.output
[3]<<24) + (Demod
.output
[2]<<16) + (Demod
.output
[1]<<8) + Demod
.output
[0]);
1118 // Now loop to read all 16 blocks, address from 0 to last block
1119 Dbprintf("Tag memory dump, block 0 to %d", dwLast
);
1125 DbpString("System area block (0xff):");
1129 ComputeCrc14443(CRC_14443_B
, cmd1
, 2, &cmd1
[2], &cmd1
[3]);
1130 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
1131 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, true);
1132 if (Demod
.len
!= 6) { // Check if we got an answer from the tag
1133 DbpString("Expected 6 bytes from tag, got less...");
1136 // The check the CRC of the answer (use cmd1 as temporary variable):
1137 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 4, &cmd1
[2], &cmd1
[3]);
1138 if(cmd1
[2] != Demod
.output
[4] || cmd1
[3] != Demod
.output
[5]) {
1139 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
1140 (cmd1
[2]<<8)+cmd1
[3], (Demod
.output
[4]<<8)+Demod
.output
[5]);
1141 // Do not return;, let's go on... (we should retry, maybe ?)
1143 // Now print out the memory location:
1144 Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i
,
1145 (Demod
.output
[3]<<24) + (Demod
.output
[2]<<16) + (Demod
.output
[1]<<8) + Demod
.output
[0],
1146 (Demod
.output
[4]<<8)+Demod
.output
[5]);
1155 //=============================================================================
1156 // Finally, the `sniffer' combines elements from both the reader and
1157 // simulated tag, to show both sides of the conversation.
1158 //=============================================================================
1160 //-----------------------------------------------------------------------------
1161 // Record the sequence of commands sent by the reader to the tag, with
1162 // triggering so that we start recording at the point that the tag is moved
1164 //-----------------------------------------------------------------------------
1166 * Memory usage for this function, (within BigBuf)
1167 * Last Received command (reader->tag) - MAX_FRAME_SIZE
1168 * Last Received command (tag->reader) - MAX_FRAME_SIZE
1169 * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE
1170 * Demodulated samples received - all the rest
1172 void RAMFUNC
SnoopIso14443b(void)
1174 // We won't start recording the frames that we acquire until we trigger;
1175 // a good trigger condition to get started is probably when we see a
1176 // response from the tag.
1177 int triggered
= true; // TODO: set and evaluate trigger condition
1179 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1185 // The DMA buffer, used to stream samples from the FPGA
1186 int8_t *dmaBuf
= (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE
);
1190 int maxBehindBy
= 0;
1192 // Count of samples received so far, so that we can include timing
1193 // information in the trace buffer.
1196 DemodInit(BigBuf_malloc(MAX_FRAME_SIZE
));
1197 UartInit(BigBuf_malloc(MAX_FRAME_SIZE
));
1199 // Print some debug information about the buffer sizes
1200 Dbprintf("Snooping buffers initialized:");
1201 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1202 Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE
);
1203 Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE
);
1204 Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE
);
1206 // Signal field is off, no reader signal, no tag signal
1209 // And put the FPGA in the appropriate mode
1210 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
| FPGA_HF_READER_RX_XCORR_SNOOP
);
1211 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1213 // Setup for the DMA.
1216 lastRxCounter
= ISO14443B_DMA_BUFFER_SIZE
;
1217 FpgaSetupSscDma((uint8_t*) dmaBuf
, ISO14443B_DMA_BUFFER_SIZE
);
1218 uint8_t parity
[MAX_PARITY_SIZE
];
1220 bool TagIsActive
= false;
1221 bool ReaderIsActive
= false;
1223 // And now we loop, receiving samples.
1225 int behindBy
= (lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
) &
1226 (ISO14443B_DMA_BUFFER_SIZE
-1);
1227 if(behindBy
> maxBehindBy
) {
1228 maxBehindBy
= behindBy
;
1231 if(behindBy
< 2) continue;
1237 if(upTo
>= dmaBuf
+ ISO14443B_DMA_BUFFER_SIZE
) {
1239 lastRxCounter
+= ISO14443B_DMA_BUFFER_SIZE
;
1240 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
1241 AT91C_BASE_PDC_SSC
->PDC_RNCR
= ISO14443B_DMA_BUFFER_SIZE
;
1243 if(behindBy
> (9*ISO14443B_DMA_BUFFER_SIZE
/10)) { // TODO: understand whether we can increase/decrease as we want or not?
1244 Dbprintf("blew circular buffer! behindBy=%d", behindBy
);
1248 DbpString("Reached trace limit");
1251 if(BUTTON_PRESS()) {
1252 DbpString("cancelled");
1259 if (!TagIsActive
) { // no need to try decoding reader data if the tag is sending
1260 if(Handle14443bUartBit(ci
& 0x01)) {
1261 if(triggered
&& tracing
) {
1262 LogTrace(Uart
.output
, Uart
.byteCnt
, samples
, samples
, parity
, true);
1264 /* And ready to receive another command. */
1266 /* And also reset the demod code, which might have been */
1267 /* false-triggered by the commands from the reader. */
1270 if(Handle14443bUartBit(cq
& 0x01)) {
1271 if(triggered
&& tracing
) {
1272 LogTrace(Uart
.output
, Uart
.byteCnt
, samples
, samples
, parity
, true);
1274 /* And ready to receive another command. */
1276 /* And also reset the demod code, which might have been */
1277 /* false-triggered by the commands from the reader. */
1280 ReaderIsActive
= (Uart
.state
> STATE_GOT_FALLING_EDGE_OF_SOF
);
1283 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
1284 if(Handle14443bSamplesDemod(ci
| 0x01, cq
| 0x01)) {
1286 //Use samples as a time measurement
1289 uint8_t parity
[MAX_PARITY_SIZE
];
1290 LogTrace(Demod
.output
, Demod
.len
, samples
, samples
, parity
, false);
1294 // And ready to receive another response.
1297 TagIsActive
= (Demod
.state
> DEMOD_GOT_FALLING_EDGE_OF_SOF
);
1302 FpgaDisableSscDma();
1304 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
1305 DbpString("Snoop statistics:");
1306 Dbprintf(" Max behind by: %i", maxBehindBy
);
1307 Dbprintf(" Uart State: %x", Uart
.state
);
1308 Dbprintf(" Uart ByteCnt: %i", Uart
.byteCnt
);
1309 Dbprintf(" Uart ByteCntMax: %i", Uart
.byteCntMax
);
1310 Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
1315 * Send raw command to tag ISO14443B
1317 * datalen len of buffer data
1318 * recv bool when true wait for data from tag and send to client
1319 * powerfield bool leave the field on when true
1320 * data buffer with byte to send
1326 void SendRawCommand14443B(uint32_t datalen
, uint32_t recv
, uint8_t powerfield
, uint8_t data
[])
1328 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1329 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1335 CodeAndTransmit14443bAsReader(data
, datalen
);
1338 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, true);
1339 uint16_t iLen
= MIN(Demod
.len
, USB_CMD_DATA_SIZE
);
1340 cmd_send(CMD_ACK
, iLen
, 0, 0, Demod
.output
, iLen
);
1345 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);