1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
13 #include "iso14443a.h"
15 #include "proxmark3.h"
20 #include "iso14443crc.h"
21 #include "crapto1/crapto1.h"
22 #include "mifareutil.h"
23 #include "mifaresniff.h"
25 #include "protocols.h"
32 // DEMOD_MOD_FIRST_HALF,
33 // DEMOD_NOMOD_FIRST_HALF,
39 uint16_t collisionPos
;
46 uint32_t startTime
, endTime
;
61 STATE_START_OF_COMMUNICATION
,
77 uint32_t startTime
, endTime
;
82 static uint32_t iso14a_timeout
;
85 // the block number for the ISO14443-4 PCB
86 static uint8_t iso14_pcb_blocknum
= 0;
91 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
92 #define REQUEST_GUARD_TIME (7000/16 + 1)
93 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
94 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
95 // bool LastCommandWasRequest = false;
98 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
100 // When the PM acts as reader and is receiving tag data, it takes
101 // 3 ticks delay in the AD converter
102 // 16 ticks until the modulation detector completes and sets curbit
103 // 8 ticks until bit_to_arm is assigned from curbit
104 // 8*16 ticks for the transfer from FPGA to ARM
105 // 4*16 ticks until we measure the time
106 // - 8*16 ticks because we measure the time of the previous transfer
107 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
109 // When the PM acts as a reader and is sending, it takes
110 // 4*16 ticks until we can write data to the sending hold register
111 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
112 // 8 ticks until the first transfer starts
113 // 8 ticks later the FPGA samples the data
114 // 1 tick to assign mod_sig_coil
115 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
117 // When the PM acts as tag and is receiving it takes
118 // 2 ticks delay in the RF part (for the first falling edge),
119 // 3 ticks for the A/D conversion,
120 // 8 ticks on average until the start of the SSC transfer,
121 // 8 ticks until the SSC samples the first data
122 // 7*16 ticks to complete the transfer from FPGA to ARM
123 // 8 ticks until the next ssp_clk rising edge
124 // 4*16 ticks until we measure the time
125 // - 8*16 ticks because we measure the time of the previous transfer
126 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
128 // The FPGA will report its internal sending delay in
129 uint16_t FpgaSendQueueDelay
;
130 // the 5 first bits are the number of bits buffered in mod_sig_buf
131 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
132 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
134 // When the PM acts as tag and is sending, it takes
135 // 4*16 ticks until we can write data to the sending hold register
136 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
137 // 8 ticks until the first transfer starts
138 // 8 ticks later the FPGA samples the data
139 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
140 // + 1 tick to assign mod_sig_coil
141 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
143 // When the PM acts as sniffer and is receiving tag data, it takes
144 // 3 ticks A/D conversion
145 // 14 ticks to complete the modulation detection
146 // 8 ticks (on average) until the result is stored in to_arm
147 // + the delays in transferring data - which is the same for
148 // sniffing reader and tag data and therefore not relevant
149 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
151 // When the PM acts as sniffer and is receiving reader data, it takes
152 // 2 ticks delay in analogue RF receiver (for the falling edge of the
153 // start bit, which marks the start of the communication)
154 // 3 ticks A/D conversion
155 // 8 ticks on average until the data is stored in to_arm.
156 // + the delays in transferring data - which is the same for
157 // sniffing reader and tag data and therefore not relevant
158 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
160 //variables used for timing purposes:
161 //these are in ssp_clk cycles:
162 static uint32_t NextTransferTime
;
163 static uint32_t LastTimeProxToAirStart
;
164 static uint32_t LastProxToAirDuration
;
168 // CARD TO READER - manchester
169 // Sequence D: 11110000 modulation with subcarrier during first half
170 // Sequence E: 00001111 modulation with subcarrier during second half
171 // Sequence F: 00000000 no modulation with subcarrier
172 // READER TO CARD - miller
173 // Sequence X: 00001100 drop after half a period
174 // Sequence Y: 00000000 no drop
175 // Sequence Z: 11000000 drop at start
183 void iso14a_set_trigger(bool enable
) {
188 void iso14a_set_timeout(uint32_t timeout
) {
189 iso14a_timeout
= timeout
;
190 if(MF_DBGLEVEL
>= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout
, iso14a_timeout
/ 106);
194 void iso14a_set_ATS_timeout(uint8_t *ats
) {
200 if (ats
[0] > 1) { // there is a format byte T0
201 if ((ats
[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
202 if ((ats
[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1)
207 fwi
= (tb1
& 0xf0) >> 4; // frame waiting indicator (FWI)
208 fwt
= 256 * 16 * (1 << fwi
); // frame waiting time (FWT) in 1/fc
210 iso14a_set_timeout(fwt
/(8*16));
216 //-----------------------------------------------------------------------------
217 // Generate the parity value for a byte sequence
219 //-----------------------------------------------------------------------------
220 void GetParity(const uint8_t *pbtCmd
, uint16_t iLen
, uint8_t *par
)
222 uint16_t paritybit_cnt
= 0;
223 uint16_t paritybyte_cnt
= 0;
224 uint8_t parityBits
= 0;
226 for (uint16_t i
= 0; i
< iLen
; i
++) {
227 // Generate the parity bits
228 parityBits
|= ((oddparity8(pbtCmd
[i
])) << (7-paritybit_cnt
));
229 if (paritybit_cnt
== 7) {
230 par
[paritybyte_cnt
] = parityBits
; // save 8 Bits parity
231 parityBits
= 0; // and advance to next Parity Byte
239 // save remaining parity bits
240 par
[paritybyte_cnt
] = parityBits
;
244 void AppendCrc14443a(uint8_t* data
, int len
)
246 ComputeCrc14443(CRC_14443_A
,data
,len
,data
+len
,data
+len
+1);
249 void AppendCrc14443b(uint8_t* data
, int len
)
251 ComputeCrc14443(CRC_14443_B
,data
,len
,data
+len
,data
+len
+1);
255 //=============================================================================
256 // ISO 14443 Type A - Miller decoder
257 //=============================================================================
259 // This decoder is used when the PM3 acts as a tag.
260 // The reader will generate "pauses" by temporarily switching of the field.
261 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
262 // The FPGA does a comparison with a threshold and would deliver e.g.:
263 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
264 // The Miller decoder needs to identify the following sequences:
265 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
266 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
267 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
268 // Note 1: the bitstream may start at any time. We therefore need to sync.
269 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
270 //-----------------------------------------------------------------------------
273 // Lookup-Table to decide if 4 raw bits are a modulation.
274 // We accept the following:
275 // 0001 - a 3 tick wide pause
276 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
277 // 0111 - a 2 tick wide pause shifted left
278 // 1001 - a 2 tick wide pause shifted right
279 const bool Mod_Miller_LUT
[] = {
280 false, true, false, true, false, false, false, true,
281 false, true, false, false, false, false, false, false
283 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
284 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
288 Uart
.state
= STATE_UNSYNCD
;
290 Uart
.len
= 0; // number of decoded data bytes
291 Uart
.parityLen
= 0; // number of decoded parity bytes
292 Uart
.shiftReg
= 0; // shiftreg to hold decoded data bits
293 Uart
.parityBits
= 0; // holds 8 parity bits
298 void UartInit(uint8_t *data
, uint8_t *parity
)
301 Uart
.parity
= parity
;
302 Uart
.fourBits
= 0x00000000; // clear the buffer for 4 Bits
306 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
307 static RAMFUNC
bool MillerDecoding(uint8_t bit
, uint32_t non_real_time
)
310 Uart
.fourBits
= (Uart
.fourBits
<< 8) | bit
;
312 if (Uart
.state
== STATE_UNSYNCD
) { // not yet synced
314 Uart
.syncBit
= 9999; // not set
315 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
316 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
317 // we therefore look for a ...xx11111111111100x11111xxxxxx... pattern
318 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
319 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00000111 11111111 11101111 10000000
320 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00000111 11111111 10001111 10000000
321 if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 0)) == ISO14443A_STARTBIT_PATTERN
>> 0) Uart
.syncBit
= 7;
322 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 1)) == ISO14443A_STARTBIT_PATTERN
>> 1) Uart
.syncBit
= 6;
323 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 2)) == ISO14443A_STARTBIT_PATTERN
>> 2) Uart
.syncBit
= 5;
324 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 3)) == ISO14443A_STARTBIT_PATTERN
>> 3) Uart
.syncBit
= 4;
325 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 4)) == ISO14443A_STARTBIT_PATTERN
>> 4) Uart
.syncBit
= 3;
326 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 5)) == ISO14443A_STARTBIT_PATTERN
>> 5) Uart
.syncBit
= 2;
327 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 6)) == ISO14443A_STARTBIT_PATTERN
>> 6) Uart
.syncBit
= 1;
328 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 7)) == ISO14443A_STARTBIT_PATTERN
>> 7) Uart
.syncBit
= 0;
330 if (Uart
.syncBit
!= 9999) { // found a sync bit
331 Uart
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
332 Uart
.startTime
-= Uart
.syncBit
;
333 Uart
.endTime
= Uart
.startTime
;
334 Uart
.state
= STATE_START_OF_COMMUNICATION
;
339 if (IsMillerModulationNibble1(Uart
.fourBits
>> Uart
.syncBit
)) {
340 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation in both halves - error
342 } else { // Modulation in first half = Sequence Z = logic "0"
343 if (Uart
.state
== STATE_MILLER_X
) { // error - must not follow after X
347 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
348 Uart
.state
= STATE_MILLER_Z
;
349 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 6;
350 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
351 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
352 Uart
.parityBits
<<= 1; // make room for the parity bit
353 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
356 if((Uart
.len
&0x0007) == 0) { // every 8 data bytes
357 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
364 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation second half = Sequence X = logic "1"
366 Uart
.shiftReg
= (Uart
.shiftReg
>> 1) | 0x100; // add a 1 to the shiftreg
367 Uart
.state
= STATE_MILLER_X
;
368 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 2;
369 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
370 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
371 Uart
.parityBits
<<= 1; // make room for the new parity bit
372 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
375 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
376 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
380 } else { // no modulation in both halves - Sequence Y
381 if (Uart
.state
== STATE_MILLER_Z
|| Uart
.state
== STATE_MILLER_Y
) { // Y after logic "0" - End of Communication
382 Uart
.state
= STATE_UNSYNCD
;
383 Uart
.bitCount
--; // last "0" was part of EOC sequence
384 Uart
.shiftReg
<<= 1; // drop it
385 if(Uart
.bitCount
> 0) { // if we decoded some bits
386 Uart
.shiftReg
>>= (9 - Uart
.bitCount
); // right align them
387 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff); // add last byte to the output
388 Uart
.parityBits
<<= 1; // add a (void) parity bit
389 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align parity bits
390 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store it
392 } else if (Uart
.len
& 0x0007) { // there are some parity bits to store
393 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align remaining parity bits
394 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store them
397 return true; // we are finished with decoding the raw data sequence
399 UartReset(); // Nothing received - start over
402 if (Uart
.state
== STATE_START_OF_COMMUNICATION
) { // error - must not follow directly after SOC
404 } else { // a logic "0"
406 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
407 Uart
.state
= STATE_MILLER_Y
;
408 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
409 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
410 Uart
.parityBits
<<= 1; // make room for the parity bit
411 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
414 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
415 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
425 return false; // not finished yet, need more data
430 //=============================================================================
431 // ISO 14443 Type A - Manchester decoder
432 //=============================================================================
434 // This decoder is used when the PM3 acts as a reader.
435 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
436 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
437 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
438 // The Manchester decoder needs to identify the following sequences:
439 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
440 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
441 // 8 ticks unmodulated: Sequence F = end of communication
442 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
443 // Note 1: the bitstream may start at any time. We therefore need to sync.
444 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
447 // Lookup-Table to decide if 4 raw bits are a modulation.
448 // We accept three or four "1" in any position
449 const bool Mod_Manchester_LUT
[] = {
450 false, false, false, false, false, false, false, true,
451 false, false, false, true, false, true, true, true
454 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
455 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
460 Demod
.state
= DEMOD_UNSYNCD
;
461 Demod
.len
= 0; // number of decoded data bytes
463 Demod
.shiftReg
= 0; // shiftreg to hold decoded data bits
464 Demod
.parityBits
= 0; //
465 Demod
.collisionPos
= 0; // Position of collision bit
466 Demod
.twoBits
= 0xffff; // buffer for 2 Bits
472 void DemodInit(uint8_t *data
, uint8_t *parity
)
475 Demod
.parity
= parity
;
479 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
480 static RAMFUNC
int ManchesterDecoding(uint8_t bit
, uint16_t offset
, uint32_t non_real_time
)
483 Demod
.twoBits
= (Demod
.twoBits
<< 8) | bit
;
485 if (Demod
.state
== DEMOD_UNSYNCD
) {
487 if (Demod
.highCnt
< 2) { // wait for a stable unmodulated signal
488 if (Demod
.twoBits
== 0x0000) {
494 Demod
.syncBit
= 0xFFFF; // not set
495 if ((Demod
.twoBits
& 0x7700) == 0x7000) Demod
.syncBit
= 7;
496 else if ((Demod
.twoBits
& 0x3B80) == 0x3800) Demod
.syncBit
= 6;
497 else if ((Demod
.twoBits
& 0x1DC0) == 0x1C00) Demod
.syncBit
= 5;
498 else if ((Demod
.twoBits
& 0x0EE0) == 0x0E00) Demod
.syncBit
= 4;
499 else if ((Demod
.twoBits
& 0x0770) == 0x0700) Demod
.syncBit
= 3;
500 else if ((Demod
.twoBits
& 0x03B8) == 0x0380) Demod
.syncBit
= 2;
501 else if ((Demod
.twoBits
& 0x01DC) == 0x01C0) Demod
.syncBit
= 1;
502 else if ((Demod
.twoBits
& 0x00EE) == 0x00E0) Demod
.syncBit
= 0;
503 if (Demod
.syncBit
!= 0xFFFF) {
504 Demod
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
505 Demod
.startTime
-= Demod
.syncBit
;
506 Demod
.bitCount
= offset
; // number of decoded data bits
507 Demod
.state
= DEMOD_MANCHESTER_DATA
;
513 if (IsManchesterModulationNibble1(Demod
.twoBits
>> Demod
.syncBit
)) { // modulation in first half
514 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // ... and in second half = collision
515 if (!Demod
.collisionPos
) {
516 Demod
.collisionPos
= (Demod
.len
<< 3) + Demod
.bitCount
;
518 } // modulation in first half only - Sequence D = 1
520 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) | 0x100; // in both cases, add a 1 to the shiftreg
521 if(Demod
.bitCount
== 9) { // if we decoded a full byte (including parity)
522 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
523 Demod
.parityBits
<<= 1; // make room for the parity bit
524 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
527 if((Demod
.len
&0x0007) == 0) { // every 8 data bytes
528 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits
529 Demod
.parityBits
= 0;
532 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1) - 4;
533 } else { // no modulation in first half
534 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // and modulation in second half = Sequence E = 0
536 Demod
.shiftReg
= (Demod
.shiftReg
>> 1); // add a 0 to the shiftreg
537 if(Demod
.bitCount
>= 9) { // if we decoded a full byte (including parity)
538 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
539 Demod
.parityBits
<<= 1; // make room for the new parity bit
540 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
543 if ((Demod
.len
&0x0007) == 0) { // every 8 data bytes
544 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits1
545 Demod
.parityBits
= 0;
548 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1);
549 } else { // no modulation in both halves - End of communication
550 if(Demod
.bitCount
> 0) { // there are some remaining data bits
551 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align the decoded bits
552 Demod
.output
[Demod
.len
++] = Demod
.shiftReg
& 0xff; // and add them to the output
553 Demod
.parityBits
<<= 1; // add a (void) parity bit
554 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
555 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
557 } else if (Demod
.len
& 0x0007) { // there are some parity bits to store
558 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
559 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
562 return true; // we are finished with decoding the raw data sequence
563 } else { // nothing received. Start over
571 return false; // not finished yet, need more data
574 //=============================================================================
575 // Finally, a `sniffer' for ISO 14443 Type A
576 // Both sides of communication!
577 //=============================================================================
579 //-----------------------------------------------------------------------------
580 // Record the sequence of commands sent by the reader to the tag, with
581 // triggering so that we start recording at the point that the tag is moved
583 //-----------------------------------------------------------------------------
584 void RAMFUNC
SnoopIso14443a(uint8_t param
) {
586 // bit 0 - trigger from first card answer
587 // bit 1 - trigger from first reader 7-bit request
591 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
593 // Allocate memory from BigBuf for some buffers
594 // free all previous allocations first
597 // The command (reader -> tag) that we're receiving.
598 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
599 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
601 // The response (tag -> reader) that we're receiving.
602 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
603 uint8_t *receivedResponsePar
= BigBuf_malloc(MAX_PARITY_SIZE
);
605 // The DMA buffer, used to stream samples from the FPGA
606 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
612 uint8_t *data
= dmaBuf
;
613 uint8_t previous_data
= 0;
616 bool TagIsActive
= false;
617 bool ReaderIsActive
= false;
619 // Set up the demodulator for tag -> reader responses.
620 DemodInit(receivedResponse
, receivedResponsePar
);
622 // Set up the demodulator for the reader -> tag commands
623 UartInit(receivedCmd
, receivedCmdPar
);
625 // Setup and start DMA.
626 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
628 // We won't start recording the frames that we acquire until we trigger;
629 // a good trigger condition to get started is probably when we see a
630 // response from the tag.
631 // triggered == false -- to wait first for card
632 bool triggered
= !(param
& 0x03);
634 // And now we loop, receiving samples.
635 for(uint32_t rsamples
= 0; true; ) {
638 DbpString("cancelled by button");
645 int register readBufDataP
= data
- dmaBuf
;
646 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
647 if (readBufDataP
<= dmaBufDataP
){
648 dataLen
= dmaBufDataP
- readBufDataP
;
650 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
;
652 // test for length of buffer
653 if(dataLen
> maxDataLen
) {
654 maxDataLen
= dataLen
;
655 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
656 Dbprintf("blew circular buffer! dataLen=%d", dataLen
);
660 if(dataLen
< 1) continue;
662 // primary buffer was stopped( <-- we lost data!
663 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
664 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
665 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
666 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
668 // secondary buffer sets as primary, secondary buffer was stopped
669 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
670 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
671 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
676 if (rsamples
& 0x01) { // Need two samples to feed Miller and Manchester-Decoder
678 if(!TagIsActive
) { // no need to try decoding reader data if the tag is sending
679 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
680 if (MillerDecoding(readerdata
, (rsamples
-1)*4)) {
683 // check - if there is a short 7bit request from reader
684 if ((!triggered
) && (param
& 0x02) && (Uart
.len
== 1) && (Uart
.bitCount
== 7)) triggered
= true;
687 if (!LogTrace(receivedCmd
,
689 Uart
.startTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
690 Uart
.endTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
694 /* And ready to receive another command. */
696 /* And also reset the demod code, which might have been */
697 /* false-triggered by the commands from the reader. */
701 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
704 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
705 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
706 if(ManchesterDecoding(tagdata
, 0, (rsamples
-1)*4)) {
709 if (!LogTrace(receivedResponse
,
711 Demod
.startTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
712 Demod
.endTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
716 if ((!triggered
) && (param
& 0x01)) triggered
= true;
718 // And ready to receive another response.
720 // And reset the Miller decoder including itS (now outdated) input buffer
721 UartInit(receivedCmd
, receivedCmdPar
);
725 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
729 previous_data
= *data
;
732 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
737 DbpString("COMMAND FINISHED");
740 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen
, Uart
.state
, Uart
.len
);
741 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart
.output
[0]);
745 //-----------------------------------------------------------------------------
746 // Prepare tag messages
747 //-----------------------------------------------------------------------------
748 static void CodeIso14443aAsTagPar(const uint8_t *cmd
, uint16_t len
, uint8_t *parity
)
752 // Correction bit, might be removed when not needed
757 ToSendStuffBit(1); // 1
763 ToSend
[++ToSendMax
] = SEC_D
;
764 LastProxToAirDuration
= 8 * ToSendMax
- 4;
766 for(uint16_t i
= 0; i
< len
; i
++) {
770 for(uint16_t j
= 0; j
< 8; j
++) {
772 ToSend
[++ToSendMax
] = SEC_D
;
774 ToSend
[++ToSendMax
] = SEC_E
;
779 // Get the parity bit
780 if (parity
[i
>>3] & (0x80>>(i
&0x0007))) {
781 ToSend
[++ToSendMax
] = SEC_D
;
782 LastProxToAirDuration
= 8 * ToSendMax
- 4;
784 ToSend
[++ToSendMax
] = SEC_E
;
785 LastProxToAirDuration
= 8 * ToSendMax
;
790 ToSend
[++ToSendMax
] = SEC_F
;
792 // Convert from last byte pos to length
796 static void CodeIso14443aAsTag(const uint8_t *cmd
, uint16_t len
)
798 uint8_t par
[MAX_PARITY_SIZE
];
800 GetParity(cmd
, len
, par
);
801 CodeIso14443aAsTagPar(cmd
, len
, par
);
805 static void Code4bitAnswerAsTag(uint8_t cmd
)
811 // Correction bit, might be removed when not needed
816 ToSendStuffBit(1); // 1
822 ToSend
[++ToSendMax
] = SEC_D
;
825 for(i
= 0; i
< 4; i
++) {
827 ToSend
[++ToSendMax
] = SEC_D
;
828 LastProxToAirDuration
= 8 * ToSendMax
- 4;
830 ToSend
[++ToSendMax
] = SEC_E
;
831 LastProxToAirDuration
= 8 * ToSendMax
;
837 ToSend
[++ToSendMax
] = SEC_F
;
839 // Convert from last byte pos to length
843 //-----------------------------------------------------------------------------
844 // Wait for commands from reader
845 // Stop when button is pressed
846 // Or return true when command is captured
847 //-----------------------------------------------------------------------------
848 static int GetIso14443aCommandFromReader(uint8_t *received
, uint8_t *parity
, int *len
)
850 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
851 // only, since we are receiving, not transmitting).
852 // Signal field is off with the appropriate LED
854 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
856 // Now run a `software UART' on the stream of incoming samples.
857 UartInit(received
, parity
);
860 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
865 if(BUTTON_PRESS()) return false;
867 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
868 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
869 if(MillerDecoding(b
, 0)) {
877 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
878 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
);
879 int EmSend4bit(uint8_t resp
);
880 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
);
881 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
882 int EmSendCmd(uint8_t *resp
, uint16_t respLen
);
883 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
);
884 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
885 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
);
887 static uint8_t* free_buffer_pointer
;
894 uint32_t ProxToAirDuration
;
895 } tag_response_info_t
;
897 bool prepare_tag_modulation(tag_response_info_t
* response_info
, size_t max_buffer_size
) {
898 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
899 // This will need the following byte array for a modulation sequence
900 // 144 data bits (18 * 8)
903 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
904 // 1 just for the case
906 // 166 bytes, since every bit that needs to be send costs us a byte
910 // Prepare the tag modulation bits from the message
911 CodeIso14443aAsTag(response_info
->response
,response_info
->response_n
);
913 // Make sure we do not exceed the free buffer space
914 if (ToSendMax
> max_buffer_size
) {
915 Dbprintf("Out of memory, when modulating bits for tag answer:");
916 Dbhexdump(response_info
->response_n
,response_info
->response
,false);
920 // Copy the byte array, used for this modulation to the buffer position
921 memcpy(response_info
->modulation
,ToSend
,ToSendMax
);
923 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
924 response_info
->modulation_n
= ToSendMax
;
925 response_info
->ProxToAirDuration
= LastProxToAirDuration
;
931 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
932 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
933 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
934 // -> need 273 bytes buffer
935 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 273
937 bool prepare_allocated_tag_modulation(tag_response_info_t
* response_info
) {
938 // Retrieve and store the current buffer index
939 response_info
->modulation
= free_buffer_pointer
;
941 // Determine the maximum size we can use from our buffer
942 size_t max_buffer_size
= ALLOCATED_TAG_MODULATION_BUFFER_SIZE
;
944 // Forward the prepare tag modulation function to the inner function
945 if (prepare_tag_modulation(response_info
, max_buffer_size
)) {
946 // Update the free buffer offset
947 free_buffer_pointer
+= ToSendMax
;
954 //-----------------------------------------------------------------------------
955 // Main loop of simulated tag: receive commands from reader, decide what
956 // response to send, and send it.
957 //-----------------------------------------------------------------------------
958 void SimulateIso14443aTag(int tagType
, int uid_1st
, int uid_2nd
, byte_t
* data
)
962 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
963 uint8_t response1
[2];
966 case 1: { // MIFARE Classic
967 // Says: I am Mifare 1k - original line
972 case 2: { // MIFARE Ultralight
973 // Says: I am a stupid memory tag, no crypto
978 case 3: { // MIFARE DESFire
979 // Says: I am a DESFire tag, ph33r me
984 case 4: { // ISO/IEC 14443-4
985 // Says: I am a javacard (JCOP)
990 case 5: { // MIFARE TNP3XXX
997 Dbprintf("Error: unkown tagtype (%d)",tagType
);
1002 // The second response contains the (mandatory) first 24 bits of the UID
1003 uint8_t response2
[5] = {0x00};
1005 // Check if the uid uses the (optional) part
1006 uint8_t response2a
[5] = {0x00};
1009 response2
[0] = 0x88;
1010 num_to_bytes(uid_1st
,3,response2
+1);
1011 num_to_bytes(uid_2nd
,4,response2a
);
1012 response2a
[4] = response2a
[0] ^ response2a
[1] ^ response2a
[2] ^ response2a
[3];
1014 // Configure the ATQA and SAK accordingly
1015 response1
[0] |= 0x40;
1018 num_to_bytes(uid_1st
,4,response2
);
1019 // Configure the ATQA and SAK accordingly
1020 response1
[0] &= 0xBF;
1024 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1025 response2
[4] = response2
[0] ^ response2
[1] ^ response2
[2] ^ response2
[3];
1027 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1028 uint8_t response3
[3] = {0x00};
1030 ComputeCrc14443(CRC_14443_A
, response3
, 1, &response3
[1], &response3
[2]);
1032 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1033 uint8_t response3a
[3] = {0x00};
1034 response3a
[0] = sak
& 0xFB;
1035 ComputeCrc14443(CRC_14443_A
, response3a
, 1, &response3a
[1], &response3a
[2]);
1037 uint8_t response5
[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1038 uint8_t response6
[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1039 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1040 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1041 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1042 // TC(1) = 0x02: CID supported, NAD not supported
1043 ComputeCrc14443(CRC_14443_A
, response6
, 4, &response6
[4], &response6
[5]);
1045 #define TAG_RESPONSE_COUNT 7
1046 tag_response_info_t responses
[TAG_RESPONSE_COUNT
] = {
1047 { .response
= response1
, .response_n
= sizeof(response1
) }, // Answer to request - respond with card type
1048 { .response
= response2
, .response_n
= sizeof(response2
) }, // Anticollision cascade1 - respond with uid
1049 { .response
= response2a
, .response_n
= sizeof(response2a
) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1050 { .response
= response3
, .response_n
= sizeof(response3
) }, // Acknowledge select - cascade 1
1051 { .response
= response3a
, .response_n
= sizeof(response3a
) }, // Acknowledge select - cascade 2
1052 { .response
= response5
, .response_n
= sizeof(response5
) }, // Authentication answer (random nonce)
1053 { .response
= response6
, .response_n
= sizeof(response6
) }, // dummy ATS (pseudo-ATR), answer to RATS
1056 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1057 // Such a response is less time critical, so we can prepare them on the fly
1058 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1059 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1060 uint8_t dynamic_response_buffer
[DYNAMIC_RESPONSE_BUFFER_SIZE
];
1061 uint8_t dynamic_modulation_buffer
[DYNAMIC_MODULATION_BUFFER_SIZE
];
1062 tag_response_info_t dynamic_response_info
= {
1063 .response
= dynamic_response_buffer
,
1065 .modulation
= dynamic_modulation_buffer
,
1069 // We need to listen to the high-frequency, peak-detected path.
1070 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1072 BigBuf_free_keep_EM();
1074 // allocate buffers:
1075 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
1076 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
1077 free_buffer_pointer
= BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE
);
1083 // Prepare the responses of the anticollision phase
1084 // there will be not enough time to do this at the moment the reader sends it REQA
1085 for (size_t i
=0; i
<TAG_RESPONSE_COUNT
; i
++) {
1086 prepare_allocated_tag_modulation(&responses
[i
]);
1091 // To control where we are in the protocol
1095 // Just to allow some checks
1101 tag_response_info_t
* p_response
;
1105 // Clean receive command buffer
1106 if(!GetIso14443aCommandFromReader(receivedCmd
, receivedCmdPar
, &len
)) {
1107 DbpString("Button press");
1113 // Okay, look at the command now.
1115 if(receivedCmd
[0] == 0x26) { // Received a REQUEST
1116 p_response
= &responses
[0]; order
= 1;
1117 } else if(receivedCmd
[0] == 0x52) { // Received a WAKEUP
1118 p_response
= &responses
[0]; order
= 6;
1119 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x93) { // Received request for UID (cascade 1)
1120 p_response
= &responses
[1]; order
= 2;
1121 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x95) { // Received request for UID (cascade 2)
1122 p_response
= &responses
[2]; order
= 20;
1123 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x93) { // Received a SELECT (cascade 1)
1124 p_response
= &responses
[3]; order
= 3;
1125 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x95) { // Received a SELECT (cascade 2)
1126 p_response
= &responses
[4]; order
= 30;
1127 } else if(receivedCmd
[0] == 0x30) { // Received a (plain) READ
1128 EmSendCmdEx(data
+(4*receivedCmd
[1]),16,false);
1129 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1130 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1132 } else if(receivedCmd
[0] == 0x50) { // Received a HALT
1135 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
1138 } else if(receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61) { // Received an authentication request
1139 p_response
= &responses
[5]; order
= 7;
1140 } else if(receivedCmd
[0] == 0xE0) { // Received a RATS request
1141 if (tagType
== 1 || tagType
== 2) { // RATS not supported
1142 EmSend4bit(CARD_NACK_NA
);
1145 p_response
= &responses
[6]; order
= 70;
1147 } else if (order
== 7 && len
== 8) { // Received {nr] and {ar} (part of authentication)
1149 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
1151 uint32_t nr
= bytes_to_num(receivedCmd
,4);
1152 uint32_t ar
= bytes_to_num(receivedCmd
+4,4);
1153 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr
,ar
);
1155 // Check for ISO 14443A-4 compliant commands, look at left nibble
1156 switch (receivedCmd
[0]) {
1159 case 0x0A: { // IBlock (command)
1160 dynamic_response_info
.response
[0] = receivedCmd
[0];
1161 dynamic_response_info
.response
[1] = 0x00;
1162 dynamic_response_info
.response
[2] = 0x90;
1163 dynamic_response_info
.response
[3] = 0x00;
1164 dynamic_response_info
.response_n
= 4;
1168 case 0x1B: { // Chaining command
1169 dynamic_response_info
.response
[0] = 0xaa | ((receivedCmd
[0]) & 1);
1170 dynamic_response_info
.response_n
= 2;
1175 dynamic_response_info
.response
[0] = receivedCmd
[0] ^ 0x11;
1176 dynamic_response_info
.response_n
= 2;
1180 memcpy(dynamic_response_info
.response
,"\xAB\x00",2);
1181 dynamic_response_info
.response_n
= 2;
1185 case 0xC2: { // Readers sends deselect command
1186 memcpy(dynamic_response_info
.response
,"\xCA\x00",2);
1187 dynamic_response_info
.response_n
= 2;
1191 // Never seen this command before
1193 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
1195 Dbprintf("Received unknown command (len=%d):",len
);
1196 Dbhexdump(len
,receivedCmd
,false);
1198 dynamic_response_info
.response_n
= 0;
1202 if (dynamic_response_info
.response_n
> 0) {
1203 // Copy the CID from the reader query
1204 dynamic_response_info
.response
[1] = receivedCmd
[1];
1206 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1207 AppendCrc14443a(dynamic_response_info
.response
,dynamic_response_info
.response_n
);
1208 dynamic_response_info
.response_n
+= 2;
1210 if (prepare_tag_modulation(&dynamic_response_info
,DYNAMIC_MODULATION_BUFFER_SIZE
) == false) {
1211 Dbprintf("Error preparing tag response");
1213 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
1217 p_response
= &dynamic_response_info
;
1221 // Count number of wakeups received after a halt
1222 if(order
== 6 && lastorder
== 5) { happened
++; }
1224 // Count number of other messages after a halt
1225 if(order
!= 6 && lastorder
== 5) { happened2
++; }
1227 if(cmdsRecvd
> 999) {
1228 DbpString("1000 commands later...");
1233 if (p_response
!= NULL
) {
1234 EmSendCmd14443aRaw(p_response
->modulation
, p_response
->modulation_n
, receivedCmd
[0] == 0x52);
1235 // do the tracing for the previous reader request and this tag answer:
1236 uint8_t par
[MAX_PARITY_SIZE
];
1237 GetParity(p_response
->response
, p_response
->response_n
, par
);
1239 EmLogTrace(Uart
.output
,
1241 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1242 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1244 p_response
->response
,
1245 p_response
->response_n
,
1246 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1247 (LastTimeProxToAirStart
+ p_response
->ProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1252 Dbprintf("Trace Full. Simulation stopped.");
1257 Dbprintf("%x %x %x", happened
, happened2
, cmdsRecvd
);
1259 BigBuf_free_keep_EM();
1263 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1264 // of bits specified in the delay parameter.
1265 void PrepareDelayedTransfer(uint16_t delay
)
1267 uint8_t bitmask
= 0;
1268 uint8_t bits_to_shift
= 0;
1269 uint8_t bits_shifted
= 0;
1273 for (uint16_t i
= 0; i
< delay
; i
++) {
1274 bitmask
|= (0x01 << i
);
1276 ToSend
[ToSendMax
++] = 0x00;
1277 for (uint16_t i
= 0; i
< ToSendMax
; i
++) {
1278 bits_to_shift
= ToSend
[i
] & bitmask
;
1279 ToSend
[i
] = ToSend
[i
] >> delay
;
1280 ToSend
[i
] = ToSend
[i
] | (bits_shifted
<< (8 - delay
));
1281 bits_shifted
= bits_to_shift
;
1287 //-------------------------------------------------------------------------------------
1288 // Transmit the command (to the tag) that was placed in ToSend[].
1289 // Parameter timing:
1290 // if NULL: transfer at next possible time, taking into account
1291 // request guard time and frame delay time
1292 // if == 0: transfer immediately and return time of transfer
1293 // if != 0: delay transfer until time specified
1294 //-------------------------------------------------------------------------------------
1295 static void TransmitFor14443a(const uint8_t *cmd
, uint16_t len
, uint32_t *timing
)
1298 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1300 uint32_t ThisTransferTime
= 0;
1303 if(*timing
== 0) { // Measure time
1304 *timing
= (GetCountSspClk() + 8) & 0xfffffff8;
1306 PrepareDelayedTransfer(*timing
& 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1308 if(MF_DBGLEVEL
>= 4 && GetCountSspClk() >= (*timing
& 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1309 while(GetCountSspClk() < (*timing
& 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1310 LastTimeProxToAirStart
= *timing
;
1312 ThisTransferTime
= ((MAX(NextTransferTime
, GetCountSspClk()) & 0xfffffff8) + 8);
1313 while(GetCountSspClk() < ThisTransferTime
);
1314 LastTimeProxToAirStart
= ThisTransferTime
;
1318 AT91C_BASE_SSC
->SSC_THR
= SEC_Y
;
1322 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1323 AT91C_BASE_SSC
->SSC_THR
= cmd
[c
];
1331 NextTransferTime
= MAX(NextTransferTime
, LastTimeProxToAirStart
+ REQUEST_GUARD_TIME
);
1335 //-----------------------------------------------------------------------------
1336 // Prepare reader command (in bits, support short frames) to send to FPGA
1337 //-----------------------------------------------------------------------------
1338 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd
, uint16_t bits
, const uint8_t *parity
)
1346 // Start of Communication (Seq. Z)
1347 ToSend
[++ToSendMax
] = SEC_Z
;
1348 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1351 size_t bytecount
= nbytes(bits
);
1352 // Generate send structure for the data bits
1353 for (i
= 0; i
< bytecount
; i
++) {
1354 // Get the current byte to send
1356 size_t bitsleft
= MIN((bits
-(i
*8)),8);
1358 for (j
= 0; j
< bitsleft
; j
++) {
1361 ToSend
[++ToSendMax
] = SEC_X
;
1362 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1367 ToSend
[++ToSendMax
] = SEC_Z
;
1368 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1371 ToSend
[++ToSendMax
] = SEC_Y
;
1378 // Only transmit parity bit if we transmitted a complete byte
1379 if (j
== 8 && parity
!= NULL
) {
1380 // Get the parity bit
1381 if (parity
[i
>>3] & (0x80 >> (i
&0x0007))) {
1383 ToSend
[++ToSendMax
] = SEC_X
;
1384 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1389 ToSend
[++ToSendMax
] = SEC_Z
;
1390 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1393 ToSend
[++ToSendMax
] = SEC_Y
;
1400 // End of Communication: Logic 0 followed by Sequence Y
1403 ToSend
[++ToSendMax
] = SEC_Z
;
1404 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1407 ToSend
[++ToSendMax
] = SEC_Y
;
1410 ToSend
[++ToSendMax
] = SEC_Y
;
1412 // Convert to length of command:
1416 //-----------------------------------------------------------------------------
1417 // Prepare reader command to send to FPGA
1418 //-----------------------------------------------------------------------------
1419 void CodeIso14443aAsReaderPar(const uint8_t *cmd
, uint16_t len
, const uint8_t *parity
)
1421 CodeIso14443aBitsAsReaderPar(cmd
, len
*8, parity
);
1425 //-----------------------------------------------------------------------------
1426 // Wait for commands from reader
1427 // Stop when button is pressed (return 1) or field was gone (return 2)
1428 // Or return 0 when command is captured
1429 //-----------------------------------------------------------------------------
1430 static int EmGetCmd(uint8_t *received
, uint16_t *len
, uint8_t *parity
)
1434 uint32_t timer
= 0, vtime
= 0;
1438 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1439 // only, since we are receiving, not transmitting).
1440 // Signal field is off with the appropriate LED
1442 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1444 // Set ADC to read field strength
1445 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_SWRST
;
1446 AT91C_BASE_ADC
->ADC_MR
=
1447 ADC_MODE_PRESCALE(63) |
1448 ADC_MODE_STARTUP_TIME(1) |
1449 ADC_MODE_SAMPLE_HOLD_TIME(15);
1450 AT91C_BASE_ADC
->ADC_CHER
= ADC_CHANNEL(ADC_CHAN_HF
);
1452 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1454 // Now run a 'software UART' on the stream of incoming samples.
1455 UartInit(received
, parity
);
1458 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1463 if (BUTTON_PRESS()) return 1;
1465 // test if the field exists
1466 if (AT91C_BASE_ADC
->ADC_SR
& ADC_END_OF_CONVERSION(ADC_CHAN_HF
)) {
1468 analogAVG
+= AT91C_BASE_ADC
->ADC_CDR
[ADC_CHAN_HF
];
1469 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1470 if (analogCnt
>= 32) {
1471 if ((MAX_ADC_HF_VOLTAGE
* (analogAVG
/ analogCnt
) >> 10) < MF_MINFIELDV
) {
1472 vtime
= GetTickCount();
1473 if (!timer
) timer
= vtime
;
1474 // 50ms no field --> card to idle state
1475 if (vtime
- timer
> 50) return 2;
1477 if (timer
) timer
= 0;
1483 // receive and test the miller decoding
1484 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1485 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1486 if(MillerDecoding(b
, 0)) {
1496 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
)
1500 uint32_t ThisTransferTime
;
1502 // Modulate Manchester
1503 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1505 // include correction bit if necessary
1506 if (Uart
.parityBits
& 0x01) {
1507 correctionNeeded
= true;
1509 if(correctionNeeded
) {
1510 // 1236, so correction bit needed
1516 // clear receiving shift register and holding register
1517 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1518 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1519 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1520 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1522 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1523 for (uint16_t j
= 0; j
< 5; j
++) { // allow timeout - better late than never
1524 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1525 if (AT91C_BASE_SSC
->SSC_RHR
) break;
1528 while ((ThisTransferTime
= GetCountSspClk()) & 0x00000007);
1531 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1534 for(; i
< respLen
; ) {
1535 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1536 AT91C_BASE_SSC
->SSC_THR
= resp
[i
++];
1537 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1540 if(BUTTON_PRESS()) {
1545 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1546 uint8_t fpga_queued_bits
= FpgaSendQueueDelay
>> 3;
1547 for (i
= 0; i
<= fpga_queued_bits
/8 + 1; ) {
1548 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1549 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1550 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1555 LastTimeProxToAirStart
= ThisTransferTime
+ (correctionNeeded
?8:0);
1560 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
){
1561 Code4bitAnswerAsTag(resp
);
1562 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1563 // do the tracing for the previous reader request and this tag answer:
1565 GetParity(&resp
, 1, par
);
1566 EmLogTrace(Uart
.output
,
1568 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1569 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1573 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1574 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1579 int EmSend4bit(uint8_t resp
){
1580 return EmSend4bitEx(resp
, false);
1583 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
){
1584 CodeIso14443aAsTagPar(resp
, respLen
, par
);
1585 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1586 // do the tracing for the previous reader request and this tag answer:
1587 EmLogTrace(Uart
.output
,
1589 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1590 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1594 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1595 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1600 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
){
1601 uint8_t par
[MAX_PARITY_SIZE
];
1602 GetParity(resp
, respLen
, par
);
1603 return EmSendCmdExPar(resp
, respLen
, correctionNeeded
, par
);
1606 int EmSendCmd(uint8_t *resp
, uint16_t respLen
){
1607 uint8_t par
[MAX_PARITY_SIZE
];
1608 GetParity(resp
, respLen
, par
);
1609 return EmSendCmdExPar(resp
, respLen
, false, par
);
1612 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1613 return EmSendCmdExPar(resp
, respLen
, false, par
);
1616 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
1617 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
)
1620 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1621 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1622 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1623 uint16_t reader_modlen
= reader_EndTime
- reader_StartTime
;
1624 uint16_t approx_fdt
= tag_StartTime
- reader_EndTime
;
1625 uint16_t exact_fdt
= (approx_fdt
- 20 + 32)/64 * 64 + 20;
1626 reader_EndTime
= tag_StartTime
- exact_fdt
;
1627 reader_StartTime
= reader_EndTime
- reader_modlen
;
1628 if (!LogTrace(reader_data
, reader_len
, reader_StartTime
, reader_EndTime
, reader_Parity
, true)) {
1630 } else return(!LogTrace(tag_data
, tag_len
, tag_StartTime
, tag_EndTime
, tag_Parity
, false));
1636 //-----------------------------------------------------------------------------
1637 // Wait a certain time for tag response
1638 // If a response is captured return true
1639 // If it takes too long return false
1640 //-----------------------------------------------------------------------------
1641 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse
, uint8_t *receivedResponsePar
, uint16_t offset
)
1645 // Set FPGA mode to "reader listen mode", no modulation (listen
1646 // only, since we are receiving, not transmitting).
1647 // Signal field is on with the appropriate LED
1649 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1651 // Now get the answer from the card
1652 DemodInit(receivedResponse
, receivedResponsePar
);
1655 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1661 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1662 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1663 if(ManchesterDecoding(b
, offset
, 0)) {
1664 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/16 + FRAME_DELAY_TIME_PICC_TO_PCD
);
1666 } else if (c
++ > iso14a_timeout
&& Demod
.state
== DEMOD_UNSYNCD
) {
1674 void ReaderTransmitBitsPar(uint8_t* frame
, uint16_t bits
, uint8_t *par
, uint32_t *timing
)
1676 CodeIso14443aBitsAsReaderPar(frame
, bits
, par
);
1678 // Send command to tag
1679 TransmitFor14443a(ToSend
, ToSendMax
, timing
);
1683 // Log reader command in trace buffer
1685 LogTrace(frame
, nbytes(bits
), LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_READER
, (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_READER
, par
, true);
1690 void ReaderTransmitPar(uint8_t* frame
, uint16_t len
, uint8_t *par
, uint32_t *timing
)
1692 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1696 void ReaderTransmitBits(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1698 // Generate parity and redirect
1699 uint8_t par
[MAX_PARITY_SIZE
];
1700 GetParity(frame
, len
/8, par
);
1701 ReaderTransmitBitsPar(frame
, len
, par
, timing
);
1705 void ReaderTransmit(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1707 // Generate parity and redirect
1708 uint8_t par
[MAX_PARITY_SIZE
];
1709 GetParity(frame
, len
, par
);
1710 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1713 int ReaderReceiveOffset(uint8_t* receivedAnswer
, uint16_t offset
, uint8_t *parity
)
1715 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, offset
)) return false;
1717 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, false);
1722 int ReaderReceive(uint8_t *receivedAnswer
, uint8_t *parity
)
1724 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, 0)) return false;
1726 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, false);
1731 // performs iso14443a anticollision (optional) and card select procedure
1732 // fills the uid and cuid pointer unless NULL
1733 // fills the card info record unless NULL
1734 // if anticollision is false, then the UID must be provided in uid_ptr[]
1735 // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1736 int iso14443a_select_card(byte_t
*uid_ptr
, iso14a_card_select_t
*p_hi14a_card
, uint32_t *cuid_ptr
, bool anticollision
, uint8_t num_cascades
) {
1737 uint8_t wupa
[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1738 uint8_t sel_all
[] = { 0x93,0x20 };
1739 uint8_t sel_uid
[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1740 uint8_t rats
[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1741 uint8_t resp
[MAX_FRAME_SIZE
]; // theoretically. A usual RATS will be much smaller
1742 uint8_t resp_par
[MAX_PARITY_SIZE
];
1744 size_t uid_resp_len
;
1746 uint8_t sak
= 0x04; // cascade uid
1747 int cascade_level
= 0;
1750 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1751 ReaderTransmitBitsPar(wupa
, 7, NULL
, NULL
);
1754 if(!ReaderReceive(resp
, resp_par
)) return 0;
1757 memcpy(p_hi14a_card
->atqa
, resp
, 2);
1758 p_hi14a_card
->uidlen
= 0;
1759 memset(p_hi14a_card
->uid
,0,10);
1762 if (anticollision
) {
1765 memset(uid_ptr
,0,10);
1769 // check for proprietary anticollision:
1770 if ((resp
[0] & 0x1F) == 0) {
1774 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1775 // which case we need to make a cascade 2 request and select - this is a long UID
1776 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1777 for(; sak
& 0x04; cascade_level
++) {
1778 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1779 sel_uid
[0] = sel_all
[0] = 0x93 + cascade_level
* 2;
1781 if (anticollision
) {
1783 ReaderTransmit(sel_all
, sizeof(sel_all
), NULL
);
1784 if (!ReaderReceive(resp
, resp_par
)) return 0;
1786 if (Demod
.collisionPos
) { // we had a collision and need to construct the UID bit by bit
1787 memset(uid_resp
, 0, 4);
1788 uint16_t uid_resp_bits
= 0;
1789 uint16_t collision_answer_offset
= 0;
1790 // anti-collision-loop:
1791 while (Demod
.collisionPos
) {
1792 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod
.collisionPos
);
1793 for (uint16_t i
= collision_answer_offset
; i
< Demod
.collisionPos
; i
++, uid_resp_bits
++) { // add valid UID bits before collision point
1794 uint16_t UIDbit
= (resp
[i
/8] >> (i
% 8)) & 0x01;
1795 uid_resp
[uid_resp_bits
/ 8] |= UIDbit
<< (uid_resp_bits
% 8);
1797 uid_resp
[uid_resp_bits
/8] |= 1 << (uid_resp_bits
% 8); // next time select the card(s) with a 1 in the collision position
1799 // construct anticollosion command:
1800 sel_uid
[1] = ((2 + uid_resp_bits
/8) << 4) | (uid_resp_bits
& 0x07); // length of data in bytes and bits
1801 for (uint16_t i
= 0; i
<= uid_resp_bits
/8; i
++) {
1802 sel_uid
[2+i
] = uid_resp
[i
];
1804 collision_answer_offset
= uid_resp_bits
%8;
1805 ReaderTransmitBits(sel_uid
, 16 + uid_resp_bits
, NULL
);
1806 if (!ReaderReceiveOffset(resp
, collision_answer_offset
, resp_par
)) return 0;
1808 // finally, add the last bits and BCC of the UID
1809 for (uint16_t i
= collision_answer_offset
; i
< (Demod
.len
-1)*8; i
++, uid_resp_bits
++) {
1810 uint16_t UIDbit
= (resp
[i
/8] >> (i
%8)) & 0x01;
1811 uid_resp
[uid_resp_bits
/8] |= UIDbit
<< (uid_resp_bits
% 8);
1814 } else { // no collision, use the response to SELECT_ALL as current uid
1815 memcpy(uid_resp
, resp
, 4);
1818 if (cascade_level
< num_cascades
- 1) {
1820 memcpy(uid_resp
+1, uid_ptr
+cascade_level
*3, 3);
1822 memcpy(uid_resp
, uid_ptr
+cascade_level
*3, 4);
1827 // calculate crypto UID. Always use last 4 Bytes.
1829 *cuid_ptr
= bytes_to_num(uid_resp
, 4);
1832 // Construct SELECT UID command
1833 sel_uid
[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1834 memcpy(sel_uid
+2, uid_resp
, 4); // the UID received during anticollision, or the provided UID
1835 sel_uid
[6] = sel_uid
[2] ^ sel_uid
[3] ^ sel_uid
[4] ^ sel_uid
[5]; // calculate and add BCC
1836 AppendCrc14443a(sel_uid
, 7); // calculate and add CRC
1837 ReaderTransmit(sel_uid
, sizeof(sel_uid
), NULL
);
1840 if (!ReaderReceive(resp
, resp_par
)) return 0;
1843 // Test if more parts of the uid are coming
1844 if ((sak
& 0x04) /* && uid_resp[0] == 0x88 */) {
1845 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1846 // http://www.nxp.com/documents/application_note/AN10927.pdf
1847 uid_resp
[0] = uid_resp
[1];
1848 uid_resp
[1] = uid_resp
[2];
1849 uid_resp
[2] = uid_resp
[3];
1853 if(uid_ptr
&& anticollision
) {
1854 memcpy(uid_ptr
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1858 memcpy(p_hi14a_card
->uid
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1859 p_hi14a_card
->uidlen
+= uid_resp_len
;
1864 p_hi14a_card
->sak
= sak
;
1865 p_hi14a_card
->ats_len
= 0;
1868 // non iso14443a compliant tag
1869 if( (sak
& 0x20) == 0) return 2;
1871 // Request for answer to select
1872 AppendCrc14443a(rats
, 2);
1873 ReaderTransmit(rats
, sizeof(rats
), NULL
);
1875 if (!(len
= ReaderReceive(resp
, resp_par
))) return 0;
1879 memcpy(p_hi14a_card
->ats
, resp
, sizeof(p_hi14a_card
->ats
));
1880 p_hi14a_card
->ats_len
= len
;
1883 // reset the PCB block number
1884 iso14_pcb_blocknum
= 0;
1886 // set default timeout based on ATS
1887 iso14a_set_ATS_timeout(resp
);
1892 void iso14443a_setup(uint8_t fpga_minor_mode
) {
1893 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1894 // Set up the synchronous serial port
1896 // connect Demodulated Signal to ADC:
1897 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1899 // Signal field is on with the appropriate LED
1900 if (fpga_minor_mode
== FPGA_HF_ISO14443A_READER_MOD
1901 || fpga_minor_mode
== FPGA_HF_ISO14443A_READER_LISTEN
) {
1906 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| fpga_minor_mode
);
1913 NextTransferTime
= 2*DELAY_ARM2AIR_AS_READER
;
1914 iso14a_set_timeout(1050); // 10ms default
1917 int iso14_apdu(uint8_t *cmd
, uint16_t cmd_len
, void *data
) {
1918 uint8_t parity
[MAX_PARITY_SIZE
];
1919 uint8_t real_cmd
[cmd_len
+4];
1920 real_cmd
[0] = 0x0a; //I-Block
1921 // put block number into the PCB
1922 real_cmd
[0] |= iso14_pcb_blocknum
;
1923 real_cmd
[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1924 memcpy(real_cmd
+2, cmd
, cmd_len
);
1925 AppendCrc14443a(real_cmd
,cmd_len
+2);
1927 ReaderTransmit(real_cmd
, cmd_len
+4, NULL
);
1928 size_t len
= ReaderReceive(data
, parity
);
1929 uint8_t *data_bytes
= (uint8_t *) data
;
1931 return 0; //DATA LINK ERROR
1932 // if we received an I- or R(ACK)-Block with a block number equal to the
1933 // current block number, toggle the current block number
1934 else if (len
>= 4 // PCB+CID+CRC = 4 bytes
1935 && ((data_bytes
[0] & 0xC0) == 0 // I-Block
1936 || (data_bytes
[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1937 && (data_bytes
[0] & 0x01) == iso14_pcb_blocknum
) // equal block numbers
1939 iso14_pcb_blocknum
^= 1;
1945 //-----------------------------------------------------------------------------
1946 // Read an ISO 14443a tag. Send out commands and store answers.
1948 //-----------------------------------------------------------------------------
1949 void ReaderIso14443a(UsbCommand
*c
)
1951 iso14a_command_t param
= c
->arg
[0];
1952 uint8_t *cmd
= c
->d
.asBytes
;
1953 size_t len
= c
->arg
[1] & 0xffff;
1954 size_t lenbits
= c
->arg
[1] >> 16;
1955 uint32_t timeout
= c
->arg
[2];
1957 byte_t buf
[USB_CMD_DATA_SIZE
];
1958 uint8_t par
[MAX_PARITY_SIZE
];
1960 if(param
& ISO14A_CONNECT
) {
1966 if(param
& ISO14A_REQUEST_TRIGGER
) {
1967 iso14a_set_trigger(true);
1970 if(param
& ISO14A_CONNECT
) {
1971 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN
);
1972 if(!(param
& ISO14A_NO_SELECT
)) {
1973 iso14a_card_select_t
*card
= (iso14a_card_select_t
*)buf
;
1974 arg0
= iso14443a_select_card(NULL
, card
, NULL
, true, 0);
1975 cmd_send(CMD_ACK
,arg0
,card
->uidlen
,0,buf
,sizeof(iso14a_card_select_t
));
1979 if(param
& ISO14A_SET_TIMEOUT
) {
1980 iso14a_set_timeout(timeout
);
1983 if(param
& ISO14A_APDU
) {
1984 arg0
= iso14_apdu(cmd
, len
, buf
);
1985 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
1988 if(param
& ISO14A_RAW
) {
1989 if(param
& ISO14A_APPEND_CRC
) {
1990 if(param
& ISO14A_TOPAZMODE
) {
1991 AppendCrc14443b(cmd
,len
);
1993 AppendCrc14443a(cmd
,len
);
1996 if (lenbits
) lenbits
+= 16;
1998 if(lenbits
>0) { // want to send a specific number of bits (e.g. short commands)
1999 if(param
& ISO14A_TOPAZMODE
) {
2000 int bits_to_send
= lenbits
;
2002 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 7), NULL
, NULL
); // first byte is always short (7bits) and no parity
2004 while (bits_to_send
> 0) {
2005 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 8), NULL
, NULL
); // following bytes are 8 bit and no parity
2009 GetParity(cmd
, lenbits
/8, par
);
2010 ReaderTransmitBitsPar(cmd
, lenbits
, par
, NULL
); // bytes are 8 bit with odd parity
2012 } else { // want to send complete bytes only
2013 if(param
& ISO14A_TOPAZMODE
) {
2015 ReaderTransmitBitsPar(&cmd
[i
++], 7, NULL
, NULL
); // first byte: 7 bits, no paritiy
2017 ReaderTransmitBitsPar(&cmd
[i
++], 8, NULL
, NULL
); // following bytes: 8 bits, no paritiy
2020 ReaderTransmit(cmd
,len
, NULL
); // 8 bits, odd parity
2023 arg0
= ReaderReceive(buf
, par
);
2024 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
2027 if(param
& ISO14A_REQUEST_TRIGGER
) {
2028 iso14a_set_trigger(false);
2031 if(param
& ISO14A_NO_DISCONNECT
) {
2035 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2040 // Determine the distance between two nonces.
2041 // Assume that the difference is small, but we don't know which is first.
2042 // Therefore try in alternating directions.
2043 int32_t dist_nt(uint32_t nt1
, uint32_t nt2
) {
2046 uint32_t nttmp1
, nttmp2
;
2048 if (nt1
== nt2
) return 0;
2053 for (i
= 1; i
< 32768; i
++) {
2054 nttmp1
= prng_successor(nttmp1
, 1);
2055 if (nttmp1
== nt2
) return i
;
2056 nttmp2
= prng_successor(nttmp2
, 1);
2057 if (nttmp2
== nt1
) return -i
;
2060 return(-99999); // either nt1 or nt2 are invalid nonces
2064 //-----------------------------------------------------------------------------
2065 // Recover several bits of the cypher stream. This implements (first stages of)
2066 // the algorithm described in "The Dark Side of Security by Obscurity and
2067 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2068 // (article by Nicolas T. Courtois, 2009)
2069 //-----------------------------------------------------------------------------
2070 void ReaderMifare(bool first_try
)
2073 uint8_t mf_auth
[] = { 0x60,0x00,0xf5,0x7b };
2074 uint8_t mf_nr_ar
[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2075 static uint8_t mf_nr_ar3
;
2077 uint8_t receivedAnswer
[MAX_MIFARE_FRAME_SIZE
];
2078 uint8_t receivedAnswerPar
[MAX_MIFARE_PARITY_SIZE
];
2081 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2084 // free eventually allocated BigBuf memory. We want all for tracing.
2091 uint8_t par
[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2092 static byte_t par_low
= 0;
2094 uint8_t uid
[10] ={0};
2098 uint32_t previous_nt
= 0;
2099 static uint32_t nt_attacked
= 0;
2100 byte_t par_list
[8] = {0x00};
2101 byte_t ks_list
[8] = {0x00};
2103 #define PRNG_SEQUENCE_LENGTH (1 << 16);
2104 static uint32_t sync_time
;
2105 static int32_t sync_cycles
;
2106 int catch_up_cycles
= 0;
2107 int last_catch_up
= 0;
2108 uint16_t elapsed_prng_sequences
;
2109 uint16_t consecutive_resyncs
= 0;
2114 sync_time
= GetCountSspClk() & 0xfffffff8;
2115 sync_cycles
= PRNG_SEQUENCE_LENGTH
; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the tag nonces).
2120 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2122 mf_nr_ar
[3] = mf_nr_ar3
;
2131 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2132 #define MAX_SYNC_TRIES 32
2133 #define NUM_DEBUG_INFOS 8 // per strategy
2134 #define MAX_STRATEGY 3
2135 uint16_t unexpected_random
= 0;
2136 uint16_t sync_tries
= 0;
2137 int16_t debug_info_nr
= -1;
2138 uint16_t strategy
= 0;
2139 int32_t debug_info
[MAX_STRATEGY
][NUM_DEBUG_INFOS
];
2140 uint32_t select_time
;
2143 for(uint16_t i
= 0; true; i
++) {
2148 // Test if the action was cancelled
2149 if(BUTTON_PRESS()) {
2154 if (strategy
== 2) {
2155 // test with additional hlt command
2157 int len
= mifare_sendcmd_short(NULL
, false, 0x50, 0x00, receivedAnswer
, receivedAnswerPar
, &halt_time
);
2158 if (len
&& MF_DBGLEVEL
>= 3) {
2159 Dbprintf("Unexpected response of %d bytes to hlt command (additional debugging).", len
);
2163 if (strategy
== 3) {
2164 // test with FPGA power off/on
2165 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2167 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2171 if(!iso14443a_select_card(uid
, NULL
, &cuid
, true, 0)) {
2172 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Can't select card");
2175 select_time
= GetCountSspClk();
2177 elapsed_prng_sequences
= 1;
2178 if (debug_info_nr
== -1) {
2179 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
+ catch_up_cycles
;
2180 catch_up_cycles
= 0;
2182 // if we missed the sync time already, advance to the next nonce repeat
2183 while(GetCountSspClk() > sync_time
) {
2184 elapsed_prng_sequences
++;
2185 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
;
2188 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2189 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2191 // collect some information on tag nonces for debugging:
2192 #define DEBUG_FIXED_SYNC_CYCLES PRNG_SEQUENCE_LENGTH
2193 if (strategy
== 0) {
2194 // nonce distances at fixed time after card select:
2195 sync_time
= select_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2196 } else if (strategy
== 1) {
2197 // nonce distances at fixed time between authentications:
2198 sync_time
= sync_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2199 } else if (strategy
== 2) {
2200 // nonce distances at fixed time after halt:
2201 sync_time
= halt_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2203 // nonce_distances at fixed time after power on
2204 sync_time
= DEBUG_FIXED_SYNC_CYCLES
;
2206 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2209 // Receive the (4 Byte) "random" nonce
2210 if (!ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2211 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2216 nt
= bytes_to_num(receivedAnswer
, 4);
2218 // Transmit reader nonce with fake par
2219 ReaderTransmitPar(mf_nr_ar
, sizeof(mf_nr_ar
), par
, NULL
);
2221 if (first_try
&& previous_nt
&& !nt_attacked
) { // we didn't calibrate our clock yet
2222 int nt_distance
= dist_nt(previous_nt
, nt
);
2223 if (nt_distance
== 0) {
2226 if (nt_distance
== -99999) { // invalid nonce received
2227 unexpected_random
++;
2228 if (unexpected_random
> MAX_UNEXPECTED_RANDOM
) {
2229 isOK
= -3; // Card has an unpredictable PRNG. Give up
2232 continue; // continue trying...
2235 if (++sync_tries
> MAX_SYNC_TRIES
) {
2236 if (strategy
> MAX_STRATEGY
|| MF_DBGLEVEL
< 3) {
2237 isOK
= -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2239 } else { // continue for a while, just to collect some debug info
2240 debug_info
[strategy
][debug_info_nr
] = nt_distance
;
2242 if (debug_info_nr
== NUM_DEBUG_INFOS
) {
2249 sync_cycles
= (sync_cycles
- nt_distance
/elapsed_prng_sequences
);
2250 if (sync_cycles
<= 0) {
2251 sync_cycles
+= PRNG_SEQUENCE_LENGTH
;
2253 if (MF_DBGLEVEL
>= 3) {
2254 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i
, nt_distance
, elapsed_prng_sequences
, sync_cycles
);
2260 if ((nt
!= nt_attacked
) && nt_attacked
) { // we somehow lost sync. Try to catch up again...
2261 catch_up_cycles
= -dist_nt(nt_attacked
, nt
);
2262 if (catch_up_cycles
== 99999) { // invalid nonce received. Don't resync on that one.
2263 catch_up_cycles
= 0;
2266 catch_up_cycles
/= elapsed_prng_sequences
;
2267 if (catch_up_cycles
== last_catch_up
) {
2268 consecutive_resyncs
++;
2271 last_catch_up
= catch_up_cycles
;
2272 consecutive_resyncs
= 0;
2274 if (consecutive_resyncs
< 3) {
2275 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i
, -catch_up_cycles
, consecutive_resyncs
);
2278 sync_cycles
= sync_cycles
+ catch_up_cycles
;
2279 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i
, -catch_up_cycles
, sync_cycles
);
2281 catch_up_cycles
= 0;
2282 consecutive_resyncs
= 0;
2287 consecutive_resyncs
= 0;
2289 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2290 if (ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2291 catch_up_cycles
= 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2294 par_low
= par
[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2298 if(led_on
) LED_B_ON(); else LED_B_OFF();
2300 par_list
[nt_diff
] = SwapBits(par
[0], 8);
2301 ks_list
[nt_diff
] = receivedAnswer
[0] ^ 0x05;
2303 // Test if the information is complete
2304 if (nt_diff
== 0x07) {
2309 nt_diff
= (nt_diff
+ 1) & 0x07;
2310 mf_nr_ar
[3] = (mf_nr_ar
[3] & 0x1F) | (nt_diff
<< 5);
2313 if (nt_diff
== 0 && first_try
)
2316 if (par
[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2321 par
[0] = ((par
[0] & 0x1F) + 1) | par_low
;
2327 mf_nr_ar
[3] &= 0x1F;
2330 if (MF_DBGLEVEL
>= 3) {
2331 for (uint16_t i
= 0; i
<= MAX_STRATEGY
; i
++) {
2332 for(uint16_t j
= 0; j
< NUM_DEBUG_INFOS
; j
++) {
2333 Dbprintf("collected debug info[%d][%d] = %d", i
, j
, debug_info
[i
][j
]);
2340 memcpy(buf
+ 0, uid
, 4);
2341 num_to_bytes(nt
, 4, buf
+ 4);
2342 memcpy(buf
+ 8, par_list
, 8);
2343 memcpy(buf
+ 16, ks_list
, 8);
2344 memcpy(buf
+ 24, mf_nr_ar
, 4);
2346 cmd_send(CMD_ACK
, isOK
, 0, 0, buf
, 28);
2349 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2368 *MIFARE 1K simulate.
2371 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2372 * FLAG_4B_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2373 * FLAG_7B_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2374 * FLAG_10B_UID_IN_DATA - use 10-byte UID in the data-section not finished
2375 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2376 * FLAG_RANDOM_NONCE - means we should generate some pseudo-random nonce data (only allows moebius attack)
2377 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is infinite ...
2378 * (unless reader attack mode enabled then it runs util it gets enough nonces to recover all keys attmpted)
2380 void Mifare1ksim(uint8_t flags
, uint8_t exitAfterNReads
, uint8_t arg2
, uint8_t *datain
)
2382 int cardSTATE
= MFEMUL_NOFIELD
;
2383 int _UID_LEN
= 0; // 4, 7, 10
2384 int vHf
= 0; // in mV
2386 uint32_t selTimer
= 0;
2387 uint32_t authTimer
= 0;
2389 uint8_t cardWRBL
= 0;
2390 uint8_t cardAUTHSC
= 0;
2391 uint8_t cardAUTHKEY
= 0xff; // no authentication
2392 uint32_t cardRr
= 0;
2394 //uint32_t rn_enc = 0;
2396 uint32_t cardINTREG
= 0;
2397 uint8_t cardINTBLOCK
= 0;
2398 struct Crypto1State mpcs
= {0, 0};
2399 struct Crypto1State
*pcs
;
2401 uint32_t numReads
= 0;//Counts numer of times reader read a block
2402 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
2403 uint8_t receivedCmd_par
[MAX_MIFARE_PARITY_SIZE
];
2404 uint8_t response
[MAX_MIFARE_FRAME_SIZE
];
2405 uint8_t response_par
[MAX_MIFARE_PARITY_SIZE
];
2407 uint8_t rATQA
[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2408 uint8_t rUIDBCC1
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2409 uint8_t rUIDBCC2
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2410 uint8_t rUIDBCC3
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2412 uint8_t rSAKfinal
[]= {0x08, 0xb6, 0xdd}; // mifare 1k indicated
2413 uint8_t rSAK1
[] = {0x04, 0xda, 0x17}; // indicate UID not finished
2415 uint8_t rAUTH_NT
[] = {0x01, 0x02, 0x03, 0x04};
2416 uint8_t rAUTH_AT
[] = {0x00, 0x00, 0x00, 0x00};
2418 //Here, we collect UID,sector,keytype,NT,AR,NR,NT2,AR2,NR2
2419 // This will be used in the reader-only attack.
2421 //allow collecting up to 8 sets of nonces to allow recovery of up to 8 keys
2422 #define ATTACK_KEY_COUNT 8 // keep same as define in cmdhfmf.c -> readerAttack()
2423 nonces_t ar_nr_resp
[ATTACK_KEY_COUNT
*2]; //*2 for 2 separate attack types (nml, moebius)
2424 memset(ar_nr_resp
, 0x00, sizeof(ar_nr_resp
));
2426 uint8_t ar_nr_collected
[ATTACK_KEY_COUNT
*2]; //*2 for 2nd attack type (moebius)
2427 memset(ar_nr_collected
, 0x00, sizeof(ar_nr_collected
));
2428 uint8_t nonce1_count
= 0;
2429 uint8_t nonce2_count
= 0;
2430 uint8_t moebius_n_count
= 0;
2431 bool gettingMoebius
= false;
2432 uint8_t mM
= 0; //moebius_modifier for collection storage
2434 // Authenticate response - nonce
2436 if (flags
& FLAG_RANDOM_NONCE
) {
2439 nonce
= bytes_to_num(rAUTH_NT
, 4);
2442 //-- Determine the UID
2443 // Can be set from emulator memory, incoming data
2444 // and can be 7 or 4 bytes long
2445 if (flags
& FLAG_4B_UID_IN_DATA
)
2447 // 4B uid comes from data-portion of packet
2448 memcpy(rUIDBCC1
,datain
,4);
2449 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2451 } else if (flags
& FLAG_7B_UID_IN_DATA
) {
2452 // 7B uid comes from data-portion of packet
2453 memcpy(&rUIDBCC1
[1],datain
,3);
2454 memcpy(rUIDBCC2
, datain
+3, 4);
2456 } else if (flags
& FLAG_10B_UID_IN_DATA
) {
2457 memcpy(&rUIDBCC1
[1], datain
, 3);
2458 memcpy(&rUIDBCC2
[1], datain
+3, 3);
2459 memcpy( rUIDBCC3
, datain
+6, 4);
2462 // get UID from emul memory - guess at length
2463 emlGetMemBt(receivedCmd
, 7, 1);
2464 if (receivedCmd
[0] == 0x00) { // ---------- 4BUID
2465 emlGetMemBt(rUIDBCC1
, 0, 4);
2467 } else { // ---------- 7BUID
2468 emlGetMemBt(&rUIDBCC1
[1], 0, 3);
2469 emlGetMemBt(rUIDBCC2
, 3, 4);
2477 cuid
= bytes_to_num(rUIDBCC1
, 4);
2479 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2480 if (MF_DBGLEVEL
>= 2) {
2481 Dbprintf("4B UID: %02x%02x%02x%02x",
2492 cuid
= bytes_to_num(rUIDBCC2
, 4);
2496 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2497 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2498 if (MF_DBGLEVEL
>= 2) {
2499 Dbprintf("7B UID: %02x %02x %02x %02x %02x %02x %02x",
2512 //sak_10[0] &= 0xFB;
2514 cuid
= bytes_to_num(rUIDBCC3
, 4);
2519 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2520 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2521 rUIDBCC3
[4] = rUIDBCC3
[0] ^ rUIDBCC3
[1] ^ rUIDBCC3
[2] ^ rUIDBCC3
[3];
2523 if (MF_DBGLEVEL
>= 2) {
2524 Dbprintf("10B UID: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
2542 // We need to listen to the high-frequency, peak-detected path.
2543 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
2545 // free eventually allocated BigBuf memory but keep Emulator Memory
2546 BigBuf_free_keep_EM();
2552 bool finished
= false;
2553 bool button_pushed
= BUTTON_PRESS();
2554 while (!button_pushed
&& !finished
&& !usb_poll_validate_length()) {
2557 // find reader field
2558 if (cardSTATE
== MFEMUL_NOFIELD
) {
2559 vHf
= (MAX_ADC_HF_VOLTAGE
* AvgAdc(ADC_CHAN_HF
)) >> 10;
2560 if (vHf
> MF_MINFIELDV
) {
2561 cardSTATE_TO_IDLE();
2565 if (cardSTATE
== MFEMUL_NOFIELD
) continue;
2568 res
= EmGetCmd(receivedCmd
, &len
, receivedCmd_par
);
2569 if (res
== 2) { //Field is off!
2570 cardSTATE
= MFEMUL_NOFIELD
;
2573 } else if (res
== 1) {
2574 break; //return value 1 means button press
2577 // REQ or WUP request in ANY state and WUP in HALTED state
2578 if (len
== 1 && ((receivedCmd
[0] == ISO14443A_CMD_REQA
&& cardSTATE
!= MFEMUL_HALTED
) || receivedCmd
[0] == ISO14443A_CMD_WUPA
)) {
2579 selTimer
= GetTickCount();
2580 EmSendCmdEx(rATQA
, sizeof(rATQA
), (receivedCmd
[0] == ISO14443A_CMD_WUPA
));
2581 cardSTATE
= MFEMUL_SELECT1
;
2583 // init crypto block
2586 crypto1_destroy(pcs
);
2588 if (flags
& FLAG_RANDOM_NONCE
) {
2594 switch (cardSTATE
) {
2595 case MFEMUL_NOFIELD
:
2598 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2601 case MFEMUL_SELECT1
:{
2602 // select all - 0x93 0x20
2603 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT
&& receivedCmd
[1] == 0x20)) {
2604 if (MF_DBGLEVEL
>= 4) Dbprintf("SELECT ALL received");
2605 EmSendCmd(rUIDBCC1
, sizeof(rUIDBCC1
));
2609 // select card - 0x93 0x70 ...
2611 (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT
&& receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC1
, 4) == 0)) {
2612 if (MF_DBGLEVEL
>= 4)
2613 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd
[2],receivedCmd
[3],receivedCmd
[4],receivedCmd
[5]);
2617 cardSTATE
= MFEMUL_WORK
;
2619 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer
);
2620 EmSendCmd(rSAKfinal
, sizeof(rSAKfinal
));
2623 cardSTATE
= MFEMUL_SELECT2
;
2624 EmSendCmd(rSAK1
, sizeof(rSAK1
));
2627 cardSTATE
= MFEMUL_SELECT2
;
2628 EmSendCmd(rSAK1
, sizeof(rSAK1
));
2633 cardSTATE_TO_IDLE();
2637 case MFEMUL_SELECT3
:{
2639 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2642 // select all cl3 - 0x97 0x20
2643 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3
&& receivedCmd
[1] == 0x20)) {
2644 EmSendCmd(rUIDBCC3
, sizeof(rUIDBCC3
));
2647 // select card cl3 - 0x97 0x70
2649 (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3
&&
2650 receivedCmd
[1] == 0x70 &&
2651 memcmp(&receivedCmd
[2], rUIDBCC3
, 4) == 0) ) {
2653 EmSendCmd(rSAKfinal
, sizeof(rSAKfinal
));
2654 cardSTATE
= MFEMUL_WORK
;
2656 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol3 time: %d", GetTickCount() - selTimer
);
2659 cardSTATE_TO_IDLE();
2664 cardSTATE_TO_IDLE();
2665 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2669 uint32_t nr
= bytes_to_num(receivedCmd
, 4);
2670 uint32_t ar
= bytes_to_num(&receivedCmd
[4], 4);
2672 // Collect AR/NR per keytype & sector
2673 if(flags
& FLAG_NR_AR_ATTACK
) {
2674 for (uint8_t i
= 0; i
< ATTACK_KEY_COUNT
; i
++) {
2675 if ( ar_nr_collected
[i
+mM
]==0 || ((cardAUTHSC
== ar_nr_resp
[i
+mM
].sector
) && (cardAUTHKEY
== ar_nr_resp
[i
+mM
].keytype
) && (ar_nr_collected
[i
+mM
] > 0)) ) {
2676 // if first auth for sector, or matches sector and keytype of previous auth
2677 if (ar_nr_collected
[i
+mM
] < 2) {
2678 // if we haven't already collected 2 nonces for this sector
2679 if (ar_nr_resp
[ar_nr_collected
[i
+mM
]].ar
!= ar
) {
2680 // Avoid duplicates... probably not necessary, ar should vary.
2681 if (ar_nr_collected
[i
+mM
]==0) {
2682 // first nonce collect
2683 ar_nr_resp
[i
+mM
].cuid
= cuid
;
2684 ar_nr_resp
[i
+mM
].sector
= cardAUTHSC
;
2685 ar_nr_resp
[i
+mM
].keytype
= cardAUTHKEY
;
2686 ar_nr_resp
[i
+mM
].nonce
= nonce
;
2687 ar_nr_resp
[i
+mM
].nr
= nr
;
2688 ar_nr_resp
[i
+mM
].ar
= ar
;
2690 // add this nonce to first moebius nonce
2691 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].cuid
= cuid
;
2692 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].sector
= cardAUTHSC
;
2693 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].keytype
= cardAUTHKEY
;
2694 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].nonce
= nonce
;
2695 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].nr
= nr
;
2696 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].ar
= ar
;
2697 ar_nr_collected
[i
+ATTACK_KEY_COUNT
]++;
2698 } else { // second nonce collect (std and moebius)
2699 ar_nr_resp
[i
+mM
].nonce2
= nonce
;
2700 ar_nr_resp
[i
+mM
].nr2
= nr
;
2701 ar_nr_resp
[i
+mM
].ar2
= ar
;
2702 if (!gettingMoebius
) {
2704 // check if this was the last second nonce we need for std attack
2705 if ( nonce2_count
== nonce1_count
) {
2706 // done collecting std test switch to moebius
2707 // first finish incrementing last sample
2708 ar_nr_collected
[i
+mM
]++;
2709 // switch to moebius collection
2710 gettingMoebius
= true;
2711 mM
= ATTACK_KEY_COUNT
;
2712 if (flags
& FLAG_RANDOM_NONCE
) {
2721 // if we've collected all the nonces we need - finish.
2722 if (nonce1_count
== moebius_n_count
) finished
= true;
2725 ar_nr_collected
[i
+mM
]++;
2728 // we found right spot for this nonce stop looking
2735 crypto1_word(pcs
, nr
, 1);
2736 cardRr
= ar
^ crypto1_word(pcs
, 0, 0);
2739 if (cardRr
!= prng_successor(nonce
, 64)){
2740 if (MF_DBGLEVEL
>= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2741 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2742 cardRr
, prng_successor(nonce
, 64));
2743 // Shouldn't we respond anything here?
2744 // Right now, we don't nack or anything, which causes the
2745 // reader to do a WUPA after a while. /Martin
2746 // -- which is the correct response. /piwi
2747 cardSTATE_TO_IDLE();
2748 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2753 ans
= prng_successor(nonce
, 96) ^ crypto1_word(pcs
, 0, 0);
2755 num_to_bytes(ans
, 4, rAUTH_AT
);
2757 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2759 cardSTATE
= MFEMUL_WORK
;
2760 if (MF_DBGLEVEL
>= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2761 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2762 GetTickCount() - authTimer
);
2765 case MFEMUL_SELECT2
:{
2767 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2770 // select all cl2 - 0x95 0x20
2771 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2
&& receivedCmd
[1] == 0x20)) {
2772 EmSendCmd(rUIDBCC2
, sizeof(rUIDBCC2
));
2776 // select cl2 card - 0x95 0x70 xxxxxxxxxxxx
2778 (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2
&& receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC2
, 4) == 0)) {
2781 EmSendCmd(rSAKfinal
, sizeof(rSAKfinal
));
2782 cardSTATE
= MFEMUL_WORK
;
2784 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer
);
2787 EmSendCmd(rSAK1
, sizeof(rSAK1
));
2788 cardSTATE
= MFEMUL_SELECT3
;
2795 // i guess there is a command). go into the work state.
2797 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2800 cardSTATE
= MFEMUL_WORK
;
2802 //intentional fall-through to the next case-stmt
2807 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2811 bool encrypted_data
= (cardAUTHKEY
!= 0xFF) ;
2813 if(encrypted_data
) {
2815 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2818 if (len
== 4 && (receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61)) {
2820 // if authenticating to a block that shouldn't exist - as long as we are not doing the reader attack
2821 if (receivedCmd
[1] >= 16 * 4 && !(flags
& FLAG_NR_AR_ATTACK
)) {
2822 //is this the correct response to an auth on a out of range block? marshmellow
2823 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2824 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02x) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2828 authTimer
= GetTickCount();
2829 cardAUTHSC
= receivedCmd
[1] / 4; // received block num
2830 cardAUTHKEY
= receivedCmd
[0] - 0x60;
2831 crypto1_destroy(pcs
);//Added by martin
2832 crypto1_create(pcs
, emlGetKey(cardAUTHSC
, cardAUTHKEY
));
2833 //uint64_t key=emlGetKey(cardAUTHSC, cardAUTHKEY);
2834 //Dbprintf("key: %04x%08x",(uint32_t)(key>>32)&0xFFFF,(uint32_t)(key&0xFFFFFFFF));
2836 if (!encrypted_data
) { // first authentication
2837 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2839 crypto1_word(pcs
, cuid
^ nonce
, 0);//Update crypto state
2840 num_to_bytes(nonce
, 4, rAUTH_AT
); // Send nonce
2841 } else { // nested authentication
2842 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2843 ans
= nonce
^ crypto1_word(pcs
, cuid
^ nonce
, 0);
2844 num_to_bytes(ans
, 4, rAUTH_AT
);
2847 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2848 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2849 cardSTATE
= MFEMUL_AUTH1
;
2853 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2854 // BUT... ACK --> NACK
2855 if (len
== 1 && receivedCmd
[0] == CARD_ACK
) {
2856 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2860 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2861 if (len
== 1 && receivedCmd
[0] == CARD_NACK_NA
) {
2862 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2867 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2871 if(receivedCmd
[0] == 0x30 // read block
2872 || receivedCmd
[0] == 0xA0 // write block
2873 || receivedCmd
[0] == 0xC0 // inc
2874 || receivedCmd
[0] == 0xC1 // dec
2875 || receivedCmd
[0] == 0xC2 // restore
2876 || receivedCmd
[0] == 0xB0) { // transfer
2877 if (receivedCmd
[1] >= 16 * 4) {
2878 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2879 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02x) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2883 if (receivedCmd
[1] / 4 != cardAUTHSC
) {
2884 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2885 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02x) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],cardAUTHSC
);
2890 if (receivedCmd
[0] == 0x30) {
2891 if (MF_DBGLEVEL
>= 4) {
2892 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd
[1],receivedCmd
[1]);
2894 emlGetMem(response
, receivedCmd
[1], 1);
2895 AppendCrc14443a(response
, 16);
2896 mf_crypto1_encrypt(pcs
, response
, 18, response_par
);
2897 EmSendCmdPar(response
, 18, response_par
);
2899 if(exitAfterNReads
> 0 && numReads
== exitAfterNReads
) {
2900 Dbprintf("%d reads done, exiting", numReads
);
2906 if (receivedCmd
[0] == 0xA0) {
2907 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd
[1],receivedCmd
[1]);
2908 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2909 cardSTATE
= MFEMUL_WRITEBL2
;
2910 cardWRBL
= receivedCmd
[1];
2913 // increment, decrement, restore
2914 if (receivedCmd
[0] == 0xC0 || receivedCmd
[0] == 0xC1 || receivedCmd
[0] == 0xC2) {
2915 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2916 if (emlCheckValBl(receivedCmd
[1])) {
2917 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2918 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2921 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2922 if (receivedCmd
[0] == 0xC1)
2923 cardSTATE
= MFEMUL_INTREG_INC
;
2924 if (receivedCmd
[0] == 0xC0)
2925 cardSTATE
= MFEMUL_INTREG_DEC
;
2926 if (receivedCmd
[0] == 0xC2)
2927 cardSTATE
= MFEMUL_INTREG_REST
;
2928 cardWRBL
= receivedCmd
[1];
2932 if (receivedCmd
[0] == 0xB0) {
2933 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2934 if (emlSetValBl(cardINTREG
, cardINTBLOCK
, receivedCmd
[1]))
2935 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2937 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2941 if (receivedCmd
[0] == 0x50 && receivedCmd
[1] == 0x00) {
2944 cardSTATE
= MFEMUL_HALTED
;
2945 if (MF_DBGLEVEL
>= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer
);
2946 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2950 if (receivedCmd
[0] == 0xe0) {//RATS
2951 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2954 // command not allowed
2955 if (MF_DBGLEVEL
>= 4) Dbprintf("Received command not allowed, nacking");
2956 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2959 case MFEMUL_WRITEBL2
:{
2961 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2962 emlSetMem(receivedCmd
, cardWRBL
, 1);
2963 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2964 cardSTATE
= MFEMUL_WORK
;
2966 cardSTATE_TO_IDLE();
2967 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2972 case MFEMUL_INTREG_INC
:{
2973 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2974 memcpy(&ans
, receivedCmd
, 4);
2975 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2976 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2977 cardSTATE_TO_IDLE();
2980 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2981 cardINTREG
= cardINTREG
+ ans
;
2982 cardSTATE
= MFEMUL_WORK
;
2985 case MFEMUL_INTREG_DEC
:{
2986 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2987 memcpy(&ans
, receivedCmd
, 4);
2988 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2989 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2990 cardSTATE_TO_IDLE();
2993 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
2994 cardINTREG
= cardINTREG
- ans
;
2995 cardSTATE
= MFEMUL_WORK
;
2998 case MFEMUL_INTREG_REST
:{
2999 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
3000 memcpy(&ans
, receivedCmd
, 4);
3001 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
3002 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
3003 cardSTATE_TO_IDLE();
3006 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
3007 cardSTATE
= MFEMUL_WORK
;
3011 button_pushed
= BUTTON_PRESS();
3014 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
3017 if(flags
& FLAG_NR_AR_ATTACK
&& MF_DBGLEVEL
>= 1) {
3018 for ( uint8_t i
= 0; i
< ATTACK_KEY_COUNT
; i
++) {
3019 if (ar_nr_collected
[i
] == 2) {
3020 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i
<ATTACK_KEY_COUNT
/2) ? "keyA" : "keyB", ar_nr_resp
[i
].sector
);
3021 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
3022 ar_nr_resp
[i
].cuid
, //UID
3023 ar_nr_resp
[i
].nonce
, //NT
3024 ar_nr_resp
[i
].nr
, //NR1
3025 ar_nr_resp
[i
].ar
, //AR1
3026 ar_nr_resp
[i
].nr2
, //NR2
3027 ar_nr_resp
[i
].ar2
//AR2
3031 for ( uint8_t i
= ATTACK_KEY_COUNT
; i
< ATTACK_KEY_COUNT
*2; i
++) {
3032 if (ar_nr_collected
[i
] == 2) {
3033 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i
<ATTACK_KEY_COUNT
/2) ? "keyA" : "keyB", ar_nr_resp
[i
].sector
);
3034 Dbprintf("../tools/mfkey/mfkey32v2 %08x %08x %08x %08x %08x %08x %08x",
3035 ar_nr_resp
[i
].cuid
, //UID
3036 ar_nr_resp
[i
].nonce
, //NT
3037 ar_nr_resp
[i
].nr
, //NR1
3038 ar_nr_resp
[i
].ar
, //AR1
3039 ar_nr_resp
[i
].nonce2
,//NT2
3040 ar_nr_resp
[i
].nr2
, //NR2
3041 ar_nr_resp
[i
].ar2
//AR2
3046 if (MF_DBGLEVEL
>= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing
, BigBuf_get_traceLen());
3048 if(flags
& FLAG_INTERACTIVE
) { // Interactive mode flag, means we need to send ACK
3049 //Send the collected ar_nr in the response
3050 cmd_send(CMD_ACK
,CMD_SIMULATE_MIFARE_CARD
,button_pushed
,0,&ar_nr_resp
,sizeof(ar_nr_resp
));
3055 //-----------------------------------------------------------------------------
3058 //-----------------------------------------------------------------------------
3059 void RAMFUNC
SniffMifare(uint8_t param
) {
3061 // bit 0 - trigger from first card answer
3062 // bit 1 - trigger from first reader 7-bit request
3064 // C(red) A(yellow) B(green)
3066 // init trace buffer
3070 // The command (reader -> tag) that we're receiving.
3071 // The length of a received command will in most cases be no more than 18 bytes.
3072 // So 32 should be enough!
3073 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
3074 uint8_t receivedCmdPar
[MAX_MIFARE_PARITY_SIZE
];
3075 // The response (tag -> reader) that we're receiving.
3076 uint8_t receivedResponse
[MAX_MIFARE_FRAME_SIZE
];
3077 uint8_t receivedResponsePar
[MAX_MIFARE_PARITY_SIZE
];
3079 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
3081 // free eventually allocated BigBuf memory
3083 // allocate the DMA buffer, used to stream samples from the FPGA
3084 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
3085 uint8_t *data
= dmaBuf
;
3086 uint8_t previous_data
= 0;
3089 bool ReaderIsActive
= false;
3090 bool TagIsActive
= false;
3092 // Set up the demodulator for tag -> reader responses.
3093 DemodInit(receivedResponse
, receivedResponsePar
);
3095 // Set up the demodulator for the reader -> tag commands
3096 UartInit(receivedCmd
, receivedCmdPar
);
3098 // Setup for the DMA.
3099 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
3106 // And now we loop, receiving samples.
3107 for(uint32_t sniffCounter
= 0; true; ) {
3109 if(BUTTON_PRESS()) {
3110 DbpString("cancelled by button");
3117 if ((sniffCounter
& 0x0000FFFF) == 0) { // from time to time
3118 // check if a transaction is completed (timeout after 2000ms).
3119 // if yes, stop the DMA transfer and send what we have so far to the client
3120 if (MfSniffSend(2000)) {
3121 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3125 ReaderIsActive
= false;
3126 TagIsActive
= false;
3127 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
3131 int register readBufDataP
= data
- dmaBuf
; // number of bytes we have processed so far
3132 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
; // number of bytes already transferred
3133 if (readBufDataP
<= dmaBufDataP
){ // we are processing the same block of data which is currently being transferred
3134 dataLen
= dmaBufDataP
- readBufDataP
; // number of bytes still to be processed
3136 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
; // number of bytes still to be processed
3138 // test for length of buffer
3139 if(dataLen
> maxDataLen
) { // we are more behind than ever...
3140 maxDataLen
= dataLen
;
3141 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
3142 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen
);
3146 if(dataLen
< 1) continue;
3148 // primary buffer was stopped ( <-- we lost data!
3149 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
3150 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
3151 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
3152 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
3154 // secondary buffer sets as primary, secondary buffer was stopped
3155 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
3156 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
3157 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
3162 if (sniffCounter
& 0x01) {
3164 if(!TagIsActive
) { // no need to try decoding tag data if the reader is sending
3165 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
3166 if(MillerDecoding(readerdata
, (sniffCounter
-1)*4)) {
3168 if (MfSniffLogic(receivedCmd
, Uart
.len
, Uart
.parity
, Uart
.bitCount
, true)) break;
3170 /* And ready to receive another command. */
3171 UartInit(receivedCmd
, receivedCmdPar
);
3173 /* And also reset the demod code */
3176 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
3179 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending
3180 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
3181 if(ManchesterDecoding(tagdata
, 0, (sniffCounter
-1)*4)) {
3184 if (MfSniffLogic(receivedResponse
, Demod
.len
, Demod
.parity
, Demod
.bitCount
, false)) break;
3186 // And ready to receive another response.
3188 // And reset the Miller decoder including its (now outdated) input buffer
3189 UartInit(receivedCmd
, receivedCmdPar
);
3191 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
3195 previous_data
= *data
;
3198 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
3204 DbpString("COMMAND FINISHED");
3206 FpgaDisableSscDma();
3209 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen
, Uart
.state
, Uart
.len
);