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REM: Remove a double pasted section of local variables.
[proxmark3-svn] / armsrc / iso14443a.c
1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1.h"
21 #include "mifareutil.h"
22 #include "BigBuf.h"
23 static uint32_t iso14a_timeout;
24 int rsamples = 0;
25 uint8_t trigger = 0;
26 // the block number for the ISO14443-4 PCB
27 static uint8_t iso14_pcb_blocknum = 0;
28
29 //
30 // ISO14443 timing:
31 //
32 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
33 #define REQUEST_GUARD_TIME (7000/16 + 1)
34 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
35 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
36 // bool LastCommandWasRequest = FALSE;
37
38 //
39 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
40 //
41 // When the PM acts as reader and is receiving tag data, it takes
42 // 3 ticks delay in the AD converter
43 // 16 ticks until the modulation detector completes and sets curbit
44 // 8 ticks until bit_to_arm is assigned from curbit
45 // 8*16 ticks for the transfer from FPGA to ARM
46 // 4*16 ticks until we measure the time
47 // - 8*16 ticks because we measure the time of the previous transfer
48 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
49
50 // When the PM acts as a reader and is sending, it takes
51 // 4*16 ticks until we can write data to the sending hold register
52 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
53 // 8 ticks until the first transfer starts
54 // 8 ticks later the FPGA samples the data
55 // 1 tick to assign mod_sig_coil
56 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
57
58 // When the PM acts as tag and is receiving it takes
59 // 2 ticks delay in the RF part (for the first falling edge),
60 // 3 ticks for the A/D conversion,
61 // 8 ticks on average until the start of the SSC transfer,
62 // 8 ticks until the SSC samples the first data
63 // 7*16 ticks to complete the transfer from FPGA to ARM
64 // 8 ticks until the next ssp_clk rising edge
65 // 4*16 ticks until we measure the time
66 // - 8*16 ticks because we measure the time of the previous transfer
67 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
68
69 // The FPGA will report its internal sending delay in
70 uint16_t FpgaSendQueueDelay;
71 // the 5 first bits are the number of bits buffered in mod_sig_buf
72 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
73 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
74
75 // When the PM acts as tag and is sending, it takes
76 // 4*16 ticks until we can write data to the sending hold register
77 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
78 // 8 ticks until the first transfer starts
79 // 8 ticks later the FPGA samples the data
80 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
81 // + 1 tick to assign mod_sig_coil
82 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
83
84 // When the PM acts as sniffer and is receiving tag data, it takes
85 // 3 ticks A/D conversion
86 // 14 ticks to complete the modulation detection
87 // 8 ticks (on average) until the result is stored in to_arm
88 // + the delays in transferring data - which is the same for
89 // sniffing reader and tag data and therefore not relevant
90 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
91
92 // When the PM acts as sniffer and is receiving reader data, it takes
93 // 2 ticks delay in analogue RF receiver (for the falling edge of the
94 // start bit, which marks the start of the communication)
95 // 3 ticks A/D conversion
96 // 8 ticks on average until the data is stored in to_arm.
97 // + the delays in transferring data - which is the same for
98 // sniffing reader and tag data and therefore not relevant
99 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
100
101 //variables used for timing purposes:
102 //these are in ssp_clk cycles:
103 static uint32_t NextTransferTime;
104 static uint32_t LastTimeProxToAirStart;
105 static uint32_t LastProxToAirDuration;
106
107
108
109 // CARD TO READER - manchester
110 // Sequence D: 11110000 modulation with subcarrier during first half
111 // Sequence E: 00001111 modulation with subcarrier during second half
112 // Sequence F: 00000000 no modulation with subcarrier
113 // READER TO CARD - miller
114 // Sequence X: 00001100 drop after half a period
115 // Sequence Y: 00000000 no drop
116 // Sequence Z: 11000000 drop at start
117 #define SEC_D 0xf0
118 #define SEC_E 0x0f
119 #define SEC_F 0x00
120 #define SEC_X 0x0c
121 #define SEC_Y 0x00
122 #define SEC_Z 0xc0
123
124 const uint8_t OddByteParity[256] = {
125 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
126 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
127 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
128 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
129 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
130 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
131 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
132 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
138 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
139 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
140 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
141 };
142
143
144 void iso14a_set_trigger(bool enable) {
145 trigger = enable;
146 }
147
148
149 void iso14a_set_timeout(uint32_t timeout) {
150 iso14a_timeout = timeout;
151 if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106);
152 }
153
154
155 void iso14a_set_ATS_timeout(uint8_t *ats) {
156
157 uint8_t tb1;
158 uint8_t fwi;
159 uint32_t fwt;
160
161 if (ats[0] > 1) { // there is a format byte T0
162 if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
163 if ((ats[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1)
164 tb1 = ats[3];
165 } else {
166 tb1 = ats[2];
167 }
168 fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI)
169 fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
170
171 iso14a_set_timeout(fwt/(8*16));
172 }
173 }
174 }
175
176
177 //-----------------------------------------------------------------------------
178 // Generate the parity value for a byte sequence
179 //
180 //-----------------------------------------------------------------------------
181 byte_t oddparity (const byte_t bt)
182 {
183 return OddByteParity[bt];
184 }
185
186 void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par)
187 {
188 uint16_t paritybit_cnt = 0;
189 uint16_t paritybyte_cnt = 0;
190 uint8_t parityBits = 0;
191
192 for (uint16_t i = 0; i < iLen; i++) {
193 // Generate the parity bits
194 parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt));
195 if (paritybit_cnt == 7) {
196 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
197 parityBits = 0; // and advance to next Parity Byte
198 paritybyte_cnt++;
199 paritybit_cnt = 0;
200 } else {
201 paritybit_cnt++;
202 }
203 }
204
205 // save remaining parity bits
206 par[paritybyte_cnt] = parityBits;
207
208 }
209
210 void AppendCrc14443a(uint8_t* data, int len)
211 {
212 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
213 }
214
215 void AppendCrc14443b(uint8_t* data, int len)
216 {
217 ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1);
218 }
219
220
221 //=============================================================================
222 // ISO 14443 Type A - Miller decoder
223 //=============================================================================
224 // Basics:
225 // This decoder is used when the PM3 acts as a tag.
226 // The reader will generate "pauses" by temporarily switching of the field.
227 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
228 // The FPGA does a comparison with a threshold and would deliver e.g.:
229 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
230 // The Miller decoder needs to identify the following sequences:
231 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
232 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
233 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
234 // Note 1: the bitstream may start at any time. We therefore need to sync.
235 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
236 //-----------------------------------------------------------------------------
237 static tUart Uart;
238
239 // Lookup-Table to decide if 4 raw bits are a modulation.
240 // We accept the following:
241 // 0001 - a 3 tick wide pause
242 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
243 // 0111 - a 2 tick wide pause shifted left
244 // 1001 - a 2 tick wide pause shifted right
245 const bool Mod_Miller_LUT[] = {
246 FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE,
247 FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
248 };
249 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
250 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
251
252 void UartReset()
253 {
254 Uart.state = STATE_UNSYNCD;
255 Uart.bitCount = 0;
256 Uart.len = 0; // number of decoded data bytes
257 Uart.parityLen = 0; // number of decoded parity bytes
258 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
259 Uart.parityBits = 0; // holds 8 parity bits
260 Uart.startTime = 0;
261 Uart.endTime = 0;
262
263 Uart.byteCntMax = 0;
264 Uart.posCnt = 0;
265 Uart.syncBit = 9999;
266 }
267
268 void UartInit(uint8_t *data, uint8_t *parity)
269 {
270 Uart.output = data;
271 Uart.parity = parity;
272 Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits
273 UartReset();
274 }
275
276 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
277 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
278 {
279
280 Uart.fourBits = (Uart.fourBits << 8) | bit;
281
282 if (Uart.state == STATE_UNSYNCD) { // not yet synced
283
284 Uart.syncBit = 9999; // not set
285
286 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
287 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
288 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
289
290 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
291 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
292 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
293 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
294 //
295 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
296 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
297
298 if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7;
299 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6;
300 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5;
301 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4;
302 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3;
303 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2;
304 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1;
305 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0;
306
307 if (Uart.syncBit != 9999) { // found a sync bit
308 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
309 Uart.startTime -= Uart.syncBit;
310 Uart.endTime = Uart.startTime;
311 Uart.state = STATE_START_OF_COMMUNICATION;
312 }
313
314 } else {
315
316 if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
317 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
318 UartReset();
319 } else { // Modulation in first half = Sequence Z = logic "0"
320 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
321 UartReset();
322 } else {
323 Uart.bitCount++;
324 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
325 Uart.state = STATE_MILLER_Z;
326 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
327 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
328 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
329 Uart.parityBits <<= 1; // make room for the parity bit
330 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
331 Uart.bitCount = 0;
332 Uart.shiftReg = 0;
333 if((Uart.len&0x0007) == 0) { // every 8 data bytes
334 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
335 Uart.parityBits = 0;
336 }
337 }
338 }
339 }
340 } else {
341 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
342 Uart.bitCount++;
343 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
344 Uart.state = STATE_MILLER_X;
345 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
346 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
347 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
348 Uart.parityBits <<= 1; // make room for the new parity bit
349 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
350 Uart.bitCount = 0;
351 Uart.shiftReg = 0;
352 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
353 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
354 Uart.parityBits = 0;
355 }
356 }
357 } else { // no modulation in both halves - Sequence Y
358 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
359 Uart.state = STATE_UNSYNCD;
360 Uart.bitCount--; // last "0" was part of EOC sequence
361 Uart.shiftReg <<= 1; // drop it
362 if(Uart.bitCount > 0) { // if we decoded some bits
363 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
364 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
365 Uart.parityBits <<= 1; // add a (void) parity bit
366 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
367 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
368 return TRUE;
369 } else if (Uart.len & 0x0007) { // there are some parity bits to store
370 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
371 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
372 }
373 if (Uart.len) {
374 return TRUE; // we are finished with decoding the raw data sequence
375 } else {
376 UartReset(); // Nothing received - start over
377 }
378 }
379 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
380 UartReset();
381 } else { // a logic "0"
382 Uart.bitCount++;
383 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
384 Uart.state = STATE_MILLER_Y;
385 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
386 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
387 Uart.parityBits <<= 1; // make room for the parity bit
388 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
389 Uart.bitCount = 0;
390 Uart.shiftReg = 0;
391 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
392 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
393 Uart.parityBits = 0;
394 }
395 }
396 }
397 }
398 }
399
400 }
401
402 return FALSE; // not finished yet, need more data
403 }
404
405
406
407 //=============================================================================
408 // ISO 14443 Type A - Manchester decoder
409 //=============================================================================
410 // Basics:
411 // This decoder is used when the PM3 acts as a reader.
412 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
413 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
414 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
415 // The Manchester decoder needs to identify the following sequences:
416 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
417 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
418 // 8 ticks unmodulated: Sequence F = end of communication
419 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
420 // Note 1: the bitstream may start at any time. We therefore need to sync.
421 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
422 static tDemod Demod;
423
424 // Lookup-Table to decide if 4 raw bits are a modulation.
425 // We accept three or four "1" in any position
426 const bool Mod_Manchester_LUT[] = {
427 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
428 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
429 };
430
431 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
432 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
433
434
435 void DemodReset()
436 {
437 Demod.state = DEMOD_UNSYNCD;
438 Demod.len = 0; // number of decoded data bytes
439 Demod.parityLen = 0;
440 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
441 Demod.parityBits = 0; //
442 Demod.collisionPos = 0; // Position of collision bit
443 Demod.twoBits = 0xffff; // buffer for 2 Bits
444 Demod.highCnt = 0;
445 Demod.startTime = 0;
446 Demod.endTime = 0;
447
448 //
449 Demod.bitCount = 0;
450 Demod.syncBit = 0xFFFF;
451 Demod.samples = 0;
452 }
453
454 void DemodInit(uint8_t *data, uint8_t *parity)
455 {
456 Demod.output = data;
457 Demod.parity = parity;
458 DemodReset();
459 }
460
461 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
462 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
463 {
464
465 Demod.twoBits = (Demod.twoBits << 8) | bit;
466
467 if (Demod.state == DEMOD_UNSYNCD) {
468
469 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
470 if (Demod.twoBits == 0x0000) {
471 Demod.highCnt++;
472 } else {
473 Demod.highCnt = 0;
474 }
475 } else {
476 Demod.syncBit = 0xFFFF; // not set
477 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
478 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
479 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
480 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
481 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
482 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
483 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
484 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
485 if (Demod.syncBit != 0xFFFF) {
486 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
487 Demod.startTime -= Demod.syncBit;
488 Demod.bitCount = offset; // number of decoded data bits
489 Demod.state = DEMOD_MANCHESTER_DATA;
490 }
491 }
492
493 } else {
494
495 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
496 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
497 if (!Demod.collisionPos) {
498 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
499 }
500 } // modulation in first half only - Sequence D = 1
501 Demod.bitCount++;
502 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
503 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
504 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
505 Demod.parityBits <<= 1; // make room for the parity bit
506 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
507 Demod.bitCount = 0;
508 Demod.shiftReg = 0;
509 if((Demod.len&0x0007) == 0) { // every 8 data bytes
510 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
511 Demod.parityBits = 0;
512 }
513 }
514 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
515 } else { // no modulation in first half
516 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
517 Demod.bitCount++;
518 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
519 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
520 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
521 Demod.parityBits <<= 1; // make room for the new parity bit
522 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
523 Demod.bitCount = 0;
524 Demod.shiftReg = 0;
525 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
526 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
527 Demod.parityBits = 0;
528 }
529 }
530 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
531 } else { // no modulation in both halves - End of communication
532 if(Demod.bitCount > 0) { // there are some remaining data bits
533 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
534 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
535 Demod.parityBits <<= 1; // add a (void) parity bit
536 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
537 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
538 return TRUE;
539 } else if (Demod.len & 0x0007) { // there are some parity bits to store
540 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
541 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
542 }
543 if (Demod.len) {
544 return TRUE; // we are finished with decoding the raw data sequence
545 } else { // nothing received. Start over
546 DemodReset();
547 }
548 }
549 }
550 }
551 return FALSE; // not finished yet, need more data
552 }
553
554 //=============================================================================
555 // Finally, a `sniffer' for ISO 14443 Type A
556 // Both sides of communication!
557 //=============================================================================
558
559 //-----------------------------------------------------------------------------
560 // Record the sequence of commands sent by the reader to the tag, with
561 // triggering so that we start recording at the point that the tag is moved
562 // near the reader.
563 //-----------------------------------------------------------------------------
564 void RAMFUNC SniffIso14443a(uint8_t param) {
565 // param:
566 // bit 0 - trigger from first card answer
567 // bit 1 - trigger from first reader 7-bit request
568 LEDsoff();
569
570 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
571
572 // Allocate memory from BigBuf for some buffers
573 // free all previous allocations first
574 BigBuf_free();
575
576 // init trace buffer
577 clear_trace();
578 set_tracing(TRUE);
579
580 // The command (reader -> tag) that we're receiving.
581 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
582 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
583
584 // The response (tag -> reader) that we're receiving.
585 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
586 uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE);
587
588 // The DMA buffer, used to stream samples from the FPGA
589 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
590
591 uint8_t *data = dmaBuf;
592 uint8_t previous_data = 0;
593 int maxDataLen = 0;
594 int dataLen = 0;
595 bool TagIsActive = FALSE;
596 bool ReaderIsActive = FALSE;
597
598 // Set up the demodulator for tag -> reader responses.
599 DemodInit(receivedResponse, receivedResponsePar);
600
601 // Set up the demodulator for the reader -> tag commands
602 UartInit(receivedCmd, receivedCmdPar);
603
604 // Setup and start DMA.
605 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
606
607 // We won't start recording the frames that we acquire until we trigger;
608 // a good trigger condition to get started is probably when we see a
609 // response from the tag.
610 // triggered == FALSE -- to wait first for card
611 bool triggered = !(param & 0x03);
612
613 // And now we loop, receiving samples.
614 for(uint32_t rsamples = 0; TRUE; ) {
615
616 if(BUTTON_PRESS()) {
617 DbpString("cancelled by button");
618 break;
619 }
620
621 LED_A_ON();
622 WDT_HIT();
623
624 int register readBufDataP = data - dmaBuf;
625 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
626 if (readBufDataP <= dmaBufDataP){
627 dataLen = dmaBufDataP - readBufDataP;
628 } else {
629 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
630 }
631 // test for length of buffer
632 if(dataLen > maxDataLen) {
633 maxDataLen = dataLen;
634 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
635 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
636 break;
637 }
638 }
639 if(dataLen < 1) continue;
640
641 // primary buffer was stopped( <-- we lost data!
642 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
643 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
644 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
645 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
646 }
647 // secondary buffer sets as primary, secondary buffer was stopped
648 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
649 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
650 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
651 }
652
653 LED_A_OFF();
654
655 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
656
657 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
658 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
659 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
660 LED_C_ON();
661
662 // check - if there is a short 7bit request from reader
663 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
664
665 if(triggered) {
666 if (!LogTrace(receivedCmd,
667 Uart.len,
668 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
669 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
670 Uart.parity,
671 TRUE)) break;
672 }
673 /* And ready to receive another command. */
674 UartReset();
675 /* And also reset the demod code, which might have been */
676 /* false-triggered by the commands from the reader. */
677 DemodReset();
678 LED_B_OFF();
679 }
680 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
681 }
682
683 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
684 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
685 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
686 LED_B_ON();
687
688 if (!LogTrace(receivedResponse,
689 Demod.len,
690 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
691 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
692 Demod.parity,
693 FALSE)) break;
694
695 if ((!triggered) && (param & 0x01)) triggered = TRUE;
696
697 // And ready to receive another response.
698 DemodReset();
699 // And reset the Miller decoder including itS (now outdated) input buffer
700 UartInit(receivedCmd, receivedCmdPar);
701
702 LED_C_OFF();
703 }
704 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
705 }
706 }
707
708 previous_data = *data;
709 rsamples++;
710 data++;
711 if(data == dmaBuf + DMA_BUFFER_SIZE) {
712 data = dmaBuf;
713 }
714 } // main cycle
715
716 FpgaDisableSscDma();
717 LEDsoff();
718
719 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
720 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]);
721 }
722
723 //-----------------------------------------------------------------------------
724 // Prepare tag messages
725 //-----------------------------------------------------------------------------
726 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
727 {
728 ToSendReset();
729
730 // Correction bit, might be removed when not needed
731 ToSendStuffBit(0);
732 ToSendStuffBit(0);
733 ToSendStuffBit(0);
734 ToSendStuffBit(0);
735 ToSendStuffBit(1); // 1
736 ToSendStuffBit(0);
737 ToSendStuffBit(0);
738 ToSendStuffBit(0);
739
740 // Send startbit
741 ToSend[++ToSendMax] = SEC_D;
742 LastProxToAirDuration = 8 * ToSendMax - 4;
743
744 for(uint16_t i = 0; i < len; i++) {
745 uint8_t b = cmd[i];
746
747 // Data bits
748 for(uint16_t j = 0; j < 8; j++) {
749 if(b & 1) {
750 ToSend[++ToSendMax] = SEC_D;
751 } else {
752 ToSend[++ToSendMax] = SEC_E;
753 }
754 b >>= 1;
755 }
756
757 // Get the parity bit
758 if (parity[i>>3] & (0x80>>(i&0x0007))) {
759 ToSend[++ToSendMax] = SEC_D;
760 LastProxToAirDuration = 8 * ToSendMax - 4;
761 } else {
762 ToSend[++ToSendMax] = SEC_E;
763 LastProxToAirDuration = 8 * ToSendMax;
764 }
765 }
766
767 // Send stopbit
768 ToSend[++ToSendMax] = SEC_F;
769
770 // Convert from last byte pos to length
771 ToSendMax++;
772 }
773
774 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
775 {
776 uint8_t par[MAX_PARITY_SIZE];
777
778 GetParity(cmd, len, par);
779 CodeIso14443aAsTagPar(cmd, len, par);
780 }
781
782
783 static void Code4bitAnswerAsTag(uint8_t cmd)
784 {
785 int i;
786
787 ToSendReset();
788
789 // Correction bit, might be removed when not needed
790 ToSendStuffBit(0);
791 ToSendStuffBit(0);
792 ToSendStuffBit(0);
793 ToSendStuffBit(0);
794 ToSendStuffBit(1); // 1
795 ToSendStuffBit(0);
796 ToSendStuffBit(0);
797 ToSendStuffBit(0);
798
799 // Send startbit
800 ToSend[++ToSendMax] = SEC_D;
801
802 uint8_t b = cmd;
803 for(i = 0; i < 4; i++) {
804 if(b & 1) {
805 ToSend[++ToSendMax] = SEC_D;
806 LastProxToAirDuration = 8 * ToSendMax - 4;
807 } else {
808 ToSend[++ToSendMax] = SEC_E;
809 LastProxToAirDuration = 8 * ToSendMax;
810 }
811 b >>= 1;
812 }
813
814 // Send stopbit
815 ToSend[++ToSendMax] = SEC_F;
816
817 // Convert from last byte pos to length
818 ToSendMax++;
819 }
820
821 //-----------------------------------------------------------------------------
822 // Wait for commands from reader
823 // Stop when button is pressed
824 // Or return TRUE when command is captured
825 //-----------------------------------------------------------------------------
826 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
827 {
828 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
829 // only, since we are receiving, not transmitting).
830 // Signal field is off with the appropriate LED
831 LED_D_OFF();
832 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
833
834 // Now run a `software UART' on the stream of incoming samples.
835 UartInit(received, parity);
836
837 // clear RXRDY:
838 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
839
840 for(;;) {
841 WDT_HIT();
842
843 if(BUTTON_PRESS()) return FALSE;
844
845 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
846 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
847 if(MillerDecoding(b, 0)) {
848 *len = Uart.len;
849 return TRUE;
850 }
851 }
852 }
853 }
854
855 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
856 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
857 int EmSend4bit(uint8_t resp);
858 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
859 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
860 int EmSendCmd(uint8_t *resp, uint16_t respLen);
861 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
862 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
863 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
864
865 static uint8_t* free_buffer_pointer;
866
867 typedef struct {
868 uint8_t* response;
869 size_t response_n;
870 uint8_t* modulation;
871 size_t modulation_n;
872 uint32_t ProxToAirDuration;
873 } tag_response_info_t;
874
875 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
876 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
877 // This will need the following byte array for a modulation sequence
878 // 144 data bits (18 * 8)
879 // 18 parity bits
880 // 2 Start and stop
881 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
882 // 1 just for the case
883 // ----------- +
884 // 166 bytes, since every bit that needs to be send costs us a byte
885 //
886
887
888 // Prepare the tag modulation bits from the message
889 CodeIso14443aAsTag(response_info->response,response_info->response_n);
890
891 // Make sure we do not exceed the free buffer space
892 if (ToSendMax > max_buffer_size) {
893 Dbprintf("Out of memory, when modulating bits for tag answer:");
894 Dbhexdump(response_info->response_n,response_info->response,false);
895 return false;
896 }
897
898 // Copy the byte array, used for this modulation to the buffer position
899 memcpy(response_info->modulation,ToSend,ToSendMax);
900
901 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
902 response_info->modulation_n = ToSendMax;
903 response_info->ProxToAirDuration = LastProxToAirDuration;
904
905 return true;
906 }
907
908
909 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
910 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
911 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
912 // -> need 273 bytes buffer
913 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
914 // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
915 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
916
917 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
918 // Retrieve and store the current buffer index
919 response_info->modulation = free_buffer_pointer;
920
921 // Determine the maximum size we can use from our buffer
922 size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE;
923
924 // Forward the prepare tag modulation function to the inner function
925 if (prepare_tag_modulation(response_info, max_buffer_size)) {
926 // Update the free buffer offset
927 free_buffer_pointer += ToSendMax;
928 return true;
929 } else {
930 return false;
931 }
932 }
933
934 //-----------------------------------------------------------------------------
935 // Main loop of simulated tag: receive commands from reader, decide what
936 // response to send, and send it.
937 //-----------------------------------------------------------------------------
938 void SimulateIso14443aTag(int tagType, int flags, int uid_2nd, byte_t* data)
939 {
940
941 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
942 // This can be used in a reader-only attack.
943 // (it can also be retrieved via 'hf 14a list', but hey...
944 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
945 uint8_t ar_nr_collected = 0;
946
947 uint8_t sak;
948
949 // PACK response to PWD AUTH for EV1/NTAG
950 uint8_t response8[4];
951
952 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
953 uint8_t response1[2];
954
955 switch (tagType) {
956 case 1: { // MIFARE Classic
957 // Says: I am Mifare 1k - original line
958 response1[0] = 0x04;
959 response1[1] = 0x00;
960 sak = 0x08;
961 } break;
962 case 2: { // MIFARE Ultralight
963 // Says: I am a stupid memory tag, no crypto
964 response1[0] = 0x44;
965 response1[1] = 0x00;
966 sak = 0x00;
967 } break;
968 case 3: { // MIFARE DESFire
969 // Says: I am a DESFire tag, ph33r me
970 response1[0] = 0x04;
971 response1[1] = 0x03;
972 sak = 0x20;
973 } break;
974 case 4: { // ISO/IEC 14443-4
975 // Says: I am a javacard (JCOP)
976 response1[0] = 0x04;
977 response1[1] = 0x00;
978 sak = 0x28;
979 } break;
980 case 5: { // MIFARE TNP3XXX
981 // Says: I am a toy
982 response1[0] = 0x01;
983 response1[1] = 0x0f;
984 sak = 0x01;
985 } break;
986 case 6: { // MIFARE Mini
987 // Says: I am a Mifare Mini, 320b
988 response1[0] = 0x44;
989 response1[1] = 0x00;
990 sak = 0x09;
991 } break;
992 case 7: { // NTAG?
993 // Says: I am a NTAG,
994 response1[0] = 0x44;
995 response1[1] = 0x00;
996 sak = 0x00;
997 // PACK
998 response8[0] = 0x80;
999 response8[1] = 0x80;
1000 ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]);
1001 } break;
1002 default: {
1003 Dbprintf("Error: unkown tagtype (%d)",tagType);
1004 return;
1005 } break;
1006 }
1007
1008 // The second response contains the (mandatory) first 24 bits of the UID
1009 uint8_t response2[5] = {0x00};
1010
1011 // Check if the uid uses the (optional) part
1012 uint8_t response2a[5] = {0x00};
1013
1014 if (flags & FLAG_7B_UID_IN_DATA) {
1015 response2[0] = 0x88;
1016 response2[1] = data[0];
1017 response2[2] = data[1];
1018 response2[3] = data[2];
1019
1020 response2a[0] = data[3];
1021 response2a[1] = data[4];
1022 response2a[2] = data[5];
1023 response2a[3] = data[6]; //??
1024 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1025
1026 // Configure the ATQA and SAK accordingly
1027 response1[0] |= 0x40;
1028 sak |= 0x04;
1029 } else {
1030 memcpy(response2, data, 4);
1031 //num_to_bytes(uid_1st,4,response2);
1032 // Configure the ATQA and SAK accordingly
1033 response1[0] &= 0xBF;
1034 sak &= 0xFB;
1035 }
1036
1037 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1038 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1039
1040 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1041 uint8_t response3[3] = {0x00};
1042 response3[0] = sak;
1043 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1044
1045 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1046 uint8_t response3a[3] = {0x00};
1047 response3a[0] = sak & 0xFB;
1048 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1049
1050 uint8_t response5[] = { 0x01, 0x01, 0x01, 0x01 }; // Very random tag nonce
1051 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1052 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1053 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1054 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1055 // TC(1) = 0x02: CID supported, NAD not supported
1056 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1057
1058 // Prepare GET_VERSION (different for EV-1 / NTAG)
1059 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
1060 uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
1061
1062 // Prepare CHK_TEARING
1063 uint8_t response9[] = {0xBD,0x90,0x3f};
1064
1065 #define TAG_RESPONSE_COUNT 10
1066 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1067 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1068 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1069 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1070 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1071 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1072 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1073 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1074 { .response = response7_NTAG, .response_n = sizeof(response7_NTAG) }, // EV1/NTAG GET_VERSION response
1075 { .response = response8, .response_n = sizeof(response8) }, // EV1/NTAG PACK response
1076 { .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
1077 };
1078
1079 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1080 // Such a response is less time critical, so we can prepare them on the fly
1081 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1082 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1083 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1084 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1085 tag_response_info_t dynamic_response_info = {
1086 .response = dynamic_response_buffer,
1087 .response_n = 0,
1088 .modulation = dynamic_modulation_buffer,
1089 .modulation_n = 0
1090 };
1091
1092 // We need to listen to the high-frequency, peak-detected path.
1093 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1094
1095 BigBuf_free_keep_EM();
1096
1097 // allocate buffers:
1098 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1099 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
1100 free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE);
1101
1102 // clear trace
1103 clear_trace();
1104 set_tracing(TRUE);
1105
1106 // Prepare the responses of the anticollision phase
1107 // there will be not enough time to do this at the moment the reader sends it REQA
1108 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
1109 prepare_allocated_tag_modulation(&responses[i]);
1110 }
1111
1112 int len = 0;
1113
1114 // To control where we are in the protocol
1115 int order = 0;
1116 int lastorder;
1117
1118 // Just to allow some checks
1119 int happened = 0;
1120 int happened2 = 0;
1121 int cmdsRecvd = 0;
1122
1123 cmdsRecvd = 0;
1124 tag_response_info_t* p_response;
1125
1126 LED_A_ON();
1127 for(;;) {
1128 // Clean receive command buffer
1129
1130 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1131 DbpString("Button press");
1132 break;
1133 }
1134
1135 p_response = NULL;
1136
1137 // Okay, look at the command now.
1138 lastorder = order;
1139 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1140 p_response = &responses[0]; order = 1;
1141 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1142 p_response = &responses[0]; order = 6;
1143 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1144 p_response = &responses[1]; order = 2;
1145 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1146 p_response = &responses[2]; order = 20;
1147 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1148 p_response = &responses[3]; order = 3;
1149 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1150 p_response = &responses[4]; order = 30;
1151 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1152 uint8_t block = receivedCmd[1];
1153 if ( tagType == 7 ) {
1154 uint8_t start = 4 * block;
1155
1156 if ( block < 4 ) {
1157 //NTAG 215
1158 uint8_t blockdata[50] = {
1159 data[0],data[1],data[2], 0x88 ^ data[0] ^ data[1] ^ data[2],
1160 data[3],data[4],data[5],data[6],
1161 data[3] ^ data[4] ^ data[5] ^ data[6],0x48,0x0f,0xe0,
1162 0xe1,0x10,0x12,0x00,
1163 0x03,0x00,0xfe,0x00,
1164 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
1165 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
1166 0x00,0x00,0x00,0x00,
1167 0x00,0x00};
1168 AppendCrc14443a(blockdata+start, 16);
1169 EmSendCmdEx( blockdata+start, MAX_MIFARE_FRAME_SIZE, false);
1170 } else {
1171 uint8_t emdata[MAX_MIFARE_FRAME_SIZE];
1172 emlGetMemBt( emdata, start, 16);
1173 AppendCrc14443a(emdata, 16);
1174 EmSendCmdEx(emdata, sizeof(emdata), false);
1175 }
1176 p_response = NULL;
1177
1178 } else {
1179 EmSendCmdEx(data+(4*block),16,false);
1180 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1181 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1182 p_response = NULL;
1183 }
1184 } else if(receivedCmd[0] == 0x3A) { // Received a FAST READ (ranged read) -- just returns all zeros.
1185
1186 uint8_t emdata[MAX_FRAME_SIZE];
1187 int start = receivedCmd[1] * 4;
1188 int len = (receivedCmd[2] - receivedCmd[1] + 1) * 4;
1189 emlGetMemBt( emdata, start, len);
1190 AppendCrc14443a(emdata, len);
1191 EmSendCmdEx(emdata, len+2, false);
1192 p_response = NULL;
1193
1194 } else if(receivedCmd[0] == 0x3C && tagType == 7) { // Received a READ SIGNATURE --
1195 // ECC data, taken from a NTAG215 amiibo token. might work. LEN: 32, + 2 crc
1196 uint8_t data[] = {0x56,0x06,0xa6,0x4f,0x43,0x32,0x53,0x6f,
1197 0x43,0xda,0x45,0xd6,0x61,0x38,0xaa,0x1e,
1198 0xcf,0xd3,0x61,0x36,0xca,0x5f,0xbb,0x05,
1199 0xce,0x21,0x24,0x5b,0xa6,0x7a,0x79,0x07,
1200 0x00,0x00};
1201 AppendCrc14443a(data, sizeof(data)-2);
1202 EmSendCmdEx(data,sizeof(data),false);
1203 p_response = NULL;
1204 } else if(receivedCmd[0] == 0x39 && tagType == 7) { // Received a READ COUNTER --
1205 uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5};
1206 EmSendCmdEx(data,sizeof(data),false);
1207 p_response = NULL;
1208 } else if(receivedCmd[0] == 0xA5 && tagType == 7) { // Received a INC COUNTER --
1209 // number of counter
1210 //uint8_t counter = receivedCmd[1];
1211 //uint32_t val = bytes_to_num(receivedCmd+2,4);
1212
1213 // send ACK
1214 uint8_t ack[] = {0x0a};
1215 EmSendCmdEx(ack,sizeof(ack),false);
1216 p_response = NULL;
1217
1218 } else if(receivedCmd[0] == 0x3E && tagType == 7) { // Received a CHECK_TEARING_EVENT --
1219 p_response = &responses[9];
1220 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1221
1222 if (tracing) {
1223 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1224 }
1225 p_response = NULL;
1226 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1227
1228 if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1229 p_response = &responses[7];
1230 } else {
1231 p_response = &responses[5]; order = 7;
1232 }
1233 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1234 if (tagType == 1 || tagType == 2) { // RATS not supported
1235 EmSend4bit(CARD_NACK_NA);
1236 p_response = NULL;
1237 } else {
1238 p_response = &responses[6]; order = 70;
1239 }
1240 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1241 if (tracing) {
1242 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1243 }
1244 uint32_t nonce = bytes_to_num(response5,4);
1245 uint32_t nr = bytes_to_num(receivedCmd,4);
1246 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1247 //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar);
1248
1249 if(flags & FLAG_NR_AR_ATTACK )
1250 {
1251 if(ar_nr_collected < 2){
1252 // Avoid duplicates... probably not necessary, nr should vary.
1253 //if(ar_nr_responses[3] != nr){
1254 ar_nr_responses[ar_nr_collected*5] = 0;
1255 ar_nr_responses[ar_nr_collected*5+1] = 0;
1256 ar_nr_responses[ar_nr_collected*5+2] = nonce;
1257 ar_nr_responses[ar_nr_collected*5+3] = nr;
1258 ar_nr_responses[ar_nr_collected*5+4] = ar;
1259 ar_nr_collected++;
1260 //}
1261 }
1262
1263 if(ar_nr_collected > 1 ) {
1264
1265 if (MF_DBGLEVEL >= 2) {
1266 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1267 Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x",
1268 ar_nr_responses[0], // UID1
1269 ar_nr_responses[1], // UID2
1270 ar_nr_responses[2], // NT
1271 ar_nr_responses[3], // AR1
1272 ar_nr_responses[4], // NR1
1273 ar_nr_responses[8], // AR2
1274 ar_nr_responses[9] // NR2
1275 );
1276 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
1277 ar_nr_responses[0], // UID1
1278 ar_nr_responses[1], // UID2
1279 ar_nr_responses[2], // NT1
1280 ar_nr_responses[3], // AR1
1281 ar_nr_responses[4], // NR1
1282 ar_nr_responses[7], // NT2
1283 ar_nr_responses[8], // AR2
1284 ar_nr_responses[9] // NR2
1285 );
1286 }
1287 uint8_t len = ar_nr_collected*5*4;
1288 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,len,0,&ar_nr_responses,len);
1289 ar_nr_collected = 0;
1290 memset(ar_nr_responses, 0x00, len);
1291 }
1292 }
1293 } else if (receivedCmd[0] == 0x1a ) // ULC authentication
1294 {
1295
1296 }
1297 else if (receivedCmd[0] == 0x1b) // NTAG / EV-1 authentication
1298 {
1299 if ( tagType == 7 ) {
1300 p_response = &responses[8]; // PACK response
1301 uint32_t pwd = bytes_to_num(receivedCmd+1,4);
1302 Dbprintf("Auth attempt: %08x", pwd);
1303 }
1304 }
1305 else {
1306 // Check for ISO 14443A-4 compliant commands, look at left nibble
1307 switch (receivedCmd[0]) {
1308 case 0x02:
1309 case 0x03: { // IBlock (command no CID)
1310 dynamic_response_info.response[0] = receivedCmd[0];
1311 dynamic_response_info.response[1] = 0x90;
1312 dynamic_response_info.response[2] = 0x00;
1313 dynamic_response_info.response_n = 3;
1314 } break;
1315 case 0x0B:
1316 case 0x0A: { // IBlock (command CID)
1317 dynamic_response_info.response[0] = receivedCmd[0];
1318 dynamic_response_info.response[1] = 0x00;
1319 dynamic_response_info.response[2] = 0x90;
1320 dynamic_response_info.response[3] = 0x00;
1321 dynamic_response_info.response_n = 4;
1322 } break;
1323
1324 case 0x1A:
1325 case 0x1B: { // Chaining command
1326 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1327 dynamic_response_info.response_n = 2;
1328 } break;
1329
1330 case 0xaa:
1331 case 0xbb: {
1332 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1333 dynamic_response_info.response_n = 2;
1334 } break;
1335
1336 case 0xBA: { // ping / pong
1337 dynamic_response_info.response[0] = 0xAB;
1338 dynamic_response_info.response[1] = 0x00;
1339 dynamic_response_info.response_n = 2;
1340 } break;
1341
1342 case 0xCA:
1343 case 0xC2: { // Readers sends deselect command
1344 dynamic_response_info.response[0] = 0xCA;
1345 dynamic_response_info.response[1] = 0x00;
1346 dynamic_response_info.response_n = 2;
1347 } break;
1348
1349 default: {
1350 // Never seen this command before
1351 if (tracing) {
1352 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1353 }
1354 Dbprintf("Received unknown command (len=%d):",len);
1355 Dbhexdump(len,receivedCmd,false);
1356 // Do not respond
1357 dynamic_response_info.response_n = 0;
1358 } break;
1359 }
1360
1361 if (dynamic_response_info.response_n > 0) {
1362 // Copy the CID from the reader query
1363 dynamic_response_info.response[1] = receivedCmd[1];
1364
1365 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1366 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1367 dynamic_response_info.response_n += 2;
1368
1369 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1370 Dbprintf("Error preparing tag response");
1371 if (tracing) {
1372 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1373 }
1374 break;
1375 }
1376 p_response = &dynamic_response_info;
1377 }
1378 }
1379
1380 // Count number of wakeups received after a halt
1381 if(order == 6 && lastorder == 5) { happened++; }
1382
1383 // Count number of other messages after a halt
1384 if(order != 6 && lastorder == 5) { happened2++; }
1385
1386 if(cmdsRecvd > 999) {
1387 DbpString("1000 commands later...");
1388 break;
1389 }
1390 cmdsRecvd++;
1391
1392 if (p_response != NULL) {
1393 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1394 // do the tracing for the previous reader request and this tag answer:
1395 uint8_t par[MAX_PARITY_SIZE];
1396 GetParity(p_response->response, p_response->response_n, par);
1397
1398 EmLogTrace(Uart.output,
1399 Uart.len,
1400 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1401 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1402 Uart.parity,
1403 p_response->response,
1404 p_response->response_n,
1405 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1406 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1407 par);
1408 }
1409
1410 if (!tracing) {
1411 Dbprintf("Trace Full. Simulation stopped.");
1412 break;
1413 }
1414 }
1415
1416 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1417 BigBuf_free_keep_EM();
1418 LED_A_OFF();
1419
1420 Dbprintf("-[ Wake ups after halt [%d]", happened);
1421 Dbprintf("-[ Messages after halt [%d]", happened2);
1422 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd);
1423 }
1424
1425
1426 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1427 // of bits specified in the delay parameter.
1428 void PrepareDelayedTransfer(uint16_t delay)
1429 {
1430 uint8_t bitmask = 0;
1431 uint8_t bits_to_shift = 0;
1432 uint8_t bits_shifted = 0;
1433
1434 delay &= 0x07;
1435 if (delay) {
1436 for (uint16_t i = 0; i < delay; i++) {
1437 bitmask |= (0x01 << i);
1438 }
1439 ToSend[ToSendMax++] = 0x00;
1440 for (uint16_t i = 0; i < ToSendMax; i++) {
1441 bits_to_shift = ToSend[i] & bitmask;
1442 ToSend[i] = ToSend[i] >> delay;
1443 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1444 bits_shifted = bits_to_shift;
1445 }
1446 }
1447 }
1448
1449
1450 //-------------------------------------------------------------------------------------
1451 // Transmit the command (to the tag) that was placed in ToSend[].
1452 // Parameter timing:
1453 // if NULL: transfer at next possible time, taking into account
1454 // request guard time and frame delay time
1455 // if == 0: transfer immediately and return time of transfer
1456 // if != 0: delay transfer until time specified
1457 //-------------------------------------------------------------------------------------
1458 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1459 {
1460
1461 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1462
1463 uint32_t ThisTransferTime = 0;
1464
1465 if (timing) {
1466 if(*timing == 0) { // Measure time
1467 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1468 } else {
1469 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1470 }
1471 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1472 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1473 LastTimeProxToAirStart = *timing;
1474 } else {
1475 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1476 while(GetCountSspClk() < ThisTransferTime);
1477 LastTimeProxToAirStart = ThisTransferTime;
1478 }
1479
1480 // clear TXRDY
1481 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1482
1483 uint16_t c = 0;
1484 for(;;) {
1485 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1486 AT91C_BASE_SSC->SSC_THR = cmd[c];
1487 c++;
1488 if(c >= len) {
1489 break;
1490 }
1491 }
1492 }
1493
1494 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1495 }
1496
1497
1498 //-----------------------------------------------------------------------------
1499 // Prepare reader command (in bits, support short frames) to send to FPGA
1500 //-----------------------------------------------------------------------------
1501 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
1502 {
1503 int i, j;
1504 int last;
1505 uint8_t b;
1506
1507 ToSendReset();
1508
1509 // Start of Communication (Seq. Z)
1510 ToSend[++ToSendMax] = SEC_Z;
1511 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1512 last = 0;
1513
1514 size_t bytecount = nbytes(bits);
1515 // Generate send structure for the data bits
1516 for (i = 0; i < bytecount; i++) {
1517 // Get the current byte to send
1518 b = cmd[i];
1519 size_t bitsleft = MIN((bits-(i*8)),8);
1520
1521 for (j = 0; j < bitsleft; j++) {
1522 if (b & 1) {
1523 // Sequence X
1524 ToSend[++ToSendMax] = SEC_X;
1525 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1526 last = 1;
1527 } else {
1528 if (last == 0) {
1529 // Sequence Z
1530 ToSend[++ToSendMax] = SEC_Z;
1531 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1532 } else {
1533 // Sequence Y
1534 ToSend[++ToSendMax] = SEC_Y;
1535 last = 0;
1536 }
1537 }
1538 b >>= 1;
1539 }
1540
1541 // Only transmit parity bit if we transmitted a complete byte
1542 if (j == 8 && parity != NULL) {
1543 // Get the parity bit
1544 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1545 // Sequence X
1546 ToSend[++ToSendMax] = SEC_X;
1547 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1548 last = 1;
1549 } else {
1550 if (last == 0) {
1551 // Sequence Z
1552 ToSend[++ToSendMax] = SEC_Z;
1553 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1554 } else {
1555 // Sequence Y
1556 ToSend[++ToSendMax] = SEC_Y;
1557 last = 0;
1558 }
1559 }
1560 }
1561 }
1562
1563 // End of Communication: Logic 0 followed by Sequence Y
1564 if (last == 0) {
1565 // Sequence Z
1566 ToSend[++ToSendMax] = SEC_Z;
1567 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1568 } else {
1569 // Sequence Y
1570 ToSend[++ToSendMax] = SEC_Y;
1571 last = 0;
1572 }
1573 ToSend[++ToSendMax] = SEC_Y;
1574
1575 // Convert to length of command:
1576 ToSendMax++;
1577 }
1578
1579 //-----------------------------------------------------------------------------
1580 // Prepare reader command to send to FPGA
1581 //-----------------------------------------------------------------------------
1582 void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity)
1583 {
1584 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1585 }
1586
1587
1588 //-----------------------------------------------------------------------------
1589 // Wait for commands from reader
1590 // Stop when button is pressed (return 1) or field was gone (return 2)
1591 // Or return 0 when command is captured
1592 //-----------------------------------------------------------------------------
1593 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1594 {
1595 *len = 0;
1596
1597 uint32_t timer = 0, vtime = 0;
1598 int analogCnt = 0;
1599 int analogAVG = 0;
1600
1601 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1602 // only, since we are receiving, not transmitting).
1603 // Signal field is off with the appropriate LED
1604 LED_D_OFF();
1605 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1606
1607 // Set ADC to read field strength
1608 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1609 AT91C_BASE_ADC->ADC_MR =
1610 ADC_MODE_PRESCALE(63) |
1611 ADC_MODE_STARTUP_TIME(1) |
1612 ADC_MODE_SAMPLE_HOLD_TIME(15);
1613 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1614 // start ADC
1615 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1616
1617 // Now run a 'software UART' on the stream of incoming samples.
1618 UartInit(received, parity);
1619
1620 // Clear RXRDY:
1621 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1622
1623 for(;;) {
1624 WDT_HIT();
1625
1626 if (BUTTON_PRESS()) return 1;
1627
1628 // test if the field exists
1629 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1630 analogCnt++;
1631 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1632 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1633 if (analogCnt >= 32) {
1634 if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1635 vtime = GetTickCount();
1636 if (!timer) timer = vtime;
1637 // 50ms no field --> card to idle state
1638 if (vtime - timer > 50) return 2;
1639 } else
1640 if (timer) timer = 0;
1641 analogCnt = 0;
1642 analogAVG = 0;
1643 }
1644 }
1645
1646 // receive and test the miller decoding
1647 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1648 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1649 if(MillerDecoding(b, 0)) {
1650 *len = Uart.len;
1651 return 0;
1652 }
1653 }
1654
1655 }
1656 }
1657
1658
1659 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1660 {
1661 uint8_t b;
1662 uint16_t i = 0;
1663 uint32_t ThisTransferTime;
1664
1665 // Modulate Manchester
1666 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1667
1668 // include correction bit if necessary
1669 if (Uart.parityBits & 0x01) {
1670 correctionNeeded = TRUE;
1671 }
1672 if(correctionNeeded) {
1673 // 1236, so correction bit needed
1674 i = 0;
1675 } else {
1676 i = 1;
1677 }
1678
1679 // clear receiving shift register and holding register
1680 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1681 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1682 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1683 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1684
1685 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1686 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1687 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1688 if (AT91C_BASE_SSC->SSC_RHR) break;
1689 }
1690
1691 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1692
1693 // Clear TXRDY:
1694 AT91C_BASE_SSC->SSC_THR = SEC_F;
1695
1696 // send cycle
1697 for(; i < respLen; ) {
1698 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1699 AT91C_BASE_SSC->SSC_THR = resp[i++];
1700 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1701 }
1702
1703 if(BUTTON_PRESS()) break;
1704 }
1705
1706 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1707 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3;
1708 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
1709 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1710 AT91C_BASE_SSC->SSC_THR = SEC_F;
1711 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1712 i++;
1713 }
1714 }
1715
1716 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1717
1718 return 0;
1719 }
1720
1721 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1722 Code4bitAnswerAsTag(resp);
1723 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1724 // do the tracing for the previous reader request and this tag answer:
1725 uint8_t par[1];
1726 GetParity(&resp, 1, par);
1727 EmLogTrace(Uart.output,
1728 Uart.len,
1729 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1730 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1731 Uart.parity,
1732 &resp,
1733 1,
1734 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1735 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1736 par);
1737 return res;
1738 }
1739
1740 int EmSend4bit(uint8_t resp){
1741 return EmSend4bitEx(resp, false);
1742 }
1743
1744 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1745 CodeIso14443aAsTagPar(resp, respLen, par);
1746 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1747 // do the tracing for the previous reader request and this tag answer:
1748 EmLogTrace(Uart.output,
1749 Uart.len,
1750 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1751 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1752 Uart.parity,
1753 resp,
1754 respLen,
1755 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1756 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1757 par);
1758 return res;
1759 }
1760
1761 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1762 uint8_t par[MAX_PARITY_SIZE];
1763 GetParity(resp, respLen, par);
1764 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1765 }
1766
1767 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1768 uint8_t par[MAX_PARITY_SIZE];
1769 GetParity(resp, respLen, par);
1770 return EmSendCmdExPar(resp, respLen, false, par);
1771 }
1772
1773 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1774 return EmSendCmdExPar(resp, respLen, false, par);
1775 }
1776
1777 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1778 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1779 {
1780 if (tracing) {
1781 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1782 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1783 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1784 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1785 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1786 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1787 reader_EndTime = tag_StartTime - exact_fdt;
1788 reader_StartTime = reader_EndTime - reader_modlen;
1789 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1790 return FALSE;
1791 } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1792 } else {
1793 return TRUE;
1794 }
1795 }
1796
1797 //-----------------------------------------------------------------------------
1798 // Wait a certain time for tag response
1799 // If a response is captured return TRUE
1800 // If it takes too long return FALSE
1801 //-----------------------------------------------------------------------------
1802 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1803 {
1804 uint32_t c = 0x00;
1805
1806 // Set FPGA mode to "reader listen mode", no modulation (listen
1807 // only, since we are receiving, not transmitting).
1808 // Signal field is on with the appropriate LED
1809 LED_D_ON();
1810 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1811
1812 // Now get the answer from the card
1813 DemodInit(receivedResponse, receivedResponsePar);
1814
1815 // clear RXRDY:
1816 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1817
1818 for(;;) {
1819 WDT_HIT();
1820
1821 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1822 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1823 if(ManchesterDecoding(b, offset, 0)) {
1824 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1825 return TRUE;
1826 } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) {
1827 return FALSE;
1828 }
1829 }
1830 }
1831 }
1832
1833 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1834 {
1835 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1836
1837 // Send command to tag
1838 TransmitFor14443a(ToSend, ToSendMax, timing);
1839 if(trigger)
1840 LED_A_ON();
1841
1842 // Log reader command in trace buffer
1843 if (tracing) {
1844 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1845 }
1846 }
1847
1848 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1849 {
1850 ReaderTransmitBitsPar(frame, len*8, par, timing);
1851 }
1852
1853 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1854 {
1855 // Generate parity and redirect
1856 uint8_t par[MAX_PARITY_SIZE];
1857 GetParity(frame, len/8, par);
1858 ReaderTransmitBitsPar(frame, len, par, timing);
1859 }
1860
1861 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1862 {
1863 // Generate parity and redirect
1864 uint8_t par[MAX_PARITY_SIZE];
1865 GetParity(frame, len, par);
1866 ReaderTransmitBitsPar(frame, len*8, par, timing);
1867 }
1868
1869 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1870 {
1871 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return FALSE;
1872 if (tracing) {
1873 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1874 }
1875 return Demod.len;
1876 }
1877
1878 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1879 {
1880 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
1881 if (tracing) {
1882 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1883 }
1884 return Demod.len;
1885 }
1886
1887 /* performs iso14443a anticollision procedure
1888 * fills the uid pointer unless NULL
1889 * fills resp_data unless NULL */
1890 int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr) {
1891 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1892 uint8_t sel_all[] = { 0x93,0x20 };
1893 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1894 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1895 uint8_t resp[MAX_FRAME_SIZE]; // theoretically. A usual RATS will be much smaller
1896 uint8_t resp_par[MAX_PARITY_SIZE];
1897 byte_t uid_resp[4];
1898 size_t uid_resp_len;
1899
1900 uint8_t sak = 0x04; // cascade uid
1901 int cascade_level = 0;
1902 int len;
1903
1904 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1905 ReaderTransmitBitsPar(wupa,7,0, NULL);
1906
1907 // Receive the ATQA
1908 if(!ReaderReceive(resp, resp_par)) return 0;
1909
1910 if(p_hi14a_card) {
1911 memcpy(p_hi14a_card->atqa, resp, 2);
1912 p_hi14a_card->uidlen = 0;
1913 memset(p_hi14a_card->uid,0,10);
1914 }
1915
1916 // clear uid
1917 if (uid_ptr) {
1918 memset(uid_ptr,0,10);
1919 }
1920
1921 // check for proprietary anticollision:
1922 if ((resp[0] & 0x1F) == 0) {
1923 return 3;
1924 }
1925
1926 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1927 // which case we need to make a cascade 2 request and select - this is a long UID
1928 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1929 for(; sak & 0x04; cascade_level++) {
1930 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1931 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1932
1933 // SELECT_ALL
1934 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1935 if (!ReaderReceive(resp, resp_par)) return 0;
1936
1937 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1938 memset(uid_resp, 0, 4);
1939 uint16_t uid_resp_bits = 0;
1940 uint16_t collision_answer_offset = 0;
1941 // anti-collision-loop:
1942 while (Demod.collisionPos) {
1943 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1944 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1945 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1946 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1947 }
1948 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1949 uid_resp_bits++;
1950 // construct anticollosion command:
1951 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1952 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1953 sel_uid[2+i] = uid_resp[i];
1954 }
1955 collision_answer_offset = uid_resp_bits%8;
1956 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1957 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1958 }
1959 // finally, add the last bits and BCC of the UID
1960 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1961 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1962 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1963 }
1964
1965 } else { // no collision, use the response to SELECT_ALL as current uid
1966 memcpy(uid_resp, resp, 4);
1967 }
1968 uid_resp_len = 4;
1969
1970 // calculate crypto UID. Always use last 4 Bytes.
1971 if(cuid_ptr) {
1972 *cuid_ptr = bytes_to_num(uid_resp, 4);
1973 }
1974
1975 // Construct SELECT UID command
1976 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1977 memcpy(sel_uid+2, uid_resp, 4); // the UID
1978 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1979 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1980 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1981
1982 // Receive the SAK
1983 if (!ReaderReceive(resp, resp_par)) return 0;
1984 sak = resp[0];
1985
1986 // Test if more parts of the uid are coming
1987 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1988 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1989 // http://www.nxp.com/documents/application_note/AN10927.pdf
1990 uid_resp[0] = uid_resp[1];
1991 uid_resp[1] = uid_resp[2];
1992 uid_resp[2] = uid_resp[3];
1993
1994 uid_resp_len = 3;
1995 }
1996
1997 if(uid_ptr) {
1998 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1999 }
2000
2001 if(p_hi14a_card) {
2002 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
2003 p_hi14a_card->uidlen += uid_resp_len;
2004 }
2005 }
2006
2007 if(p_hi14a_card) {
2008 p_hi14a_card->sak = sak;
2009 p_hi14a_card->ats_len = 0;
2010 }
2011
2012 // non iso14443a compliant tag
2013 if( (sak & 0x20) == 0) return 2;
2014
2015 // Request for answer to select
2016 AppendCrc14443a(rats, 2);
2017 ReaderTransmit(rats, sizeof(rats), NULL);
2018
2019 if (!(len = ReaderReceive(resp, resp_par))) return 0;
2020
2021
2022 if(p_hi14a_card) {
2023 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
2024 p_hi14a_card->ats_len = len;
2025 }
2026
2027 // reset the PCB block number
2028 iso14_pcb_blocknum = 0;
2029
2030 // set default timeout based on ATS
2031 iso14a_set_ATS_timeout(resp);
2032
2033 return 1;
2034 }
2035
2036 void iso14443a_setup(uint8_t fpga_minor_mode) {
2037 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2038 // Set up the synchronous serial port
2039 FpgaSetupSsc();
2040 // connect Demodulated Signal to ADC:
2041 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2042
2043 // Signal field is on with the appropriate LED
2044 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
2045 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
2046 LED_D_ON();
2047 } else {
2048 LED_D_OFF();
2049 }
2050 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
2051
2052 // Start the timer
2053 StartCountSspClk();
2054
2055 DemodReset();
2056 UartReset();
2057 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
2058 iso14a_set_timeout(10*106); // 10ms default
2059 }
2060
2061 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
2062 uint8_t parity[MAX_PARITY_SIZE];
2063 uint8_t real_cmd[cmd_len+4];
2064 real_cmd[0] = 0x0a; //I-Block
2065 // put block number into the PCB
2066 real_cmd[0] |= iso14_pcb_blocknum;
2067 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2068 memcpy(real_cmd+2, cmd, cmd_len);
2069 AppendCrc14443a(real_cmd,cmd_len+2);
2070
2071 ReaderTransmit(real_cmd, cmd_len+4, NULL);
2072 size_t len = ReaderReceive(data, parity);
2073 uint8_t *data_bytes = (uint8_t *) data;
2074 if (!len)
2075 return 0; //DATA LINK ERROR
2076 // if we received an I- or R(ACK)-Block with a block number equal to the
2077 // current block number, toggle the current block number
2078 else if (len >= 4 // PCB+CID+CRC = 4 bytes
2079 && ((data_bytes[0] & 0xC0) == 0 // I-Block
2080 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2081 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
2082 {
2083 iso14_pcb_blocknum ^= 1;
2084 }
2085
2086 return len;
2087 }
2088
2089 //-----------------------------------------------------------------------------
2090 // Read an ISO 14443a tag. Send out commands and store answers.
2091 //
2092 //-----------------------------------------------------------------------------
2093 void ReaderIso14443a(UsbCommand *c)
2094 {
2095 iso14a_command_t param = c->arg[0];
2096 uint8_t *cmd = c->d.asBytes;
2097 size_t len = c->arg[1] & 0xffff;
2098 size_t lenbits = c->arg[1] >> 16;
2099 uint32_t timeout = c->arg[2];
2100 uint32_t arg0 = 0;
2101 byte_t buf[USB_CMD_DATA_SIZE];
2102 uint8_t par[MAX_PARITY_SIZE];
2103
2104 if(param & ISO14A_CONNECT) {
2105 clear_trace();
2106 }
2107
2108 set_tracing(TRUE);
2109
2110 if(param & ISO14A_REQUEST_TRIGGER) {
2111 iso14a_set_trigger(TRUE);
2112 }
2113
2114 if(param & ISO14A_CONNECT) {
2115 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
2116 if(!(param & ISO14A_NO_SELECT)) {
2117 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
2118 arg0 = iso14443a_select_card(NULL,card,NULL);
2119 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
2120 }
2121 }
2122
2123 if(param & ISO14A_SET_TIMEOUT) {
2124 iso14a_set_timeout(timeout);
2125 }
2126
2127 if(param & ISO14A_APDU) {
2128 arg0 = iso14_apdu(cmd, len, buf);
2129 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2130 }
2131
2132 if(param & ISO14A_RAW) {
2133 if(param & ISO14A_APPEND_CRC) {
2134 if(param & ISO14A_TOPAZMODE) {
2135 AppendCrc14443b(cmd,len);
2136 } else {
2137 AppendCrc14443a(cmd,len);
2138 }
2139 len += 2;
2140 if (lenbits) lenbits += 16;
2141 }
2142 if(lenbits>0) { // want to send a specific number of bits (e.g. short commands)
2143 if(param & ISO14A_TOPAZMODE) {
2144 int bits_to_send = lenbits;
2145 uint16_t i = 0;
2146 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity
2147 bits_to_send -= 7;
2148 while (bits_to_send > 0) {
2149 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity
2150 bits_to_send -= 8;
2151 }
2152 } else {
2153 GetParity(cmd, lenbits/8, par);
2154 ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity
2155 }
2156 } else { // want to send complete bytes only
2157 if(param & ISO14A_TOPAZMODE) {
2158 uint16_t i = 0;
2159 ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy
2160 while (i < len) {
2161 ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy
2162 }
2163 } else {
2164 ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity
2165 }
2166 }
2167 arg0 = ReaderReceive(buf, par);
2168 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2169 }
2170
2171 if(param & ISO14A_REQUEST_TRIGGER) {
2172 iso14a_set_trigger(FALSE);
2173 }
2174
2175 if(param & ISO14A_NO_DISCONNECT) {
2176 return;
2177 }
2178
2179 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2180 LEDsoff();
2181 }
2182
2183
2184 // Determine the distance between two nonces.
2185 // Assume that the difference is small, but we don't know which is first.
2186 // Therefore try in alternating directions.
2187 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
2188
2189 uint16_t i;
2190 uint32_t nttmp1, nttmp2;
2191
2192 if (nt1 == nt2) return 0;
2193
2194 nttmp1 = nt1;
2195 nttmp2 = nt2;
2196
2197 for (i = 1; i < 32768; i++) {
2198 nttmp1 = prng_successor(nttmp1, 1);
2199 if (nttmp1 == nt2) return i;
2200 nttmp2 = prng_successor(nttmp2, 1);
2201 if (nttmp2 == nt1) return -i;
2202 }
2203
2204 return(-99999); // either nt1 or nt2 are invalid nonces
2205 }
2206
2207
2208 //-----------------------------------------------------------------------------
2209 // Recover several bits of the cypher stream. This implements (first stages of)
2210 // the algorithm described in "The Dark Side of Security by Obscurity and
2211 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2212 // (article by Nicolas T. Courtois, 2009)
2213 //-----------------------------------------------------------------------------
2214 void ReaderMifare(bool first_try)
2215 {
2216 // Mifare AUTH
2217 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2218 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2219 static uint8_t mf_nr_ar3;
2220
2221 uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE];
2222 uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE];
2223
2224 if (first_try) {
2225 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2226 }
2227
2228 // free eventually allocated BigBuf memory. We want all for tracing.
2229 BigBuf_free();
2230
2231 clear_trace();
2232 set_tracing(TRUE);
2233
2234 byte_t nt_diff = 0;
2235 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2236 static byte_t par_low = 0;
2237 bool led_on = TRUE;
2238 uint8_t uid[10] ={0};
2239 uint32_t cuid;
2240
2241 uint32_t nt = 0;
2242 uint32_t previous_nt = 0;
2243 static uint32_t nt_attacked = 0;
2244 byte_t par_list[8] = {0x00};
2245 byte_t ks_list[8] = {0x00};
2246
2247 static uint32_t sync_time = 0;
2248 static uint32_t sync_cycles = 0;
2249 int catch_up_cycles = 0;
2250 int last_catch_up = 0;
2251 uint16_t consecutive_resyncs = 0;
2252 int isOK = 0;
2253
2254 if (first_try) {
2255 mf_nr_ar3 = 0;
2256 sync_time = GetCountSspClk() & 0xfffffff8;
2257 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2258 nt_attacked = 0;
2259 nt = 0;
2260 par[0] = 0;
2261 }
2262 else {
2263 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2264 mf_nr_ar3++;
2265 mf_nr_ar[3] = mf_nr_ar3;
2266 par[0] = par_low;
2267 }
2268
2269 LED_A_ON();
2270 LED_B_OFF();
2271 LED_C_OFF();
2272
2273
2274 #define DARKSIDE_MAX_TRIES 32 // number of tries to sync on PRNG cycle. Then give up.
2275 uint16_t unsuccessfull_tries = 0;
2276
2277 for(uint16_t i = 0; TRUE; i++) {
2278
2279 LED_C_ON();
2280 WDT_HIT();
2281
2282 // Test if the action was cancelled
2283 if(BUTTON_PRESS()) {
2284 isOK = -1;
2285 break;
2286 }
2287
2288 if(!iso14443a_select_card(uid, NULL, &cuid)) {
2289 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
2290 continue;
2291 }
2292
2293 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2294 catch_up_cycles = 0;
2295
2296 // if we missed the sync time already, advance to the next nonce repeat
2297 while(GetCountSspClk() > sync_time) {
2298 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2299 }
2300
2301 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2302 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2303
2304 // Receive the (4 Byte) "random" nonce
2305 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2306 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2307 continue;
2308 }
2309
2310 previous_nt = nt;
2311 nt = bytes_to_num(receivedAnswer, 4);
2312
2313 // Transmit reader nonce with fake par
2314 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2315
2316 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2317 int nt_distance = dist_nt(previous_nt, nt);
2318 if (nt_distance == 0) {
2319 nt_attacked = nt;
2320 }
2321 else {
2322 if (nt_distance == -99999) { // invalid nonce received
2323 unsuccessfull_tries++;
2324 if (!nt_attacked && unsuccessfull_tries > DARKSIDE_MAX_TRIES) {
2325 isOK = -3; // Card has an unpredictable PRNG. Give up
2326 break;
2327 } else {
2328 continue; // continue trying...
2329 }
2330 }
2331 sync_cycles = (sync_cycles - nt_distance);
2332 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2333 continue;
2334 }
2335 }
2336
2337 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2338 catch_up_cycles = -dist_nt(nt_attacked, nt);
2339 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2340 catch_up_cycles = 0;
2341 continue;
2342 }
2343 if (catch_up_cycles == last_catch_up) {
2344 consecutive_resyncs++;
2345 }
2346 else {
2347 last_catch_up = catch_up_cycles;
2348 consecutive_resyncs = 0;
2349 }
2350 if (consecutive_resyncs < 3) {
2351 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2352 }
2353 else {
2354 sync_cycles = sync_cycles + catch_up_cycles;
2355 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2356 }
2357 continue;
2358 }
2359
2360 consecutive_resyncs = 0;
2361
2362 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2363 if (ReaderReceive(receivedAnswer, receivedAnswerPar))
2364 {
2365 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2366
2367 if (nt_diff == 0)
2368 {
2369 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2370 }
2371
2372 led_on = !led_on;
2373 if(led_on) LED_B_ON(); else LED_B_OFF();
2374
2375 par_list[nt_diff] = SwapBits(par[0], 8);
2376 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2377
2378 // Test if the information is complete
2379 if (nt_diff == 0x07) {
2380 isOK = 1;
2381 break;
2382 }
2383
2384 nt_diff = (nt_diff + 1) & 0x07;
2385 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2386 par[0] = par_low;
2387 } else {
2388 if (nt_diff == 0 && first_try)
2389 {
2390 par[0]++;
2391 if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2392 isOK = -2;
2393 break;
2394 }
2395 } else {
2396 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2397 }
2398 }
2399 }
2400
2401
2402 mf_nr_ar[3] &= 0x1F;
2403
2404 byte_t buf[28] = {0x00};
2405
2406 memcpy(buf + 0, uid, 4);
2407 num_to_bytes(nt, 4, buf + 4);
2408 memcpy(buf + 8, par_list, 8);
2409 memcpy(buf + 16, ks_list, 8);
2410 memcpy(buf + 24, mf_nr_ar, 4);
2411
2412 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2413
2414 // Thats it...
2415 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2416 LEDsoff();
2417
2418 set_tracing(FALSE);
2419 }
2420
2421
2422 /*
2423 *MIFARE 1K simulate.
2424 *
2425 *@param flags :
2426 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2427 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2428 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2429 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2430 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2431 */
2432 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2433 {
2434 int cardSTATE = MFEMUL_NOFIELD;
2435 int _7BUID = 0;
2436 int vHf = 0; // in mV
2437 int res;
2438 uint32_t selTimer = 0;
2439 uint32_t authTimer = 0;
2440 uint16_t len = 0;
2441 uint8_t cardWRBL = 0;
2442 uint8_t cardAUTHSC = 0;
2443 uint8_t cardAUTHKEY = 0xff; // no authentication
2444 // uint32_t cardRr = 0;
2445 uint32_t cuid = 0;
2446 //uint32_t rn_enc = 0;
2447 uint32_t ans = 0;
2448 uint32_t cardINTREG = 0;
2449 uint8_t cardINTBLOCK = 0;
2450 struct Crypto1State mpcs = {0, 0};
2451 struct Crypto1State *pcs;
2452 pcs = &mpcs;
2453 uint32_t numReads = 0;//Counts numer of times reader read a block
2454 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE];
2455 uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE];
2456 uint8_t response[MAX_MIFARE_FRAME_SIZE];
2457 uint8_t response_par[MAX_MIFARE_PARITY_SIZE];
2458
2459 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2460 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2461 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2462 //uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; // Mifare Classic
2463 uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2464 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2465
2466 uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01};
2467 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2468
2469 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2470 // This can be used in a reader-only attack.
2471 // (it can also be retrieved via 'hf 14a list', but hey...
2472 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
2473 uint8_t ar_nr_collected = 0;
2474
2475 // Authenticate response - nonce
2476 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2477
2478 //-- Determine the UID
2479 // Can be set from emulator memory, incoming data
2480 // and can be 7 or 4 bytes long
2481 if (flags & FLAG_4B_UID_IN_DATA)
2482 {
2483 // 4B uid comes from data-portion of packet
2484 memcpy(rUIDBCC1,datain,4);
2485 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2486
2487 } else if (flags & FLAG_7B_UID_IN_DATA) {
2488 // 7B uid comes from data-portion of packet
2489 memcpy(&rUIDBCC1[1],datain,3);
2490 memcpy(rUIDBCC2, datain+3, 4);
2491 _7BUID = true;
2492 } else {
2493 // get UID from emul memory
2494 emlGetMemBt(receivedCmd, 7, 1);
2495 _7BUID = !(receivedCmd[0] == 0x00);
2496 if (!_7BUID) { // ---------- 4BUID
2497 emlGetMemBt(rUIDBCC1, 0, 4);
2498 } else { // ---------- 7BUID
2499 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2500 emlGetMemBt(rUIDBCC2, 3, 4);
2501 }
2502 }
2503
2504 // save uid.
2505 ar_nr_responses[0*5] = bytes_to_num(rUIDBCC1+1, 3);
2506 if ( _7BUID )
2507 ar_nr_responses[0*5+1] = bytes_to_num(rUIDBCC2, 4);
2508
2509 /*
2510 * Regardless of what method was used to set the UID, set fifth byte and modify
2511 * the ATQA for 4 or 7-byte UID
2512 */
2513 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2514 if (_7BUID) {
2515 rATQA[0] = 0x44;
2516 rUIDBCC1[0] = 0x88;
2517 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2518 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2519 }
2520
2521 if (MF_DBGLEVEL >= 1) {
2522 if (!_7BUID) {
2523 Dbprintf("4B UID: %02x%02x%02x%02x",
2524 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2525 } else {
2526 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2527 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2528 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2529 }
2530 }
2531
2532 // We need to listen to the high-frequency, peak-detected path.
2533 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2534
2535 // free eventually allocated BigBuf memory but keep Emulator Memory
2536 BigBuf_free_keep_EM();
2537
2538 // clear trace
2539 clear_trace();
2540 set_tracing(TRUE);
2541
2542
2543 bool finished = FALSE;
2544 while (!BUTTON_PRESS() && !finished) {
2545 WDT_HIT();
2546
2547 // find reader field
2548 if (cardSTATE == MFEMUL_NOFIELD) {
2549 vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
2550 if (vHf > MF_MINFIELDV) {
2551 cardSTATE_TO_IDLE();
2552 LED_A_ON();
2553 }
2554 }
2555 if(cardSTATE == MFEMUL_NOFIELD) continue;
2556
2557 //Now, get data
2558 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2559 if (res == 2) { //Field is off!
2560 cardSTATE = MFEMUL_NOFIELD;
2561 LEDsoff();
2562 continue;
2563 } else if (res == 1) {
2564 break; //return value 1 means button press
2565 }
2566
2567 // REQ or WUP request in ANY state and WUP in HALTED state
2568 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2569 selTimer = GetTickCount();
2570 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2571 cardSTATE = MFEMUL_SELECT1;
2572
2573 // init crypto block
2574 LED_B_OFF();
2575 LED_C_OFF();
2576 crypto1_destroy(pcs);
2577 cardAUTHKEY = 0xff;
2578 continue;
2579 }
2580
2581 switch (cardSTATE) {
2582 case MFEMUL_NOFIELD:
2583 case MFEMUL_HALTED:
2584 case MFEMUL_IDLE:{
2585 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2586 break;
2587 }
2588 case MFEMUL_SELECT1:{
2589 // select all
2590 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2591 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2592 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2593 break;
2594 }
2595
2596 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2597 {
2598 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2599 }
2600 // select card
2601 if (len == 9 &&
2602 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2603 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2604 cuid = bytes_to_num(rUIDBCC1, 4);
2605 if (!_7BUID) {
2606 cardSTATE = MFEMUL_WORK;
2607 LED_B_ON();
2608 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2609 break;
2610 } else {
2611 cardSTATE = MFEMUL_SELECT2;
2612 }
2613 }
2614 break;
2615 }
2616 case MFEMUL_AUTH1:{
2617 if( len != 8)
2618 {
2619 cardSTATE_TO_IDLE();
2620 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2621 break;
2622 }
2623
2624 uint32_t ar = bytes_to_num(receivedCmd, 4);
2625 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2626
2627 //Collect AR/NR
2628 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
2629 if(ar_nr_collected < 2){
2630 if(ar_nr_responses[2] != ar)
2631 {// Avoid duplicates... probably not necessary, ar should vary.
2632 //ar_nr_responses[ar_nr_collected*5] = 0;
2633 //ar_nr_responses[ar_nr_collected*5+1] = 0;
2634 ar_nr_responses[ar_nr_collected*5+2] = nonce;
2635 ar_nr_responses[ar_nr_collected*5+3] = nr;
2636 ar_nr_responses[ar_nr_collected*5+4] = ar;
2637 ar_nr_collected++;
2638 }
2639 // Interactive mode flag, means we need to send ACK
2640 if(flags & FLAG_INTERACTIVE && ar_nr_collected == 2)
2641 {
2642 finished = true;
2643 }
2644 }
2645
2646 // --- crypto
2647 //crypto1_word(pcs, ar , 1);
2648 //cardRr = nr ^ crypto1_word(pcs, 0, 0);
2649
2650 //test if auth OK
2651 //if (cardRr != prng_successor(nonce, 64)){
2652
2653 //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2654 // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2655 // cardRr, prng_successor(nonce, 64));
2656 // Shouldn't we respond anything here?
2657 // Right now, we don't nack or anything, which causes the
2658 // reader to do a WUPA after a while. /Martin
2659 // -- which is the correct response. /piwi
2660 //cardSTATE_TO_IDLE();
2661 //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2662 //break;
2663 //}
2664
2665 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2666
2667 num_to_bytes(ans, 4, rAUTH_AT);
2668 // --- crypto
2669 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2670 LED_C_ON();
2671 cardSTATE = MFEMUL_WORK;
2672 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2673 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2674 GetTickCount() - authTimer);
2675 break;
2676 }
2677 case MFEMUL_SELECT2:{
2678 if (!len) {
2679 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2680 break;
2681 }
2682 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2683 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2684 break;
2685 }
2686
2687 // select 2 card
2688 if (len == 9 &&
2689 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2690 EmSendCmd(rSAK, sizeof(rSAK));
2691 cuid = bytes_to_num(rUIDBCC2, 4);
2692 cardSTATE = MFEMUL_WORK;
2693 LED_B_ON();
2694 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2695 break;
2696 }
2697
2698 // i guess there is a command). go into the work state.
2699 if (len != 4) {
2700 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2701 break;
2702 }
2703 cardSTATE = MFEMUL_WORK;
2704 //goto lbWORK;
2705 //intentional fall-through to the next case-stmt
2706 }
2707
2708 case MFEMUL_WORK:{
2709 if (len == 0) {
2710 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2711 break;
2712 }
2713
2714 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2715
2716 if(encrypted_data) {
2717 // decrypt seqence
2718 mf_crypto1_decrypt(pcs, receivedCmd, len);
2719 }
2720
2721 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2722 authTimer = GetTickCount();
2723 cardAUTHSC = receivedCmd[1] / 4; // received block num
2724 cardAUTHKEY = receivedCmd[0] - 0x60;
2725 crypto1_destroy(pcs);//Added by martin
2726 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2727
2728 if (!encrypted_data) { // first authentication
2729 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2730
2731 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2732 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2733 } else { // nested authentication
2734 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2735 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2736 num_to_bytes(ans, 4, rAUTH_AT);
2737 }
2738
2739 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2740 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2741 cardSTATE = MFEMUL_AUTH1;
2742 break;
2743 }
2744
2745 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2746 // BUT... ACK --> NACK
2747 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2748 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2749 break;
2750 }
2751
2752 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2753 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2754 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2755 break;
2756 }
2757
2758 if(len != 4) {
2759 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2760 break;
2761 }
2762
2763 if(receivedCmd[0] == 0x30 // read block
2764 || receivedCmd[0] == 0xA0 // write block
2765 || receivedCmd[0] == 0xC0 // inc
2766 || receivedCmd[0] == 0xC1 // dec
2767 || receivedCmd[0] == 0xC2 // restore
2768 || receivedCmd[0] == 0xB0) { // transfer
2769 if (receivedCmd[1] >= 16 * 4) {
2770 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2771 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2772 break;
2773 }
2774
2775 if (receivedCmd[1] / 4 != cardAUTHSC) {
2776 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2777 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2778 break;
2779 }
2780 }
2781 // read block
2782 if (receivedCmd[0] == 0x30) {
2783 if (MF_DBGLEVEL >= 4) {
2784 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2785 }
2786 emlGetMem(response, receivedCmd[1], 1);
2787 AppendCrc14443a(response, 16);
2788 mf_crypto1_encrypt(pcs, response, 18, response_par);
2789 EmSendCmdPar(response, 18, response_par);
2790 numReads++;
2791 if(exitAfterNReads > 0 && numReads >= exitAfterNReads) {
2792 Dbprintf("%d reads done, exiting", numReads);
2793 finished = true;
2794 }
2795 break;
2796 }
2797 // write block
2798 if (receivedCmd[0] == 0xA0) {
2799 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2800 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2801 cardSTATE = MFEMUL_WRITEBL2;
2802 cardWRBL = receivedCmd[1];
2803 break;
2804 }
2805 // increment, decrement, restore
2806 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2807 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2808 if (emlCheckValBl(receivedCmd[1])) {
2809 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2810 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2811 break;
2812 }
2813 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2814 if (receivedCmd[0] == 0xC1)
2815 cardSTATE = MFEMUL_INTREG_INC;
2816 if (receivedCmd[0] == 0xC0)
2817 cardSTATE = MFEMUL_INTREG_DEC;
2818 if (receivedCmd[0] == 0xC2)
2819 cardSTATE = MFEMUL_INTREG_REST;
2820 cardWRBL = receivedCmd[1];
2821 break;
2822 }
2823 // transfer
2824 if (receivedCmd[0] == 0xB0) {
2825 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2826 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2827 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2828 else
2829 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2830 break;
2831 }
2832 // halt
2833 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2834 LED_B_OFF();
2835 LED_C_OFF();
2836 cardSTATE = MFEMUL_HALTED;
2837 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2838 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2839 break;
2840 }
2841 // RATS
2842 if (receivedCmd[0] == 0xe0) {//RATS
2843 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2844 break;
2845 }
2846 // command not allowed
2847 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2848 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2849 break;
2850 }
2851 case MFEMUL_WRITEBL2:{
2852 if (len == 18){
2853 mf_crypto1_decrypt(pcs, receivedCmd, len);
2854 emlSetMem(receivedCmd, cardWRBL, 1);
2855 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2856 cardSTATE = MFEMUL_WORK;
2857 } else {
2858 cardSTATE_TO_IDLE();
2859 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2860 }
2861 break;
2862 }
2863
2864 case MFEMUL_INTREG_INC:{
2865 mf_crypto1_decrypt(pcs, receivedCmd, len);
2866 memcpy(&ans, receivedCmd, 4);
2867 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2868 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2869 cardSTATE_TO_IDLE();
2870 break;
2871 }
2872 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2873 cardINTREG = cardINTREG + ans;
2874 cardSTATE = MFEMUL_WORK;
2875 break;
2876 }
2877 case MFEMUL_INTREG_DEC:{
2878 mf_crypto1_decrypt(pcs, receivedCmd, len);
2879 memcpy(&ans, receivedCmd, 4);
2880 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2881 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2882 cardSTATE_TO_IDLE();
2883 break;
2884 }
2885 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2886 cardINTREG = cardINTREG - ans;
2887 cardSTATE = MFEMUL_WORK;
2888 break;
2889 }
2890 case MFEMUL_INTREG_REST:{
2891 mf_crypto1_decrypt(pcs, receivedCmd, len);
2892 memcpy(&ans, receivedCmd, 4);
2893 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2894 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2895 cardSTATE_TO_IDLE();
2896 break;
2897 }
2898 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2899 cardSTATE = MFEMUL_WORK;
2900 break;
2901 }
2902 }
2903 }
2904
2905 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2906 LEDsoff();
2907
2908 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2909 {
2910 //May just aswell send the collected ar_nr in the response aswell
2911 uint8_t len = ar_nr_collected*5*4;
2912 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
2913 }
2914
2915 if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1 )
2916 {
2917 if(ar_nr_collected > 1 ) {
2918 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2919 Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x",
2920 ar_nr_responses[0], // UID1
2921 ar_nr_responses[1], // UID2
2922 ar_nr_responses[2], // NT
2923 ar_nr_responses[3], // AR1
2924 ar_nr_responses[4], // NR1
2925 ar_nr_responses[8], // AR2
2926 ar_nr_responses[9] // NR2
2927 );
2928 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
2929 ar_nr_responses[0], // UID1
2930 ar_nr_responses[1], // UID2
2931 ar_nr_responses[2], // NT1
2932 ar_nr_responses[3], // AR1
2933 ar_nr_responses[4], // NR1
2934 ar_nr_responses[7], // NT2
2935 ar_nr_responses[8], // AR2
2936 ar_nr_responses[9] // NR2
2937 );
2938 } else {
2939 Dbprintf("Failed to obtain two AR/NR pairs!");
2940 if(ar_nr_collected > 0 ) {
2941 Dbprintf("Only got these: UID=%07x%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2942 ar_nr_responses[0], // UID1
2943 ar_nr_responses[1], // UID2
2944 ar_nr_responses[2], // NT
2945 ar_nr_responses[3], // AR1
2946 ar_nr_responses[4] // NR1
2947 );
2948 }
2949 }
2950 }
2951 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
2952 }
2953
2954
2955 //-----------------------------------------------------------------------------
2956 // MIFARE sniffer.
2957 //
2958 //-----------------------------------------------------------------------------
2959 void RAMFUNC SniffMifare(uint8_t param) {
2960 // param:
2961 // bit 0 - trigger from first card answer
2962 // bit 1 - trigger from first reader 7-bit request
2963
2964 // C(red) A(yellow) B(green)
2965 LEDsoff();
2966 // init trace buffer
2967 clear_trace();
2968 set_tracing(TRUE);
2969
2970 // The command (reader -> tag) that we're receiving.
2971 // The length of a received command will in most cases be no more than 18 bytes.
2972 // So 32 should be enough!
2973 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE];
2974 uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE];
2975 // The response (tag -> reader) that we're receiving.
2976 uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE];
2977 uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE];
2978
2979 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2980
2981 // free eventually allocated BigBuf memory
2982 BigBuf_free();
2983 // allocate the DMA buffer, used to stream samples from the FPGA
2984 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
2985 uint8_t *data = dmaBuf;
2986 uint8_t previous_data = 0;
2987 int maxDataLen = 0;
2988 int dataLen = 0;
2989 bool ReaderIsActive = FALSE;
2990 bool TagIsActive = FALSE;
2991
2992 // Set up the demodulator for tag -> reader responses.
2993 DemodInit(receivedResponse, receivedResponsePar);
2994
2995 // Set up the demodulator for the reader -> tag commands
2996 UartInit(receivedCmd, receivedCmdPar);
2997
2998 // Setup for the DMA.
2999 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
3000
3001 LED_D_OFF();
3002
3003 // init sniffer
3004 MfSniffInit();
3005
3006 // And now we loop, receiving samples.
3007 for(uint32_t sniffCounter = 0; TRUE; ) {
3008
3009 if(BUTTON_PRESS()) {
3010 DbpString("cancelled by button");
3011 break;
3012 }
3013
3014 LED_A_ON();
3015 WDT_HIT();
3016
3017 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
3018 // check if a transaction is completed (timeout after 2000ms).
3019 // if yes, stop the DMA transfer and send what we have so far to the client
3020 if (MfSniffSend(2000)) {
3021 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3022 sniffCounter = 0;
3023 data = dmaBuf;
3024 maxDataLen = 0;
3025 ReaderIsActive = FALSE;
3026 TagIsActive = FALSE;
3027 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
3028 }
3029 }
3030
3031 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
3032 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
3033 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
3034 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
3035 } else {
3036 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
3037 }
3038 // test for length of buffer
3039 if(dataLen > maxDataLen) { // we are more behind than ever...
3040 maxDataLen = dataLen;
3041 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
3042 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
3043 break;
3044 }
3045 }
3046 if(dataLen < 1) continue;
3047
3048 // primary buffer was stopped ( <-- we lost data!
3049 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
3050 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
3051 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
3052 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
3053 }
3054 // secondary buffer sets as primary, secondary buffer was stopped
3055 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
3056 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
3057 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
3058 }
3059
3060 LED_A_OFF();
3061
3062 if (sniffCounter & 0x01) {
3063
3064 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
3065 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
3066 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
3067 LED_C_INV();
3068 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
3069
3070 /* And ready to receive another command. */
3071 UartReset();
3072
3073 /* And also reset the demod code */
3074 DemodReset();
3075 }
3076 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
3077 }
3078
3079 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
3080 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
3081 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
3082 LED_C_INV();
3083
3084 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
3085
3086 // And ready to receive another response.
3087 DemodReset();
3088
3089 // And reset the Miller decoder including its (now outdated) input buffer
3090 UartInit(receivedCmd, receivedCmdPar);
3091 // why not UartReset?
3092 }
3093 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
3094 }
3095 }
3096
3097 previous_data = *data;
3098 sniffCounter++;
3099 data++;
3100 if(data == dmaBuf + DMA_BUFFER_SIZE) {
3101 data = dmaBuf;
3102 }
3103
3104 } // main cycle
3105
3106 FpgaDisableSscDma();
3107 MfSniffEnd();
3108 LEDsoff();
3109 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
3110 }
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