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1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1.h"
21 #include "mifareutil.h"
22 #include "BigBuf.h"
23 #include "parity.h"
24
25 static uint32_t iso14a_timeout;
26 int rsamples = 0;
27 uint8_t trigger = 0;
28 // the block number for the ISO14443-4 PCB
29 static uint8_t iso14_pcb_blocknum = 0;
30
31 //
32 // ISO14443 timing:
33 //
34 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
35 #define REQUEST_GUARD_TIME (7000/16 + 1)
36 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
37 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
38 // bool LastCommandWasRequest = FALSE;
39
40 //
41 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
42 //
43 // When the PM acts as reader and is receiving tag data, it takes
44 // 3 ticks delay in the AD converter
45 // 16 ticks until the modulation detector completes and sets curbit
46 // 8 ticks until bit_to_arm is assigned from curbit
47 // 8*16 ticks for the transfer from FPGA to ARM
48 // 4*16 ticks until we measure the time
49 // - 8*16 ticks because we measure the time of the previous transfer
50 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
51
52 // When the PM acts as a reader and is sending, it takes
53 // 4*16 ticks until we can write data to the sending hold register
54 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
55 // 8 ticks until the first transfer starts
56 // 8 ticks later the FPGA samples the data
57 // 1 tick to assign mod_sig_coil
58 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
59
60 // When the PM acts as tag and is receiving it takes
61 // 2 ticks delay in the RF part (for the first falling edge),
62 // 3 ticks for the A/D conversion,
63 // 8 ticks on average until the start of the SSC transfer,
64 // 8 ticks until the SSC samples the first data
65 // 7*16 ticks to complete the transfer from FPGA to ARM
66 // 8 ticks until the next ssp_clk rising edge
67 // 4*16 ticks until we measure the time
68 // - 8*16 ticks because we measure the time of the previous transfer
69 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
70
71 // The FPGA will report its internal sending delay in
72 uint16_t FpgaSendQueueDelay;
73 // the 5 first bits are the number of bits buffered in mod_sig_buf
74 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
75 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
76
77 // When the PM acts as tag and is sending, it takes
78 // 4*16 ticks until we can write data to the sending hold register
79 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
80 // 8 ticks until the first transfer starts
81 // 8 ticks later the FPGA samples the data
82 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
83 // + 1 tick to assign mod_sig_coil
84 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
85
86 // When the PM acts as sniffer and is receiving tag data, it takes
87 // 3 ticks A/D conversion
88 // 14 ticks to complete the modulation detection
89 // 8 ticks (on average) until the result is stored in to_arm
90 // + the delays in transferring data - which is the same for
91 // sniffing reader and tag data and therefore not relevant
92 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
93
94 // When the PM acts as sniffer and is receiving reader data, it takes
95 // 2 ticks delay in analogue RF receiver (for the falling edge of the
96 // start bit, which marks the start of the communication)
97 // 3 ticks A/D conversion
98 // 8 ticks on average until the data is stored in to_arm.
99 // + the delays in transferring data - which is the same for
100 // sniffing reader and tag data and therefore not relevant
101 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
102
103 //variables used for timing purposes:
104 //these are in ssp_clk cycles:
105 static uint32_t NextTransferTime;
106 static uint32_t LastTimeProxToAirStart;
107 static uint32_t LastProxToAirDuration;
108
109 // CARD TO READER - manchester
110 // Sequence D: 11110000 modulation with subcarrier during first half
111 // Sequence E: 00001111 modulation with subcarrier during second half
112 // Sequence F: 00000000 no modulation with subcarrier
113 // READER TO CARD - miller
114 // Sequence X: 00001100 drop after half a period
115 // Sequence Y: 00000000 no drop
116 // Sequence Z: 11000000 drop at start
117 #define SEC_D 0xf0
118 #define SEC_E 0x0f
119 #define SEC_F 0x00
120 #define SEC_X 0x0c
121 #define SEC_Y 0x00
122 #define SEC_Z 0xc0
123
124 void iso14a_set_trigger(bool enable) {
125 trigger = enable;
126 }
127
128 void iso14a_set_timeout(uint32_t timeout) {
129 iso14a_timeout = timeout;
130 if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106);
131 }
132
133 void iso14a_set_ATS_timeout(uint8_t *ats) {
134
135 uint8_t tb1;
136 uint8_t fwi;
137 uint32_t fwt;
138
139 if (ats[0] > 1) { // there is a format byte T0
140 if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
141
142 if ((ats[1] & 0x10) == 0x10) // there is an interface byte TA(1) preceding TB(1)
143 tb1 = ats[3];
144 else
145 tb1 = ats[2];
146
147 fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI)
148 //fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
149 fwt = 4096 * (1 << fwi);
150
151 //iso14a_set_timeout(fwt/(8*16));
152 iso14a_set_timeout(fwt/128);
153 }
154 }
155 }
156
157 //-----------------------------------------------------------------------------
158 // Generate the parity value for a byte sequence
159 //
160 //-----------------------------------------------------------------------------
161 void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par)
162 {
163 uint16_t paritybit_cnt = 0;
164 uint16_t paritybyte_cnt = 0;
165 uint8_t parityBits = 0;
166
167 for (uint16_t i = 0; i < iLen; i++) {
168 // Generate the parity bits
169 parityBits |= ((oddparity8(pbtCmd[i])) << (7-paritybit_cnt));
170 if (paritybit_cnt == 7) {
171 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
172 parityBits = 0; // and advance to next Parity Byte
173 paritybyte_cnt++;
174 paritybit_cnt = 0;
175 } else {
176 paritybit_cnt++;
177 }
178 }
179
180 // save remaining parity bits
181 par[paritybyte_cnt] = parityBits;
182
183 }
184
185 void AppendCrc14443a(uint8_t* data, int len)
186 {
187 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
188 }
189
190 void AppendCrc14443b(uint8_t* data, int len)
191 {
192 ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1);
193 }
194
195
196 //=============================================================================
197 // ISO 14443 Type A - Miller decoder
198 //=============================================================================
199 // Basics:
200 // This decoder is used when the PM3 acts as a tag.
201 // The reader will generate "pauses" by temporarily switching of the field.
202 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
203 // The FPGA does a comparison with a threshold and would deliver e.g.:
204 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
205 // The Miller decoder needs to identify the following sequences:
206 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
207 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
208 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
209 // Note 1: the bitstream may start at any time. We therefore need to sync.
210 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
211 //-----------------------------------------------------------------------------
212 static tUart Uart;
213
214 // Lookup-Table to decide if 4 raw bits are a modulation.
215 // We accept the following:
216 // 0001 - a 3 tick wide pause
217 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
218 // 0111 - a 2 tick wide pause shifted left
219 // 1001 - a 2 tick wide pause shifted right
220 const bool Mod_Miller_LUT[] = {
221 FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE,
222 FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
223 };
224 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
225 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
226
227 void UartReset()
228 {
229 Uart.state = STATE_UNSYNCD;
230 Uart.bitCount = 0;
231 Uart.len = 0; // number of decoded data bytes
232 Uart.parityLen = 0; // number of decoded parity bytes
233 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
234 Uart.parityBits = 0; // holds 8 parity bits
235 Uart.startTime = 0;
236 Uart.endTime = 0;
237
238 Uart.byteCntMax = 0;
239 Uart.posCnt = 0;
240 Uart.syncBit = 9999;
241 }
242
243 void UartInit(uint8_t *data, uint8_t *parity)
244 {
245 Uart.output = data;
246 Uart.parity = parity;
247 Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits
248 UartReset();
249 }
250
251 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
252 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
253 {
254
255 Uart.fourBits = (Uart.fourBits << 8) | bit;
256
257 if (Uart.state == STATE_UNSYNCD) { // not yet synced
258
259 Uart.syncBit = 9999; // not set
260
261 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
262 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
263 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
264
265 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
266 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
267 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
268 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
269 //
270 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
271 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
272
273 if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7;
274 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6;
275 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5;
276 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4;
277 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3;
278 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2;
279 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1;
280 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0;
281
282 if (Uart.syncBit != 9999) { // found a sync bit
283 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
284 Uart.startTime -= Uart.syncBit;
285 Uart.endTime = Uart.startTime;
286 Uart.state = STATE_START_OF_COMMUNICATION;
287 }
288
289 } else {
290
291 if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
292 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
293 UartReset();
294 } else { // Modulation in first half = Sequence Z = logic "0"
295 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
296 UartReset();
297 } else {
298 Uart.bitCount++;
299 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
300 Uart.state = STATE_MILLER_Z;
301 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
302 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
303 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
304 Uart.parityBits <<= 1; // make room for the parity bit
305 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
306 Uart.bitCount = 0;
307 Uart.shiftReg = 0;
308 if((Uart.len&0x0007) == 0) { // every 8 data bytes
309 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
310 Uart.parityBits = 0;
311 }
312 }
313 }
314 }
315 } else {
316 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
317 Uart.bitCount++;
318 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
319 Uart.state = STATE_MILLER_X;
320 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
321 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
322 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
323 Uart.parityBits <<= 1; // make room for the new parity bit
324 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
325 Uart.bitCount = 0;
326 Uart.shiftReg = 0;
327 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
328 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
329 Uart.parityBits = 0;
330 }
331 }
332 } else { // no modulation in both halves - Sequence Y
333 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
334 Uart.state = STATE_UNSYNCD;
335 Uart.bitCount--; // last "0" was part of EOC sequence
336 Uart.shiftReg <<= 1; // drop it
337 if(Uart.bitCount > 0) { // if we decoded some bits
338 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
339 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
340 Uart.parityBits <<= 1; // add a (void) parity bit
341 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
342 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
343 return TRUE;
344 } else if (Uart.len & 0x0007) { // there are some parity bits to store
345 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
346 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
347 }
348 if (Uart.len) {
349 return TRUE; // we are finished with decoding the raw data sequence
350 } else {
351 UartReset(); // Nothing received - start over
352 }
353 }
354 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
355 UartReset();
356 } else { // a logic "0"
357 Uart.bitCount++;
358 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
359 Uart.state = STATE_MILLER_Y;
360 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
361 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
362 Uart.parityBits <<= 1; // make room for the parity bit
363 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
364 Uart.bitCount = 0;
365 Uart.shiftReg = 0;
366 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
367 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
368 Uart.parityBits = 0;
369 }
370 }
371 }
372 }
373 }
374
375 }
376
377 return FALSE; // not finished yet, need more data
378 }
379
380
381
382 //=============================================================================
383 // ISO 14443 Type A - Manchester decoder
384 //=============================================================================
385 // Basics:
386 // This decoder is used when the PM3 acts as a reader.
387 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
388 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
389 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
390 // The Manchester decoder needs to identify the following sequences:
391 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
392 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
393 // 8 ticks unmodulated: Sequence F = end of communication
394 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
395 // Note 1: the bitstream may start at any time. We therefore need to sync.
396 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
397 static tDemod Demod;
398
399 // Lookup-Table to decide if 4 raw bits are a modulation.
400 // We accept three or four "1" in any position
401 const bool Mod_Manchester_LUT[] = {
402 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
403 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
404 };
405
406 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
407 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
408
409
410 void DemodReset()
411 {
412 Demod.state = DEMOD_UNSYNCD;
413 Demod.len = 0; // number of decoded data bytes
414 Demod.parityLen = 0;
415 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
416 Demod.parityBits = 0; //
417 Demod.collisionPos = 0; // Position of collision bit
418 Demod.twoBits = 0xffff; // buffer for 2 Bits
419 Demod.highCnt = 0;
420 Demod.startTime = 0;
421 Demod.endTime = 0;
422
423 //
424 Demod.bitCount = 0;
425 Demod.syncBit = 0xFFFF;
426 Demod.samples = 0;
427 }
428
429 void DemodInit(uint8_t *data, uint8_t *parity)
430 {
431 Demod.output = data;
432 Demod.parity = parity;
433 DemodReset();
434 }
435
436 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
437 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
438 {
439
440 Demod.twoBits = (Demod.twoBits << 8) | bit;
441
442 if (Demod.state == DEMOD_UNSYNCD) {
443
444 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
445 if (Demod.twoBits == 0x0000) {
446 Demod.highCnt++;
447 } else {
448 Demod.highCnt = 0;
449 }
450 } else {
451 Demod.syncBit = 0xFFFF; // not set
452 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
453 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
454 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
455 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
456 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
457 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
458 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
459 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
460 if (Demod.syncBit != 0xFFFF) {
461 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
462 Demod.startTime -= Demod.syncBit;
463 Demod.bitCount = offset; // number of decoded data bits
464 Demod.state = DEMOD_MANCHESTER_DATA;
465 }
466 }
467
468 } else {
469
470 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
471 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
472 if (!Demod.collisionPos) {
473 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
474 }
475 } // modulation in first half only - Sequence D = 1
476 Demod.bitCount++;
477 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
478 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
479 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
480 Demod.parityBits <<= 1; // make room for the parity bit
481 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
482 Demod.bitCount = 0;
483 Demod.shiftReg = 0;
484 if((Demod.len&0x0007) == 0) { // every 8 data bytes
485 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
486 Demod.parityBits = 0;
487 }
488 }
489 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
490 } else { // no modulation in first half
491 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
492 Demod.bitCount++;
493 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
494 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
495 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
496 Demod.parityBits <<= 1; // make room for the new parity bit
497 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
498 Demod.bitCount = 0;
499 Demod.shiftReg = 0;
500 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
501 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
502 Demod.parityBits = 0;
503 }
504 }
505 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
506 } else { // no modulation in both halves - End of communication
507 if(Demod.bitCount > 0) { // there are some remaining data bits
508 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
509 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
510 Demod.parityBits <<= 1; // add a (void) parity bit
511 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
512 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
513 return TRUE;
514 } else if (Demod.len & 0x0007) { // there are some parity bits to store
515 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
516 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
517 }
518 if (Demod.len) {
519 return TRUE; // we are finished with decoding the raw data sequence
520 } else { // nothing received. Start over
521 DemodReset();
522 }
523 }
524 }
525 }
526 return FALSE; // not finished yet, need more data
527 }
528
529 //=============================================================================
530 // Finally, a `sniffer' for ISO 14443 Type A
531 // Both sides of communication!
532 //=============================================================================
533
534 //-----------------------------------------------------------------------------
535 // Record the sequence of commands sent by the reader to the tag, with
536 // triggering so that we start recording at the point that the tag is moved
537 // near the reader.
538 //-----------------------------------------------------------------------------
539 void RAMFUNC SniffIso14443a(uint8_t param) {
540 // param:
541 // bit 0 - trigger from first card answer
542 // bit 1 - trigger from first reader 7-bit request
543 LEDsoff();
544
545 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
546
547 // Allocate memory from BigBuf for some buffers
548 // free all previous allocations first
549 BigBuf_free();
550
551 // init trace buffer
552 clear_trace();
553 set_tracing(TRUE);
554
555 // The command (reader -> tag) that we're receiving.
556 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
557 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
558
559 // The response (tag -> reader) that we're receiving.
560 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
561 uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE);
562
563 // The DMA buffer, used to stream samples from the FPGA
564 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
565
566 uint8_t *data = dmaBuf;
567 uint8_t previous_data = 0;
568 int maxDataLen = 0;
569 int dataLen = 0;
570 bool TagIsActive = FALSE;
571 bool ReaderIsActive = FALSE;
572
573 // Set up the demodulator for tag -> reader responses.
574 DemodInit(receivedResponse, receivedResponsePar);
575
576 // Set up the demodulator for the reader -> tag commands
577 UartInit(receivedCmd, receivedCmdPar);
578
579 // Setup and start DMA.
580 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
581
582 // We won't start recording the frames that we acquire until we trigger;
583 // a good trigger condition to get started is probably when we see a
584 // response from the tag.
585 // triggered == FALSE -- to wait first for card
586 bool triggered = !(param & 0x03);
587
588 // And now we loop, receiving samples.
589 for(uint32_t rsamples = 0; TRUE; ) {
590
591 if(BUTTON_PRESS()) {
592 DbpString("cancelled by button");
593 break;
594 }
595
596 LED_A_ON();
597 WDT_HIT();
598
599 int register readBufDataP = data - dmaBuf;
600 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
601 if (readBufDataP <= dmaBufDataP){
602 dataLen = dmaBufDataP - readBufDataP;
603 } else {
604 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
605 }
606 // test for length of buffer
607 if(dataLen > maxDataLen) {
608 maxDataLen = dataLen;
609 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
610 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
611 break;
612 }
613 }
614 if(dataLen < 1) continue;
615
616 // primary buffer was stopped( <-- we lost data!
617 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
618 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
619 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
620 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
621 }
622 // secondary buffer sets as primary, secondary buffer was stopped
623 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
624 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
625 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
626 }
627
628 LED_A_OFF();
629
630 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
631
632 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
633 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
634 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
635 LED_C_ON();
636
637 // check - if there is a short 7bit request from reader
638 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
639
640 if(triggered) {
641 if (!LogTrace(receivedCmd,
642 Uart.len,
643 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
644 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
645 Uart.parity,
646 TRUE)) break;
647 }
648 /* And ready to receive another command. */
649 UartReset();
650 /* And also reset the demod code, which might have been */
651 /* false-triggered by the commands from the reader. */
652 DemodReset();
653 LED_B_OFF();
654 }
655 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
656 }
657
658 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
659 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
660 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
661 LED_B_ON();
662
663 if (!LogTrace(receivedResponse,
664 Demod.len,
665 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
666 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
667 Demod.parity,
668 FALSE)) break;
669
670 if ((!triggered) && (param & 0x01)) triggered = TRUE;
671
672 // And ready to receive another response.
673 DemodReset();
674 // And reset the Miller decoder including itS (now outdated) input buffer
675 UartInit(receivedCmd, receivedCmdPar);
676
677 LED_C_OFF();
678 }
679 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
680 }
681 }
682
683 previous_data = *data;
684 rsamples++;
685 data++;
686 if(data == dmaBuf + DMA_BUFFER_SIZE) {
687 data = dmaBuf;
688 }
689 } // main cycle
690
691 FpgaDisableSscDma();
692 LEDsoff();
693
694 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
695 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]);
696
697 set_tracing(FALSE);
698 }
699
700 //-----------------------------------------------------------------------------
701 // Prepare tag messages
702 //-----------------------------------------------------------------------------
703 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
704 {
705 ToSendReset();
706
707 // Correction bit, might be removed when not needed
708 ToSendStuffBit(0);
709 ToSendStuffBit(0);
710 ToSendStuffBit(0);
711 ToSendStuffBit(0);
712 ToSendStuffBit(1); // 1
713 ToSendStuffBit(0);
714 ToSendStuffBit(0);
715 ToSendStuffBit(0);
716
717 // Send startbit
718 ToSend[++ToSendMax] = SEC_D;
719 LastProxToAirDuration = 8 * ToSendMax - 4;
720
721 for(uint16_t i = 0; i < len; i++) {
722 uint8_t b = cmd[i];
723
724 // Data bits
725 for(uint16_t j = 0; j < 8; j++) {
726 if(b & 1) {
727 ToSend[++ToSendMax] = SEC_D;
728 } else {
729 ToSend[++ToSendMax] = SEC_E;
730 }
731 b >>= 1;
732 }
733
734 // Get the parity bit
735 if (parity[i>>3] & (0x80>>(i&0x0007))) {
736 ToSend[++ToSendMax] = SEC_D;
737 LastProxToAirDuration = 8 * ToSendMax - 4;
738 } else {
739 ToSend[++ToSendMax] = SEC_E;
740 LastProxToAirDuration = 8 * ToSendMax;
741 }
742 }
743
744 // Send stopbit
745 ToSend[++ToSendMax] = SEC_F;
746
747 // Convert from last byte pos to length
748 ToSendMax++;
749 }
750
751 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
752 {
753 uint8_t par[MAX_PARITY_SIZE];
754
755 GetParity(cmd, len, par);
756 CodeIso14443aAsTagPar(cmd, len, par);
757 }
758
759
760 static void Code4bitAnswerAsTag(uint8_t cmd)
761 {
762 int i;
763
764 ToSendReset();
765
766 // Correction bit, might be removed when not needed
767 ToSendStuffBit(0);
768 ToSendStuffBit(0);
769 ToSendStuffBit(0);
770 ToSendStuffBit(0);
771 ToSendStuffBit(1); // 1
772 ToSendStuffBit(0);
773 ToSendStuffBit(0);
774 ToSendStuffBit(0);
775
776 // Send startbit
777 ToSend[++ToSendMax] = SEC_D;
778
779 uint8_t b = cmd;
780 for(i = 0; i < 4; i++) {
781 if(b & 1) {
782 ToSend[++ToSendMax] = SEC_D;
783 LastProxToAirDuration = 8 * ToSendMax - 4;
784 } else {
785 ToSend[++ToSendMax] = SEC_E;
786 LastProxToAirDuration = 8 * ToSendMax;
787 }
788 b >>= 1;
789 }
790
791 // Send stopbit
792 ToSend[++ToSendMax] = SEC_F;
793
794 // Convert from last byte pos to length
795 ToSendMax++;
796 }
797
798 //-----------------------------------------------------------------------------
799 // Wait for commands from reader
800 // Stop when button is pressed
801 // Or return TRUE when command is captured
802 //-----------------------------------------------------------------------------
803 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
804 {
805 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
806 // only, since we are receiving, not transmitting).
807 // Signal field is off with the appropriate LED
808 LED_D_OFF();
809 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
810
811 // Now run a `software UART' on the stream of incoming samples.
812 UartInit(received, parity);
813
814 // clear RXRDY:
815 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
816
817 for(;;) {
818 WDT_HIT();
819
820 if(BUTTON_PRESS()) return FALSE;
821
822 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
823 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
824 if(MillerDecoding(b, 0)) {
825 *len = Uart.len;
826 return TRUE;
827 }
828 }
829 }
830 }
831
832 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
833 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
834 int EmSend4bit(uint8_t resp);
835 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
836 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
837 int EmSendCmd(uint8_t *resp, uint16_t respLen);
838 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
839 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
840 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
841
842 static uint8_t* free_buffer_pointer;
843
844 typedef struct {
845 uint8_t* response;
846 size_t response_n;
847 uint8_t* modulation;
848 size_t modulation_n;
849 uint32_t ProxToAirDuration;
850 } tag_response_info_t;
851
852 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
853 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
854 // This will need the following byte array for a modulation sequence
855 // 144 data bits (18 * 8)
856 // 18 parity bits
857 // 2 Start and stop
858 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
859 // 1 just for the case
860 // ----------- +
861 // 166 bytes, since every bit that needs to be send costs us a byte
862 //
863
864
865 // Prepare the tag modulation bits from the message
866 CodeIso14443aAsTag(response_info->response,response_info->response_n);
867
868 // Make sure we do not exceed the free buffer space
869 if (ToSendMax > max_buffer_size) {
870 Dbprintf("Out of memory, when modulating bits for tag answer:");
871 Dbhexdump(response_info->response_n,response_info->response,false);
872 return false;
873 }
874
875 // Copy the byte array, used for this modulation to the buffer position
876 memcpy(response_info->modulation,ToSend,ToSendMax);
877
878 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
879 response_info->modulation_n = ToSendMax;
880 response_info->ProxToAirDuration = LastProxToAirDuration;
881
882 return true;
883 }
884
885
886 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
887 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
888 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
889 // -> need 273 bytes buffer
890 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
891 // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
892 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
893
894 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
895 // Retrieve and store the current buffer index
896 response_info->modulation = free_buffer_pointer;
897
898 // Determine the maximum size we can use from our buffer
899 size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE;
900
901 // Forward the prepare tag modulation function to the inner function
902 if (prepare_tag_modulation(response_info, max_buffer_size)) {
903 // Update the free buffer offset
904 free_buffer_pointer += ToSendMax;
905 return true;
906 } else {
907 return false;
908 }
909 }
910
911 //-----------------------------------------------------------------------------
912 // Main loop of simulated tag: receive commands from reader, decide what
913 // response to send, and send it.
914 //-----------------------------------------------------------------------------
915 void SimulateIso14443aTag(int tagType, int flags, byte_t* data)
916 {
917 uint32_t counters[] = {0,0,0};
918 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
919 // This can be used in a reader-only attack.
920 // (it can also be retrieved via 'hf 14a list', but hey...
921 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
922 uint8_t ar_nr_collected = 0;
923
924 uint8_t sak;
925
926 // PACK response to PWD AUTH for EV1/NTAG
927 uint8_t response8[4] = {0,0,0,0};
928
929 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
930 uint8_t response1[2] = {0,0};
931
932 switch (tagType) {
933 case 1: { // MIFARE Classic
934 // Says: I am Mifare 1k - original line
935 response1[0] = 0x04;
936 response1[1] = 0x00;
937 sak = 0x08;
938 } break;
939 case 2: { // MIFARE Ultralight
940 // Says: I am a stupid memory tag, no crypto
941 response1[0] = 0x44;
942 response1[1] = 0x00;
943 sak = 0x00;
944 } break;
945 case 3: { // MIFARE DESFire
946 // Says: I am a DESFire tag, ph33r me
947 response1[0] = 0x04;
948 response1[1] = 0x03;
949 sak = 0x20;
950 } break;
951 case 4: { // ISO/IEC 14443-4
952 // Says: I am a javacard (JCOP)
953 response1[0] = 0x04;
954 response1[1] = 0x00;
955 sak = 0x28;
956 } break;
957 case 5: { // MIFARE TNP3XXX
958 // Says: I am a toy
959 response1[0] = 0x01;
960 response1[1] = 0x0f;
961 sak = 0x01;
962 } break;
963 case 6: { // MIFARE Mini
964 // Says: I am a Mifare Mini, 320b
965 response1[0] = 0x44;
966 response1[1] = 0x00;
967 sak = 0x09;
968 } break;
969 case 7: { // NTAG?
970 // Says: I am a NTAG,
971 response1[0] = 0x44;
972 response1[1] = 0x00;
973 sak = 0x00;
974 // PACK
975 response8[0] = 0x80;
976 response8[1] = 0x80;
977 ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]);
978 // uid not supplied then get from emulator memory
979 if (data[0]==0) {
980 uint16_t start = 4 * (0+12);
981 uint8_t emdata[8];
982 emlGetMemBt( emdata, start, sizeof(emdata));
983 memcpy(data, emdata, 3); //uid bytes 0-2
984 memcpy(data+3, emdata+4, 4); //uid bytes 3-7
985 flags |= FLAG_7B_UID_IN_DATA;
986 }
987 } break;
988 default: {
989 Dbprintf("Error: unkown tagtype (%d)",tagType);
990 return;
991 } break;
992 }
993
994 // The second response contains the (mandatory) first 24 bits of the UID
995 uint8_t response2[5] = {0x00};
996
997 // Check if the uid uses the (optional) part
998 uint8_t response2a[5] = {0x00};
999
1000 if (flags & FLAG_7B_UID_IN_DATA) {
1001 response2[0] = 0x88;
1002 response2[1] = data[0];
1003 response2[2] = data[1];
1004 response2[3] = data[2];
1005
1006 response2a[0] = data[3];
1007 response2a[1] = data[4];
1008 response2a[2] = data[5];
1009 response2a[3] = data[6]; //??
1010 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1011
1012 // Configure the ATQA and SAK accordingly
1013 response1[0] |= 0x40;
1014 sak |= 0x04;
1015 } else {
1016 memcpy(response2, data, 4);
1017 //num_to_bytes(uid_1st,4,response2);
1018 // Configure the ATQA and SAK accordingly
1019 response1[0] &= 0xBF;
1020 sak &= 0xFB;
1021 }
1022
1023 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1024 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1025
1026 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1027 uint8_t response3[3] = {0x00};
1028 response3[0] = sak;
1029 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1030
1031 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1032 uint8_t response3a[3] = {0x00};
1033 response3a[0] = sak & 0xFB;
1034 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1035
1036 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1037 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1038 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1039 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1040 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1041 // TC(1) = 0x02: CID supported, NAD not supported
1042 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1043
1044 // Prepare GET_VERSION (different for UL EV-1 / NTAG)
1045 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
1046 //uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
1047
1048 // Prepare CHK_TEARING
1049 //uint8_t response9[] = {0xBD,0x90,0x3f};
1050
1051 #define TAG_RESPONSE_COUNT 10
1052 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1053 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1054 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1055 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1056 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1057 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1058 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1059 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1060
1061 { .response = response8, .response_n = sizeof(response8) } // EV1/NTAG PACK response
1062 };
1063 //{ .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response
1064 //{ .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
1065
1066
1067 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1068 // Such a response is less time critical, so we can prepare them on the fly
1069 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1070 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1071 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1072 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1073 tag_response_info_t dynamic_response_info = {
1074 .response = dynamic_response_buffer,
1075 .response_n = 0,
1076 .modulation = dynamic_modulation_buffer,
1077 .modulation_n = 0
1078 };
1079
1080 // We need to listen to the high-frequency, peak-detected path.
1081 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1082
1083 BigBuf_free_keep_EM();
1084
1085 // allocate buffers:
1086 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1087 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
1088 free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE);
1089
1090 // clear trace
1091 clear_trace();
1092 set_tracing(TRUE);
1093
1094 // Prepare the responses of the anticollision phase
1095 // there will be not enough time to do this at the moment the reader sends it REQA
1096 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++)
1097 prepare_allocated_tag_modulation(&responses[i]);
1098
1099 int len = 0;
1100
1101 // To control where we are in the protocol
1102 int order = 0;
1103 int lastorder;
1104
1105 // Just to allow some checks
1106 int happened = 0;
1107 int happened2 = 0;
1108 int cmdsRecvd = 0;
1109
1110 cmdsRecvd = 0;
1111 tag_response_info_t* p_response;
1112
1113 LED_A_ON();
1114 for(;;) {
1115
1116 WDT_HIT();
1117
1118 // Clean receive command buffer
1119 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1120 DbpString("Button press");
1121 break;
1122 }
1123
1124 p_response = NULL;
1125
1126 // Okay, look at the command now.
1127 lastorder = order;
1128 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1129 p_response = &responses[0]; order = 1;
1130 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1131 p_response = &responses[0]; order = 6;
1132 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1133 p_response = &responses[1]; order = 2;
1134 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1135 p_response = &responses[2]; order = 20;
1136 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1137 p_response = &responses[3]; order = 3;
1138 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1139 p_response = &responses[4]; order = 30;
1140 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1141 uint8_t block = receivedCmd[1];
1142 // if Ultralight or NTAG (4 byte blocks)
1143 if ( tagType == 7 || tagType == 2 ) {
1144 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1145 uint16_t start = 4 * (block+12);
1146 uint8_t emdata[MAX_MIFARE_FRAME_SIZE];
1147 emlGetMemBt( emdata, start, 16);
1148 AppendCrc14443a(emdata, 16);
1149 EmSendCmdEx(emdata, sizeof(emdata), false);
1150 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1151 p_response = NULL;
1152 } else { // all other tags (16 byte block tags)
1153 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1154 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1155 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1156 p_response = NULL;
1157 }
1158 } else if(receivedCmd[0] == 0x3A) { // Received a FAST READ (ranged read)
1159
1160 uint8_t emdata[MAX_FRAME_SIZE];
1161 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1162 int start = (receivedCmd[1]+12) * 4;
1163 int len = (receivedCmd[2] - receivedCmd[1] + 1) * 4;
1164 emlGetMemBt( emdata, start, len);
1165 AppendCrc14443a(emdata, len);
1166 EmSendCmdEx(emdata, len+2, false);
1167 p_response = NULL;
1168
1169 } else if(receivedCmd[0] == 0x3C && tagType == 7) { // Received a READ SIGNATURE --
1170 // ECC data, taken from a NTAG215 amiibo token. might work. LEN: 32, + 2 crc
1171 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1172 uint16_t start = 4 * 4;
1173 uint8_t emdata[34];
1174 emlGetMemBt( emdata, start, 32);
1175 AppendCrc14443a(emdata, 32);
1176 EmSendCmdEx(emdata, sizeof(emdata), false);
1177 //uint8_t data[] = {0x56,0x06,0xa6,0x4f,0x43,0x32,0x53,0x6f,
1178 // 0x43,0xda,0x45,0xd6,0x61,0x38,0xaa,0x1e,
1179 // 0xcf,0xd3,0x61,0x36,0xca,0x5f,0xbb,0x05,
1180 // 0xce,0x21,0x24,0x5b,0xa6,0x7a,0x79,0x07,
1181 // 0x00,0x00};
1182 //AppendCrc14443a(data, sizeof(data)-2);
1183 //EmSendCmdEx(data,sizeof(data),false);
1184 p_response = NULL;
1185 } else if (receivedCmd[0] == 0x39 && tagType == 7) { // Received a READ COUNTER --
1186 uint8_t index = receivedCmd[1];
1187 uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5};
1188 if ( counters[index] > 0) {
1189 num_to_bytes(counters[index], 3, data);
1190 AppendCrc14443a(data, sizeof(data)-2);
1191 }
1192 EmSendCmdEx(data,sizeof(data),false);
1193 p_response = NULL;
1194 } else if (receivedCmd[0] == 0xA5 && tagType == 7) { // Received a INC COUNTER --
1195 // number of counter
1196 uint8_t counter = receivedCmd[1];
1197 uint32_t val = bytes_to_num(receivedCmd+2,4);
1198 counters[counter] = val;
1199
1200 // send ACK
1201 uint8_t ack[] = {0x0a};
1202 EmSendCmdEx(ack,sizeof(ack),false);
1203 p_response = NULL;
1204
1205 } else if(receivedCmd[0] == 0x3E && tagType == 7) { // Received a CHECK_TEARING_EVENT --
1206 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1207 uint8_t emdata[3];
1208 uint8_t counter=0;
1209 if (receivedCmd[1]<3) counter = receivedCmd[1];
1210 emlGetMemBt( emdata, 10+counter, 1);
1211 AppendCrc14443a(emdata, sizeof(emdata)-2);
1212 EmSendCmdEx(emdata, sizeof(emdata), false);
1213 p_response = NULL;
1214 //p_response = &responses[9];
1215
1216 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1217 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1218 p_response = NULL;
1219 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1220
1221 if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1222 uint8_t emdata[10];
1223 emlGetMemBt( emdata, 0, 8 );
1224 AppendCrc14443a(emdata, sizeof(emdata)-2);
1225 EmSendCmdEx(emdata, sizeof(emdata), false);
1226 p_response = NULL;
1227 //p_response = &responses[7];
1228 } else {
1229 p_response = &responses[5]; order = 7;
1230 }
1231 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1232 if (tagType == 1 || tagType == 2) { // RATS not supported
1233 EmSend4bit(CARD_NACK_NA);
1234 p_response = NULL;
1235 } else {
1236 p_response = &responses[6]; order = 70;
1237 }
1238 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1239 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1240 uint32_t nonce = bytes_to_num(response5,4);
1241 uint32_t nr = bytes_to_num(receivedCmd,4);
1242 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1243 //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar);
1244
1245 if(flags & FLAG_NR_AR_ATTACK )
1246 {
1247 if(ar_nr_collected < 2){
1248 // Avoid duplicates... probably not necessary, nr should vary.
1249 //if(ar_nr_responses[3] != nr){
1250 ar_nr_responses[ar_nr_collected*5] = 0;
1251 ar_nr_responses[ar_nr_collected*5+1] = 0;
1252 ar_nr_responses[ar_nr_collected*5+2] = nonce;
1253 ar_nr_responses[ar_nr_collected*5+3] = nr;
1254 ar_nr_responses[ar_nr_collected*5+4] = ar;
1255 ar_nr_collected++;
1256 //}
1257 }
1258
1259 if(ar_nr_collected > 1 ) {
1260
1261 if (MF_DBGLEVEL >= 2) {
1262 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1263 Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x",
1264 ar_nr_responses[0], // UID1
1265 ar_nr_responses[1], // UID2
1266 ar_nr_responses[2], // NT
1267 ar_nr_responses[3], // AR1
1268 ar_nr_responses[4], // NR1
1269 ar_nr_responses[8], // AR2
1270 ar_nr_responses[9] // NR2
1271 );
1272 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
1273 ar_nr_responses[0], // UID1
1274 ar_nr_responses[1], // UID2
1275 ar_nr_responses[2], // NT1
1276 ar_nr_responses[3], // AR1
1277 ar_nr_responses[4], // NR1
1278 ar_nr_responses[7], // NT2
1279 ar_nr_responses[8], // AR2
1280 ar_nr_responses[9] // NR2
1281 );
1282 }
1283 uint8_t len = ar_nr_collected*5*4;
1284 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,len,0,&ar_nr_responses,len);
1285 ar_nr_collected = 0;
1286 memset(ar_nr_responses, 0x00, len);
1287 }
1288 }
1289 } else if (receivedCmd[0] == 0x1a ) // ULC authentication
1290 {
1291
1292 }
1293 else if (receivedCmd[0] == 0x1b) // NTAG / EV-1 authentication
1294 {
1295 if ( tagType == 7 ) {
1296 uint16_t start = 13; //first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00]
1297 uint8_t emdata[4];
1298 emlGetMemBt( emdata, start, 2);
1299 AppendCrc14443a(emdata, 2);
1300 EmSendCmdEx(emdata, sizeof(emdata), false);
1301 p_response = NULL;
1302 //p_response = &responses[8]; // PACK response
1303 uint32_t pwd = bytes_to_num(receivedCmd+1,4);
1304
1305 if ( MF_DBGLEVEL >= 3) Dbprintf("Auth attempt: %08x", pwd);
1306 }
1307 } else {
1308 // Check for ISO 14443A-4 compliant commands, look at left nibble
1309 switch (receivedCmd[0]) {
1310 case 0x02:
1311 case 0x03: { // IBlock (command no CID)
1312 dynamic_response_info.response[0] = receivedCmd[0];
1313 dynamic_response_info.response[1] = 0x90;
1314 dynamic_response_info.response[2] = 0x00;
1315 dynamic_response_info.response_n = 3;
1316 } break;
1317 case 0x0B:
1318 case 0x0A: { // IBlock (command CID)
1319 dynamic_response_info.response[0] = receivedCmd[0];
1320 dynamic_response_info.response[1] = 0x00;
1321 dynamic_response_info.response[2] = 0x90;
1322 dynamic_response_info.response[3] = 0x00;
1323 dynamic_response_info.response_n = 4;
1324 } break;
1325
1326 case 0x1A:
1327 case 0x1B: { // Chaining command
1328 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1329 dynamic_response_info.response_n = 2;
1330 } break;
1331
1332 case 0xaa:
1333 case 0xbb: {
1334 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1335 dynamic_response_info.response_n = 2;
1336 } break;
1337
1338 case 0xBA: { // ping / pong
1339 dynamic_response_info.response[0] = 0xAB;
1340 dynamic_response_info.response[1] = 0x00;
1341 dynamic_response_info.response_n = 2;
1342 } break;
1343
1344 case 0xCA:
1345 case 0xC2: { // Readers sends deselect command
1346 dynamic_response_info.response[0] = 0xCA;
1347 dynamic_response_info.response[1] = 0x00;
1348 dynamic_response_info.response_n = 2;
1349 } break;
1350
1351 default: {
1352 // Never seen this command before
1353 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1354 Dbprintf("Received unknown command (len=%d):",len);
1355 Dbhexdump(len,receivedCmd,false);
1356 // Do not respond
1357 dynamic_response_info.response_n = 0;
1358 } break;
1359 }
1360
1361 if (dynamic_response_info.response_n > 0) {
1362 // Copy the CID from the reader query
1363 dynamic_response_info.response[1] = receivedCmd[1];
1364
1365 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1366 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1367 dynamic_response_info.response_n += 2;
1368
1369 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1370 Dbprintf("Error preparing tag response");
1371 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1372 break;
1373 }
1374 p_response = &dynamic_response_info;
1375 }
1376 }
1377
1378 // Count number of wakeups received after a halt
1379 if(order == 6 && lastorder == 5) { happened++; }
1380
1381 // Count number of other messages after a halt
1382 if(order != 6 && lastorder == 5) { happened2++; }
1383
1384 if(cmdsRecvd > 999) {
1385 DbpString("1000 commands later...");
1386 break;
1387 }
1388 cmdsRecvd++;
1389
1390 if (p_response != NULL) {
1391 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1392 // do the tracing for the previous reader request and this tag answer:
1393 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1394 GetParity(p_response->response, p_response->response_n, par);
1395
1396 EmLogTrace(Uart.output,
1397 Uart.len,
1398 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1399 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1400 Uart.parity,
1401 p_response->response,
1402 p_response->response_n,
1403 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1404 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1405 par);
1406 }
1407
1408 if (!tracing) {
1409 Dbprintf("Trace Full. Simulation stopped.");
1410 break;
1411 }
1412 }
1413
1414 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1415 set_tracing(FALSE);
1416 BigBuf_free_keep_EM();
1417 LED_A_OFF();
1418
1419 if (MF_DBGLEVEL >= 4){
1420 Dbprintf("-[ Wake ups after halt [%d]", happened);
1421 Dbprintf("-[ Messages after halt [%d]", happened2);
1422 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd);
1423 }
1424 }
1425
1426
1427 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1428 // of bits specified in the delay parameter.
1429 void PrepareDelayedTransfer(uint16_t delay)
1430 {
1431 uint8_t bitmask = 0;
1432 uint8_t bits_to_shift = 0;
1433 uint8_t bits_shifted = 0;
1434
1435 delay &= 0x07;
1436 if (delay) {
1437 for (uint16_t i = 0; i < delay; i++) {
1438 bitmask |= (0x01 << i);
1439 }
1440 ToSend[++ToSendMax] = 0x00;
1441 for (uint16_t i = 0; i < ToSendMax; i++) {
1442 bits_to_shift = ToSend[i] & bitmask;
1443 ToSend[i] = ToSend[i] >> delay;
1444 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1445 bits_shifted = bits_to_shift;
1446 }
1447 }
1448 }
1449
1450
1451 //-------------------------------------------------------------------------------------
1452 // Transmit the command (to the tag) that was placed in ToSend[].
1453 // Parameter timing:
1454 // if NULL: transfer at next possible time, taking into account
1455 // request guard time and frame delay time
1456 // if == 0: transfer immediately and return time of transfer
1457 // if != 0: delay transfer until time specified
1458 //-------------------------------------------------------------------------------------
1459 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1460 {
1461 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1462
1463 uint32_t ThisTransferTime = 0;
1464
1465 if (timing) {
1466 if(*timing == 0) { // Measure time
1467 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1468 } else {
1469 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1470 }
1471 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1472
1473 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1474 LastTimeProxToAirStart = *timing;
1475 } else {
1476 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1477 while(GetCountSspClk() < ThisTransferTime);
1478 LastTimeProxToAirStart = ThisTransferTime;
1479 }
1480
1481 // clear TXRDY
1482 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1483
1484 uint16_t c = 0;
1485 for(;;) {
1486 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1487 AT91C_BASE_SSC->SSC_THR = cmd[c];
1488 ++c;
1489 if(c >= len)
1490 break;
1491 }
1492 }
1493
1494 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1495 }
1496
1497
1498 //-----------------------------------------------------------------------------
1499 // Prepare reader command (in bits, support short frames) to send to FPGA
1500 //-----------------------------------------------------------------------------
1501 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
1502 {
1503 int i, j;
1504 int last = 0;
1505 uint8_t b;
1506
1507 ToSendReset();
1508
1509 // Start of Communication (Seq. Z)
1510 ToSend[++ToSendMax] = SEC_Z;
1511 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1512
1513 size_t bytecount = nbytes(bits);
1514 // Generate send structure for the data bits
1515 for (i = 0; i < bytecount; i++) {
1516 // Get the current byte to send
1517 b = cmd[i];
1518 size_t bitsleft = MIN((bits-(i*8)),8);
1519
1520 for (j = 0; j < bitsleft; j++) {
1521 if (b & 1) {
1522 // Sequence X
1523 ToSend[++ToSendMax] = SEC_X;
1524 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1525 last = 1;
1526 } else {
1527 if (last == 0) {
1528 // Sequence Z
1529 ToSend[++ToSendMax] = SEC_Z;
1530 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1531 } else {
1532 // Sequence Y
1533 ToSend[++ToSendMax] = SEC_Y;
1534 last = 0;
1535 }
1536 }
1537 b >>= 1;
1538 }
1539
1540 // Only transmit parity bit if we transmitted a complete byte
1541 if (j == 8 && parity != NULL) {
1542 // Get the parity bit
1543 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1544 // Sequence X
1545 ToSend[++ToSendMax] = SEC_X;
1546 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1547 last = 1;
1548 } else {
1549 if (last == 0) {
1550 // Sequence Z
1551 ToSend[++ToSendMax] = SEC_Z;
1552 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1553 } else {
1554 // Sequence Y
1555 ToSend[++ToSendMax] = SEC_Y;
1556 last = 0;
1557 }
1558 }
1559 }
1560 }
1561
1562 // End of Communication: Logic 0 followed by Sequence Y
1563 if (last == 0) {
1564 // Sequence Z
1565 ToSend[++ToSendMax] = SEC_Z;
1566 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1567 } else {
1568 // Sequence Y
1569 ToSend[++ToSendMax] = SEC_Y;
1570 last = 0;
1571 }
1572 ToSend[++ToSendMax] = SEC_Y;
1573
1574 // Convert to length of command:
1575 ToSendMax++;
1576 }
1577
1578 //-----------------------------------------------------------------------------
1579 // Prepare reader command to send to FPGA
1580 //-----------------------------------------------------------------------------
1581 void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity)
1582 {
1583 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1584 }
1585
1586
1587 //-----------------------------------------------------------------------------
1588 // Wait for commands from reader
1589 // Stop when button is pressed (return 1) or field was gone (return 2)
1590 // Or return 0 when command is captured
1591 //-----------------------------------------------------------------------------
1592 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1593 {
1594 *len = 0;
1595
1596 uint32_t timer = 0, vtime = 0;
1597 int analogCnt = 0;
1598 int analogAVG = 0;
1599
1600 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1601 // only, since we are receiving, not transmitting).
1602 // Signal field is off with the appropriate LED
1603 LED_D_OFF();
1604 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1605
1606 // Set ADC to read field strength
1607 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1608 AT91C_BASE_ADC->ADC_MR =
1609 ADC_MODE_PRESCALE(63) |
1610 ADC_MODE_STARTUP_TIME(1) |
1611 ADC_MODE_SAMPLE_HOLD_TIME(15);
1612 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1613 // start ADC
1614 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1615
1616 // Now run a 'software UART' on the stream of incoming samples.
1617 UartInit(received, parity);
1618
1619 // Clear RXRDY:
1620 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1621
1622 for(;;) {
1623 WDT_HIT();
1624
1625 if (BUTTON_PRESS()) return 1;
1626
1627 // test if the field exists
1628 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1629 analogCnt++;
1630 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1631 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1632 if (analogCnt >= 32) {
1633 if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1634 vtime = GetTickCount();
1635 if (!timer) timer = vtime;
1636 // 50ms no field --> card to idle state
1637 if (vtime - timer > 50) return 2;
1638 } else
1639 if (timer) timer = 0;
1640 analogCnt = 0;
1641 analogAVG = 0;
1642 }
1643 }
1644
1645 // receive and test the miller decoding
1646 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1647 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1648 if(MillerDecoding(b, 0)) {
1649 *len = Uart.len;
1650 return 0;
1651 }
1652 }
1653
1654 }
1655 }
1656
1657
1658 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1659 {
1660 uint8_t b;
1661 uint16_t i = 0;
1662 uint32_t ThisTransferTime;
1663
1664 // Modulate Manchester
1665 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1666
1667 // include correction bit if necessary
1668 if (Uart.parityBits & 0x01) {
1669 correctionNeeded = TRUE;
1670 }
1671 if(correctionNeeded) {
1672 // 1236, so correction bit needed
1673 i = 0;
1674 } else {
1675 i = 1;
1676 }
1677
1678 // clear receiving shift register and holding register
1679 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1680 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1681 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1682 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1683
1684 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1685 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1686 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1687 if (AT91C_BASE_SSC->SSC_RHR) break;
1688 }
1689
1690 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1691
1692 // Clear TXRDY:
1693 AT91C_BASE_SSC->SSC_THR = SEC_F;
1694
1695 // send cycle
1696 for(; i < respLen; ) {
1697 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1698 AT91C_BASE_SSC->SSC_THR = resp[i++];
1699 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1700 }
1701
1702 if(BUTTON_PRESS()) break;
1703 }
1704
1705 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1706 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3;
1707 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
1708 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1709 AT91C_BASE_SSC->SSC_THR = SEC_F;
1710 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1711 i++;
1712 }
1713 }
1714
1715 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1716
1717 return 0;
1718 }
1719
1720 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1721 Code4bitAnswerAsTag(resp);
1722 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1723 // do the tracing for the previous reader request and this tag answer:
1724 uint8_t par[1] = {0x00};
1725 GetParity(&resp, 1, par);
1726 EmLogTrace(Uart.output,
1727 Uart.len,
1728 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1729 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1730 Uart.parity,
1731 &resp,
1732 1,
1733 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1734 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1735 par);
1736 return res;
1737 }
1738
1739 int EmSend4bit(uint8_t resp){
1740 return EmSend4bitEx(resp, false);
1741 }
1742
1743 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1744 CodeIso14443aAsTagPar(resp, respLen, par);
1745 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1746 // do the tracing for the previous reader request and this tag answer:
1747 EmLogTrace(Uart.output,
1748 Uart.len,
1749 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1750 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1751 Uart.parity,
1752 resp,
1753 respLen,
1754 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1755 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1756 par);
1757 return res;
1758 }
1759
1760 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1761 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1762 GetParity(resp, respLen, par);
1763 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1764 }
1765
1766 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1767 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1768 GetParity(resp, respLen, par);
1769 return EmSendCmdExPar(resp, respLen, false, par);
1770 }
1771
1772 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1773 return EmSendCmdExPar(resp, respLen, false, par);
1774 }
1775
1776 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1777 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1778 {
1779 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1780 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1781 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1782 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1783 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1784 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1785 reader_EndTime = tag_StartTime - exact_fdt;
1786 reader_StartTime = reader_EndTime - reader_modlen;
1787
1788 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE))
1789 return FALSE;
1790 else
1791 return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1792
1793 }
1794
1795 //-----------------------------------------------------------------------------
1796 // Wait a certain time for tag response
1797 // If a response is captured return TRUE
1798 // If it takes too long return FALSE
1799 //-----------------------------------------------------------------------------
1800 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1801 {
1802 uint32_t c = 0x00;
1803
1804 // Set FPGA mode to "reader listen mode", no modulation (listen
1805 // only, since we are receiving, not transmitting).
1806 // Signal field is on with the appropriate LED
1807 LED_D_ON();
1808 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1809
1810 // Now get the answer from the card
1811 DemodInit(receivedResponse, receivedResponsePar);
1812
1813 // clear RXRDY:
1814 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1815
1816 for(;;) {
1817 WDT_HIT();
1818
1819 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1820 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1821 if(ManchesterDecoding(b, offset, 0)) {
1822 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1823 return TRUE;
1824 } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) {
1825 return FALSE;
1826 }
1827 }
1828 }
1829 }
1830
1831 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1832 {
1833 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1834
1835 // Send command to tag
1836 TransmitFor14443a(ToSend, ToSendMax, timing);
1837 if(trigger)
1838 LED_A_ON();
1839
1840 // Log reader command in trace buffer
1841 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1842 }
1843
1844 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1845 {
1846 ReaderTransmitBitsPar(frame, len*8, par, timing);
1847 }
1848
1849 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1850 {
1851 // Generate parity and redirect
1852 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1853 GetParity(frame, len/8, par);
1854 ReaderTransmitBitsPar(frame, len, par, timing);
1855 }
1856
1857 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1858 {
1859 // Generate parity and redirect
1860 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1861 GetParity(frame, len, par);
1862 ReaderTransmitBitsPar(frame, len*8, par, timing);
1863 }
1864
1865 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1866 {
1867 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset))
1868 return FALSE;
1869
1870 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1871 return Demod.len;
1872 }
1873
1874 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1875 {
1876 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0))
1877 return FALSE;
1878
1879 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1880 return Demod.len;
1881 }
1882
1883 // performs iso14443a anticollision (optional) and card select procedure
1884 // fills the uid and cuid pointer unless NULL
1885 // fills the card info record unless NULL
1886 // if anticollision is false, then the UID must be provided in uid_ptr[]
1887 // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1888 int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) {
1889 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1890 uint8_t sel_all[] = { 0x93,0x20 };
1891 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1892 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1893 uint8_t resp[MAX_FRAME_SIZE] = {0}; // theoretically. A usual RATS will be much smaller
1894 uint8_t resp_par[MAX_PARITY_SIZE] = {0};
1895 byte_t uid_resp[4] = {0};
1896 size_t uid_resp_len = 0;
1897
1898 uint8_t sak = 0x04; // cascade uid
1899 int cascade_level = 0;
1900 int len;
1901
1902 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1903 ReaderTransmitBitsPar(wupa, 7, NULL, NULL);
1904
1905 // Receive the ATQA
1906 if(!ReaderReceive(resp, resp_par)) return 0;
1907
1908 if(p_hi14a_card) {
1909 memcpy(p_hi14a_card->atqa, resp, 2);
1910 p_hi14a_card->uidlen = 0;
1911 memset(p_hi14a_card->uid,0,10);
1912 }
1913
1914 if (anticollision) {
1915 // clear uid
1916 if (uid_ptr)
1917 memset(uid_ptr,0,10);
1918 }
1919
1920 // check for proprietary anticollision:
1921 if ((resp[0] & 0x1F) == 0) return 3;
1922
1923 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1924 // which case we need to make a cascade 2 request and select - this is a long UID
1925 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1926 for(; sak & 0x04; cascade_level++) {
1927 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1928 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1929
1930 if (anticollision) {
1931 // SELECT_ALL
1932 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1933 if (!ReaderReceive(resp, resp_par)) return 0;
1934
1935 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1936 memset(uid_resp, 0, 4);
1937 uint16_t uid_resp_bits = 0;
1938 uint16_t collision_answer_offset = 0;
1939 // anti-collision-loop:
1940 while (Demod.collisionPos) {
1941 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1942 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1943 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1944 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1945 }
1946 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1947 uid_resp_bits++;
1948 // construct anticollosion command:
1949 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1950 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1951 sel_uid[2+i] = uid_resp[i];
1952 }
1953 collision_answer_offset = uid_resp_bits%8;
1954 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1955 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1956 }
1957 // finally, add the last bits and BCC of the UID
1958 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1959 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1960 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1961 }
1962
1963 } else { // no collision, use the response to SELECT_ALL as current uid
1964 memcpy(uid_resp, resp, 4);
1965 }
1966
1967 } else {
1968 if (cascade_level < num_cascades - 1) {
1969 uid_resp[0] = 0x88;
1970 memcpy(uid_resp+1, uid_ptr+cascade_level*3, 3);
1971 } else {
1972 memcpy(uid_resp, uid_ptr+cascade_level*3, 4);
1973 }
1974 }
1975 uid_resp_len = 4;
1976
1977 // calculate crypto UID. Always use last 4 Bytes.
1978 if(cuid_ptr)
1979 *cuid_ptr = bytes_to_num(uid_resp, 4);
1980
1981 // Construct SELECT UID command
1982 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1983 memcpy(sel_uid+2, uid_resp, 4); // the UID received during anticollision, or the provided UID
1984 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1985 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1986 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1987
1988 // Receive the SAK
1989 if (!ReaderReceive(resp, resp_par)) return 0;
1990
1991 sak = resp[0];
1992
1993 // Test if more parts of the uid are coming
1994 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1995 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1996 // http://www.nxp.com/documents/application_note/AN10927.pdf
1997 uid_resp[0] = uid_resp[1];
1998 uid_resp[1] = uid_resp[2];
1999 uid_resp[2] = uid_resp[3];
2000 uid_resp_len = 3;
2001 }
2002
2003 if(uid_ptr && anticollision)
2004 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
2005
2006 if(p_hi14a_card) {
2007 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
2008 p_hi14a_card->uidlen += uid_resp_len;
2009 }
2010 }
2011
2012 if(p_hi14a_card) {
2013 p_hi14a_card->sak = sak;
2014 p_hi14a_card->ats_len = 0;
2015 }
2016
2017 // non iso14443a compliant tag
2018 if( (sak & 0x20) == 0) return 2;
2019
2020 // Request for answer to select
2021 AppendCrc14443a(rats, 2);
2022 ReaderTransmit(rats, sizeof(rats), NULL);
2023
2024 if (!(len = ReaderReceive(resp, resp_par))) return 0;
2025
2026 if(p_hi14a_card) {
2027 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
2028 p_hi14a_card->ats_len = len;
2029 }
2030
2031 // reset the PCB block number
2032 iso14_pcb_blocknum = 0;
2033
2034 // set default timeout based on ATS
2035 iso14a_set_ATS_timeout(resp);
2036
2037 return 1;
2038 }
2039
2040 void iso14443a_setup(uint8_t fpga_minor_mode) {
2041 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2042 // Set up the synchronous serial port
2043 FpgaSetupSsc();
2044 // connect Demodulated Signal to ADC:
2045 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2046
2047 // Signal field is on with the appropriate LED
2048 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
2049 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
2050 LED_D_ON();
2051 } else {
2052 LED_D_OFF();
2053 }
2054 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
2055
2056 // Start the timer
2057 StartCountSspClk();
2058
2059 DemodReset();
2060 UartReset();
2061 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
2062 iso14a_set_timeout(10*106); // 10ms default
2063 }
2064
2065 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
2066 uint8_t parity[MAX_PARITY_SIZE] = {0x00};
2067 uint8_t real_cmd[cmd_len+4];
2068 real_cmd[0] = 0x0a; //I-Block
2069 // put block number into the PCB
2070 real_cmd[0] |= iso14_pcb_blocknum;
2071 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2072 memcpy(real_cmd+2, cmd, cmd_len);
2073 AppendCrc14443a(real_cmd,cmd_len+2);
2074
2075 ReaderTransmit(real_cmd, cmd_len+4, NULL);
2076 size_t len = ReaderReceive(data, parity);
2077 uint8_t *data_bytes = (uint8_t *) data;
2078 if (!len)
2079 return 0; //DATA LINK ERROR
2080 // if we received an I- or R(ACK)-Block with a block number equal to the
2081 // current block number, toggle the current block number
2082 else if (len >= 4 // PCB+CID+CRC = 4 bytes
2083 && ((data_bytes[0] & 0xC0) == 0 // I-Block
2084 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2085 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
2086 {
2087 iso14_pcb_blocknum ^= 1;
2088 }
2089
2090 return len;
2091 }
2092
2093 //-----------------------------------------------------------------------------
2094 // Read an ISO 14443a tag. Send out commands and store answers.
2095 //
2096 //-----------------------------------------------------------------------------
2097 void ReaderIso14443a(UsbCommand *c)
2098 {
2099 iso14a_command_t param = c->arg[0];
2100 uint8_t *cmd = c->d.asBytes;
2101 size_t len = c->arg[1] & 0xffff;
2102 size_t lenbits = c->arg[1] >> 16;
2103 uint32_t timeout = c->arg[2];
2104 uint32_t arg0 = 0;
2105 byte_t buf[USB_CMD_DATA_SIZE] = {0x00};
2106 uint8_t par[MAX_PARITY_SIZE] = {0x00};
2107
2108 if (param & ISO14A_CONNECT)
2109 clear_trace();
2110
2111 set_tracing(TRUE);
2112
2113 if (param & ISO14A_REQUEST_TRIGGER)
2114 iso14a_set_trigger(TRUE);
2115
2116
2117 if (param & ISO14A_CONNECT) {
2118 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
2119 if(!(param & ISO14A_NO_SELECT)) {
2120 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
2121 arg0 = iso14443a_select_card(NULL,card,NULL, true, 0);
2122 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
2123 }
2124 }
2125
2126 if (param & ISO14A_SET_TIMEOUT)
2127 iso14a_set_timeout(timeout);
2128
2129 if (param & ISO14A_APDU) {
2130 arg0 = iso14_apdu(cmd, len, buf);
2131 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2132 }
2133
2134 if (param & ISO14A_RAW) {
2135 if(param & ISO14A_APPEND_CRC) {
2136 if(param & ISO14A_TOPAZMODE) {
2137 AppendCrc14443b(cmd,len);
2138 } else {
2139 AppendCrc14443a(cmd,len);
2140 }
2141 len += 2;
2142 if (lenbits) lenbits += 16;
2143 }
2144 if(lenbits>0) { // want to send a specific number of bits (e.g. short commands)
2145 if(param & ISO14A_TOPAZMODE) {
2146 int bits_to_send = lenbits;
2147 uint16_t i = 0;
2148 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity
2149 bits_to_send -= 7;
2150 while (bits_to_send > 0) {
2151 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity
2152 bits_to_send -= 8;
2153 }
2154 } else {
2155 GetParity(cmd, lenbits/8, par);
2156 ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity
2157 }
2158 } else { // want to send complete bytes only
2159 if(param & ISO14A_TOPAZMODE) {
2160 uint16_t i = 0;
2161 ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy
2162 while (i < len) {
2163 ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy
2164 }
2165 } else {
2166 ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity
2167 }
2168 }
2169 arg0 = ReaderReceive(buf, par);
2170 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2171 }
2172
2173 if (param & ISO14A_REQUEST_TRIGGER)
2174 iso14a_set_trigger(FALSE);
2175
2176
2177 if (param & ISO14A_NO_DISCONNECT)
2178 return;
2179
2180 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2181 set_tracing(FALSE);
2182 LEDsoff();
2183 }
2184
2185
2186 // Determine the distance between two nonces.
2187 // Assume that the difference is small, but we don't know which is first.
2188 // Therefore try in alternating directions.
2189 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
2190
2191 if (nt1 == nt2) return 0;
2192
2193 uint16_t i;
2194 uint32_t nttmp1 = nt1;
2195 uint32_t nttmp2 = nt2;
2196
2197 for (i = 1; i < 0xFFFF; ++i) {
2198 nttmp1 = prng_successor(nttmp1, 1);
2199 if (nttmp1 == nt2) return i;
2200
2201 nttmp2 = prng_successor(nttmp2, 1);
2202 if (nttmp2 == nt1) return -i;
2203 }
2204
2205 return(-99999); // either nt1 or nt2 are invalid nonces
2206 }
2207
2208
2209 //-----------------------------------------------------------------------------
2210 // Recover several bits of the cypher stream. This implements (first stages of)
2211 // the algorithm described in "The Dark Side of Security by Obscurity and
2212 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2213 // (article by Nicolas T. Courtois, 2009)
2214 //-----------------------------------------------------------------------------
2215 void ReaderMifare(bool first_try, uint8_t block )
2216 {
2217 // Mifare AUTH
2218 //uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2219 //uint8_t mf_auth[] = { 0x60,0x05, 0x58, 0x2c };
2220 uint8_t mf_auth[] = { 0x60,0x00, 0x00, 0x00 };
2221 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2222 static uint8_t mf_nr_ar3 = 0;
2223
2224 mf_auth[1] = block;
2225 AppendCrc14443a(mf_auth, 2);
2226
2227 uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = {0x00};
2228 uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
2229
2230 byte_t nt_diff = 0;
2231 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2232 static byte_t par_low = 0;
2233 bool led_on = TRUE;
2234 uint8_t uid[10] = {0};
2235 uint32_t cuid = 0;
2236
2237 uint32_t nt = 0;
2238 uint32_t previous_nt = 0;
2239 static uint32_t nt_attacked = 0;
2240 byte_t par_list[8] = {0x00};
2241 byte_t ks_list[8] = {0x00};
2242
2243 static uint32_t sync_time = 0;
2244 static int32_t sync_cycles = 0;
2245 int catch_up_cycles = 0;
2246 int last_catch_up = 0;
2247 uint16_t elapsed_prng_sequences = 1;
2248 uint16_t consecutive_resyncs = 0;
2249 int isOK = 0;
2250
2251 #define PRNG_SEQUENCE_LENGTH (1 << 16);
2252 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2253 #define MAX_SYNC_TRIES 32
2254 #define NUM_DEBUG_INFOS 8 // per strategy
2255 #define MAX_STRATEGY 3
2256
2257 uint16_t unexpected_random = 0;
2258 uint16_t sync_tries = 0;
2259 int16_t debug_info_nr = -1;
2260 uint16_t strategy = 0;
2261 int32_t debug_info[MAX_STRATEGY+1][NUM_DEBUG_INFOS];
2262 uint32_t select_time = 0;
2263 uint32_t halt_time = 0;
2264 //uint8_t caller[7] = {0};
2265
2266 // init to zero.
2267 for (uint16_t i = 0; i < MAX_STRATEGY+1; ++i)
2268 for(uint16_t j = 0; j < NUM_DEBUG_INFOS; ++j)
2269 debug_info[i][j] = 0;
2270
2271 LED_A_ON();
2272 LED_B_OFF();
2273 LED_C_OFF();
2274
2275 if (first_try)
2276 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2277
2278 // free eventually allocated BigBuf memory. We want all for tracing.
2279 BigBuf_free();
2280 clear_trace();
2281 set_tracing(TRUE);
2282
2283 if (first_try) {
2284 sync_time = GetCountSspClk() & 0xfffffff8;
2285 sync_cycles = PRNG_SEQUENCE_LENGTH; //65536; //0x10000 // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2286 mf_nr_ar3 = 0;
2287 nt_attacked = 0;
2288 par[0] = 0;
2289 } else {
2290 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2291 mf_nr_ar3++;
2292 mf_nr_ar[3] = mf_nr_ar3;
2293 par[0] = par_low;
2294 }
2295
2296 LED_C_ON();
2297 for(uint16_t i = 0; TRUE; ++i) {
2298
2299 WDT_HIT();
2300
2301 // Test if the action was cancelled
2302 if(BUTTON_PRESS()) {
2303 isOK = -1;
2304 break;
2305 }
2306
2307 if (strategy == 2) {
2308 // test with additional halt command
2309 halt_time = 0;
2310 int len = mifare_sendcmd_short(NULL, false, 0x50, 0x00, receivedAnswer, receivedAnswerPar, &halt_time);
2311
2312 if (len && MF_DBGLEVEL >= 3)
2313 Dbprintf("Unexpected response of %d bytes to halt command (additional debugging).\n", len);
2314 }
2315
2316 if (strategy == 3) {
2317 // test with FPGA power off/on
2318 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2319 SpinDelay(200);
2320 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2321 SpinDelay(100);
2322 sync_time = GetCountSspClk() & 0xfffffff8;
2323 WDT_HIT();
2324 }
2325
2326 if (!iso14443a_select_card(uid, NULL, &cuid, true, 0)) {
2327 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card\n");
2328 continue;
2329 }
2330
2331 select_time = GetCountSspClk() & 0xfffffff8;
2332 elapsed_prng_sequences = 1;
2333
2334 if (debug_info_nr == -1) {
2335
2336 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2337 catch_up_cycles = 0;
2338
2339 // if we missed the sync time already, advance to the next nonce repeat
2340 WDT_HIT();
2341 while(GetCountSspClk() > sync_time) {
2342 ++elapsed_prng_sequences;
2343 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2344 //sync_time += sync_cycles;
2345 //sync_time &= 0xfffffff8;
2346 }
2347 WDT_HIT();
2348 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2349 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2350 if (MF_DBGLEVEL == 2) Dbprintf("sync_time %d \n", sync_time);
2351
2352 } else {
2353 // collect some information on tag nonces for debugging:
2354 #define DEBUG_FIXED_SYNC_CYCLES PRNG_SEQUENCE_LENGTH
2355 if (strategy == 0) {
2356 // nonce distances at fixed time after card select:
2357 sync_time = select_time + DEBUG_FIXED_SYNC_CYCLES;
2358 } else if (strategy == 1) {
2359 // nonce distances at fixed time between authentications:
2360 sync_time = sync_time + DEBUG_FIXED_SYNC_CYCLES;
2361 } else if (strategy == 2) {
2362 // nonce distances at fixed time after halt:
2363 sync_time = halt_time + DEBUG_FIXED_SYNC_CYCLES;
2364 } else {
2365 // nonce_distances at fixed time after power on
2366 sync_time = DEBUG_FIXED_SYNC_CYCLES;
2367 }
2368 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2369 }
2370
2371 // Receive the (4 Byte) "random" nonce
2372 if (!ReaderReceive(receivedAnswer, receivedAnswerPar))
2373 continue;
2374
2375 previous_nt = nt;
2376 nt = bytes_to_num(receivedAnswer, 4);
2377
2378 // Transmit reader nonce with fake par
2379 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2380
2381 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2382 int nt_distance = dist_nt(previous_nt, nt);
2383 if (nt_distance == 0) {
2384 nt_attacked = nt;
2385 } else {
2386 if (nt_distance == -99999) { // invalid nonce received
2387 unexpected_random++;
2388 if (unexpected_random > MAX_UNEXPECTED_RANDOM) {
2389 isOK = -3; // Card has an unpredictable PRNG. Give up
2390 break;
2391 } else {
2392 continue; // continue trying...
2393 }
2394 }
2395
2396 if (++sync_tries > MAX_SYNC_TRIES) {
2397 if (strategy > MAX_STRATEGY || MF_DBGLEVEL < 3) {
2398 isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2399 break;
2400 } else { // continue for a while, just to collect some debug info
2401 ++debug_info_nr;
2402 debug_info[strategy][debug_info_nr] = nt_distance;
2403 if (debug_info_nr == NUM_DEBUG_INFOS-1) {
2404 ++strategy;
2405 debug_info_nr = 0;
2406 }
2407 continue;
2408 }
2409 }
2410
2411 sync_cycles = (sync_cycles - nt_distance/elapsed_prng_sequences);
2412 if (sync_cycles <= 0)
2413 sync_cycles += PRNG_SEQUENCE_LENGTH;
2414
2415 if (MF_DBGLEVEL >= 2)
2416 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles);
2417
2418 continue;
2419 }
2420 }
2421
2422 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2423
2424 catch_up_cycles = -dist_nt(nt_attacked, nt);
2425 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2426 catch_up_cycles = 0;
2427 continue;
2428 }
2429
2430 // average?
2431 catch_up_cycles /= elapsed_prng_sequences;
2432
2433 if (catch_up_cycles == last_catch_up) {
2434 ++consecutive_resyncs;
2435 } else {
2436 last_catch_up = catch_up_cycles;
2437 consecutive_resyncs = 0;
2438 }
2439 sync_cycles += catch_up_cycles;
2440
2441 if (consecutive_resyncs < 3) {
2442 if (MF_DBGLEVEL >= 3)
2443 Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2444 } else {
2445 sync_cycles += catch_up_cycles;
2446
2447 if (MF_DBGLEVEL >= 3)
2448 Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2449
2450 last_catch_up = 0;
2451 catch_up_cycles = 0;
2452 consecutive_resyncs = 0;
2453 }
2454 continue;
2455 }
2456
2457 consecutive_resyncs = 0;
2458
2459 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2460 if (ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2461 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2462
2463 if (nt_diff == 0)
2464 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2465
2466 led_on = !led_on;
2467 if(led_on) LED_B_ON(); else LED_B_OFF();
2468
2469 par_list[nt_diff] = SwapBits(par[0], 8);
2470 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2471
2472 // Test if the information is complete
2473 if (nt_diff == 0x07) {
2474 isOK = 1;
2475 break;
2476 }
2477
2478 nt_diff = (nt_diff + 1) & 0x07;
2479 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2480 par[0] = par_low;
2481 } else {
2482 if (nt_diff == 0 && first_try) {
2483 par[0]++;
2484 if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2485 isOK = -2;
2486 break;
2487 }
2488 } else {
2489 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2490 }
2491 }
2492 }
2493
2494 mf_nr_ar[3] &= 0x1F;
2495
2496 WDT_HIT();
2497
2498 if (isOK == -4) {
2499 for (uint16_t i = 0; i < MAX_STRATEGY+1; ++i)
2500 for(uint16_t j = 0; j < NUM_DEBUG_INFOS; ++j)
2501 Dbprintf("info[%d][%d] = %d", i, j, debug_info[i][j]);
2502 }
2503
2504 // reset sync_time.
2505 if ( isOK == 1) {
2506 sync_time = 0;
2507 sync_cycles = 0;
2508 mf_nr_ar3 = 0;
2509 nt_attacked = 0;
2510 par[0] = 0;
2511 }
2512
2513 byte_t buf[28] = {0x00};
2514 memcpy(buf + 0, uid, 4);
2515 num_to_bytes(nt, 4, buf + 4);
2516 memcpy(buf + 8, par_list, 8);
2517 memcpy(buf + 16, ks_list, 8);
2518 memcpy(buf + 24, mf_nr_ar, 4);
2519
2520 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2521
2522 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2523 LEDsoff();
2524 set_tracing(FALSE);
2525 }
2526
2527 /**
2528 *MIFARE 1K simulate.
2529 *
2530 *@param flags :
2531 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2532 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2533 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2534 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2535 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2536 */
2537 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2538 {
2539 int cardSTATE = MFEMUL_NOFIELD;
2540 int _7BUID = 0;
2541 int vHf = 0; // in mV
2542 int res;
2543 uint32_t selTimer = 0;
2544 uint32_t authTimer = 0;
2545 uint16_t len = 0;
2546 uint8_t cardWRBL = 0;
2547 uint8_t cardAUTHSC = 0;
2548 uint8_t cardAUTHKEY = 0xff; // no authentication
2549 // uint32_t cardRr = 0;
2550 uint32_t cuid = 0;
2551 //uint32_t rn_enc = 0;
2552 uint32_t ans = 0;
2553 uint32_t cardINTREG = 0;
2554 uint8_t cardINTBLOCK = 0;
2555 struct Crypto1State mpcs = {0, 0};
2556 struct Crypto1State *pcs;
2557 pcs = &mpcs;
2558 uint32_t numReads = 0;//Counts numer of times reader read a block
2559 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
2560 uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE] = {0x00};
2561 uint8_t response[MAX_MIFARE_FRAME_SIZE] = {0x00};
2562 uint8_t response_par[MAX_MIFARE_PARITY_SIZE] = {0x00};
2563
2564 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2565 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2566 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2567 uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; // Mifare Classic
2568 //uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2569 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2570
2571 //uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01};
2572 uint8_t rAUTH_NT[] = {0x55, 0x41, 0x49, 0x92};
2573 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2574
2575 //Here, we collect UID1,UID2,NT,AR,NR,0,0,NT2,AR2,NR2
2576 // This can be used in a reader-only attack.
2577 // (it can also be retrieved via 'hf 14a list', but hey...
2578 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
2579 uint8_t ar_nr_collected = 0;
2580
2581 // Authenticate response - nonce
2582 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2583
2584 //-- Determine the UID
2585 // Can be set from emulator memory, incoming data
2586 // and can be 7 or 4 bytes long
2587 if (flags & FLAG_4B_UID_IN_DATA)
2588 {
2589 // 4B uid comes from data-portion of packet
2590 memcpy(rUIDBCC1,datain,4);
2591 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2592
2593 } else if (flags & FLAG_7B_UID_IN_DATA) {
2594 // 7B uid comes from data-portion of packet
2595 memcpy(&rUIDBCC1[1],datain,3);
2596 memcpy(rUIDBCC2, datain+3, 4);
2597 _7BUID = true;
2598 } else {
2599 // get UID from emul memory
2600 emlGetMemBt(receivedCmd, 7, 1);
2601 _7BUID = !(receivedCmd[0] == 0x00);
2602 if (!_7BUID) { // ---------- 4BUID
2603 emlGetMemBt(rUIDBCC1, 0, 4);
2604 } else { // ---------- 7BUID
2605 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2606 emlGetMemBt(rUIDBCC2, 3, 4);
2607 }
2608 }
2609
2610 // save uid.
2611 ar_nr_responses[0*5] = bytes_to_num(rUIDBCC1+1, 3);
2612 if ( _7BUID )
2613 ar_nr_responses[0*5+1] = bytes_to_num(rUIDBCC2, 4);
2614
2615 /*
2616 * Regardless of what method was used to set the UID, set fifth byte and modify
2617 * the ATQA for 4 or 7-byte UID
2618 */
2619 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2620 if (_7BUID) {
2621 rATQA[0] = 0x44;
2622 rUIDBCC1[0] = 0x88;
2623 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2624 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2625 }
2626
2627 if (MF_DBGLEVEL >= 1) {
2628 if (!_7BUID) {
2629 Dbprintf("4B UID: %02x%02x%02x%02x",
2630 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2631 } else {
2632 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2633 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2634 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2635 }
2636 }
2637
2638 // We need to listen to the high-frequency, peak-detected path.
2639 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2640
2641 // free eventually allocated BigBuf memory but keep Emulator Memory
2642 BigBuf_free_keep_EM();
2643
2644 // clear trace
2645 clear_trace();
2646 set_tracing(TRUE);
2647
2648
2649 bool finished = FALSE;
2650 while (!BUTTON_PRESS() && !finished && !usb_poll_validate_length()) {
2651 WDT_HIT();
2652
2653 // find reader field
2654 if (cardSTATE == MFEMUL_NOFIELD) {
2655 vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
2656 if (vHf > MF_MINFIELDV) {
2657 cardSTATE_TO_IDLE();
2658 LED_A_ON();
2659 }
2660 }
2661 if(cardSTATE == MFEMUL_NOFIELD) continue;
2662
2663 //Now, get data
2664 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2665 if (res == 2) { //Field is off!
2666 cardSTATE = MFEMUL_NOFIELD;
2667 LEDsoff();
2668 continue;
2669 } else if (res == 1) {
2670 break; //return value 1 means button press
2671 }
2672
2673 // REQ or WUP request in ANY state and WUP in HALTED state
2674 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2675 selTimer = GetTickCount();
2676 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2677 cardSTATE = MFEMUL_SELECT1;
2678
2679 // init crypto block
2680 LED_B_OFF();
2681 LED_C_OFF();
2682 crypto1_destroy(pcs);
2683 cardAUTHKEY = 0xff;
2684 continue;
2685 }
2686
2687 switch (cardSTATE) {
2688 case MFEMUL_NOFIELD:
2689 case MFEMUL_HALTED:
2690 case MFEMUL_IDLE:{
2691 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2692 break;
2693 }
2694 case MFEMUL_SELECT1:{
2695 // select all
2696 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2697 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2698 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2699 break;
2700 }
2701
2702 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2703 {
2704 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2705 }
2706 // select card
2707 if (len == 9 &&
2708 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2709 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2710 cuid = bytes_to_num(rUIDBCC1, 4);
2711 if (!_7BUID) {
2712 cardSTATE = MFEMUL_WORK;
2713 LED_B_ON();
2714 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2715 break;
2716 } else {
2717 cardSTATE = MFEMUL_SELECT2;
2718 }
2719 }
2720 break;
2721 }
2722 case MFEMUL_AUTH1:{
2723 if( len != 8) {
2724 cardSTATE_TO_IDLE();
2725 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2726 break;
2727 }
2728
2729 uint32_t ar = bytes_to_num(receivedCmd, 4);
2730 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2731
2732 //Collect AR/NR
2733 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
2734 if(ar_nr_collected < 2) {
2735 if(ar_nr_responses[2] != ar) {
2736 // Avoid duplicates... probably not necessary, ar should vary.
2737 //ar_nr_responses[ar_nr_collected*5] = 0;
2738 //ar_nr_responses[ar_nr_collected*5+1] = 0;
2739 ar_nr_responses[ar_nr_collected*5+2] = nonce;
2740 ar_nr_responses[ar_nr_collected*5+3] = nr;
2741 ar_nr_responses[ar_nr_collected*5+4] = ar;
2742 ar_nr_collected++;
2743 }
2744 // Interactive mode flag, means we need to send ACK
2745 if(flags & FLAG_INTERACTIVE && ar_nr_collected == 2)
2746 finished = true;
2747 }
2748
2749 // --- crypto
2750 //crypto1_word(pcs, ar , 1);
2751 //cardRr = nr ^ crypto1_word(pcs, 0, 0);
2752
2753 //test if auth OK
2754 //if (cardRr != prng_successor(nonce, 64)){
2755
2756 //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2757 // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2758 // cardRr, prng_successor(nonce, 64));
2759 // Shouldn't we respond anything here?
2760 // Right now, we don't nack or anything, which causes the
2761 // reader to do a WUPA after a while. /Martin
2762 // -- which is the correct response. /piwi
2763 //cardSTATE_TO_IDLE();
2764 //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2765 //break;
2766 //}
2767
2768 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2769
2770 num_to_bytes(ans, 4, rAUTH_AT);
2771 // --- crypto
2772 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2773 LED_C_ON();
2774 cardSTATE = MFEMUL_WORK;
2775 if (MF_DBGLEVEL >= 4) {
2776 Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2777 cardAUTHSC,
2778 cardAUTHKEY == 0 ? 'A' : 'B',
2779 GetTickCount() - authTimer
2780 );
2781 }
2782 break;
2783 }
2784 case MFEMUL_SELECT2:{
2785 if (!len) {
2786 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2787 break;
2788 }
2789 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2790 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2791 break;
2792 }
2793
2794 // select 2 card
2795 if (len == 9 &&
2796 (receivedCmd[0] == 0x95 &&
2797 receivedCmd[1] == 0x70 &&
2798 memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0) ) {
2799 EmSendCmd(rSAK, sizeof(rSAK));
2800 cuid = bytes_to_num(rUIDBCC2, 4);
2801 cardSTATE = MFEMUL_WORK;
2802 LED_B_ON();
2803 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2804 break;
2805 }
2806
2807 // i guess there is a command). go into the work state.
2808 if (len != 4) {
2809 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2810 break;
2811 }
2812 cardSTATE = MFEMUL_WORK;
2813 //goto lbWORK;
2814 //intentional fall-through to the next case-stmt
2815 }
2816
2817 case MFEMUL_WORK:{
2818 if (len == 0) {
2819 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2820 break;
2821 }
2822
2823 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2824
2825 // decrypt seqence
2826 if(encrypted_data)
2827 mf_crypto1_decrypt(pcs, receivedCmd, len);
2828
2829 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2830 authTimer = GetTickCount();
2831 cardAUTHSC = receivedCmd[1] / 4; // received block num
2832 cardAUTHKEY = receivedCmd[0] - 0x60;
2833 crypto1_destroy(pcs);//Added by martin
2834 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2835
2836 if (!encrypted_data) { // first authentication
2837 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2838
2839 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2840 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2841 } else { // nested authentication
2842 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2843 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2844 num_to_bytes(ans, 4, rAUTH_AT);
2845 }
2846
2847 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2848 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2849 cardSTATE = MFEMUL_AUTH1;
2850 break;
2851 }
2852
2853 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2854 // BUT... ACK --> NACK
2855 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2856 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2857 break;
2858 }
2859
2860 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2861 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2862 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2863 break;
2864 }
2865
2866 if(len != 4) {
2867 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2868 break;
2869 }
2870
2871 if(receivedCmd[0] == 0x30 // read block
2872 || receivedCmd[0] == 0xA0 // write block
2873 || receivedCmd[0] == 0xC0 // inc
2874 || receivedCmd[0] == 0xC1 // dec
2875 || receivedCmd[0] == 0xC2 // restore
2876 || receivedCmd[0] == 0xB0) { // transfer
2877 if (receivedCmd[1] >= 16 * 4) {
2878 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2879 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2880 break;
2881 }
2882
2883 if (receivedCmd[1] / 4 != cardAUTHSC) {
2884 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2885 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2886 break;
2887 }
2888 }
2889 // read block
2890 if (receivedCmd[0] == 0x30) {
2891 if (MF_DBGLEVEL >= 4) Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2892
2893 emlGetMem(response, receivedCmd[1], 1);
2894 AppendCrc14443a(response, 16);
2895 mf_crypto1_encrypt(pcs, response, 18, response_par);
2896 EmSendCmdPar(response, 18, response_par);
2897 numReads++;
2898 if(exitAfterNReads > 0 && numReads >= exitAfterNReads) {
2899 Dbprintf("%d reads done, exiting", numReads);
2900 finished = true;
2901 }
2902 break;
2903 }
2904 // write block
2905 if (receivedCmd[0] == 0xA0) {
2906 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2907 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2908 cardSTATE = MFEMUL_WRITEBL2;
2909 cardWRBL = receivedCmd[1];
2910 break;
2911 }
2912 // increment, decrement, restore
2913 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2914 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2915 if (emlCheckValBl(receivedCmd[1])) {
2916 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2917 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2918 break;
2919 }
2920 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2921 if (receivedCmd[0] == 0xC1)
2922 cardSTATE = MFEMUL_INTREG_INC;
2923 if (receivedCmd[0] == 0xC0)
2924 cardSTATE = MFEMUL_INTREG_DEC;
2925 if (receivedCmd[0] == 0xC2)
2926 cardSTATE = MFEMUL_INTREG_REST;
2927 cardWRBL = receivedCmd[1];
2928 break;
2929 }
2930 // transfer
2931 if (receivedCmd[0] == 0xB0) {
2932 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2933 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2934 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2935 else
2936 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2937 break;
2938 }
2939 // halt
2940 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2941 LED_B_OFF();
2942 LED_C_OFF();
2943 cardSTATE = MFEMUL_HALTED;
2944 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2945 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2946 break;
2947 }
2948 // RATS
2949 if (receivedCmd[0] == 0xe0) {//RATS
2950 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2951 break;
2952 }
2953 // command not allowed
2954 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2955 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2956 break;
2957 }
2958 case MFEMUL_WRITEBL2:{
2959 if (len == 18) {
2960 mf_crypto1_decrypt(pcs, receivedCmd, len);
2961 emlSetMem(receivedCmd, cardWRBL, 1);
2962 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2963 cardSTATE = MFEMUL_WORK;
2964 } else {
2965 cardSTATE_TO_IDLE();
2966 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2967 }
2968 break;
2969 }
2970
2971 case MFEMUL_INTREG_INC:{
2972 mf_crypto1_decrypt(pcs, receivedCmd, len);
2973 memcpy(&ans, receivedCmd, 4);
2974 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2975 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2976 cardSTATE_TO_IDLE();
2977 break;
2978 }
2979 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2980 cardINTREG = cardINTREG + ans;
2981 cardSTATE = MFEMUL_WORK;
2982 break;
2983 }
2984 case MFEMUL_INTREG_DEC:{
2985 mf_crypto1_decrypt(pcs, receivedCmd, len);
2986 memcpy(&ans, receivedCmd, 4);
2987 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2988 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2989 cardSTATE_TO_IDLE();
2990 break;
2991 }
2992 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2993 cardINTREG = cardINTREG - ans;
2994 cardSTATE = MFEMUL_WORK;
2995 break;
2996 }
2997 case MFEMUL_INTREG_REST:{
2998 mf_crypto1_decrypt(pcs, receivedCmd, len);
2999 memcpy(&ans, receivedCmd, 4);
3000 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
3001 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
3002 cardSTATE_TO_IDLE();
3003 break;
3004 }
3005 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
3006 cardSTATE = MFEMUL_WORK;
3007 break;
3008 }
3009 }
3010 }
3011
3012 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
3013 LEDsoff();
3014
3015 // Interactive mode flag, means we need to send ACK
3016 if(flags & FLAG_INTERACTIVE) {
3017 //May just aswell send the collected ar_nr in the response aswell
3018 uint8_t len = ar_nr_collected*5*4;
3019 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
3020 }
3021
3022 if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1 ) {
3023 if(ar_nr_collected > 1 ) {
3024 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
3025 Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x",
3026 ar_nr_responses[0], // UID1
3027 ar_nr_responses[1], // UID2
3028 ar_nr_responses[2], // NT
3029 ar_nr_responses[3], // AR1
3030 ar_nr_responses[4], // NR1
3031 ar_nr_responses[8], // AR2
3032 ar_nr_responses[9] // NR2
3033 );
3034 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
3035 ar_nr_responses[0], // UID1
3036 ar_nr_responses[1], // UID2
3037 ar_nr_responses[2], // NT1
3038 ar_nr_responses[3], // AR1
3039 ar_nr_responses[4], // NR1
3040 ar_nr_responses[7], // NT2
3041 ar_nr_responses[8], // AR2
3042 ar_nr_responses[9] // NR2
3043 );
3044 } else {
3045 Dbprintf("Failed to obtain two AR/NR pairs!");
3046 if(ar_nr_collected > 0 ) {
3047 Dbprintf("Only got these: UID=%06x%08x, nonce=%08x, AR1=%08x, NR1=%08x",
3048 ar_nr_responses[0], // UID1
3049 ar_nr_responses[1], // UID2
3050 ar_nr_responses[2], // NT
3051 ar_nr_responses[3], // AR1
3052 ar_nr_responses[4] // NR1
3053 );
3054 }
3055 }
3056 }
3057 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
3058
3059 set_tracing(FALSE);
3060 }
3061
3062
3063 //-----------------------------------------------------------------------------
3064 // MIFARE sniffer.
3065 //
3066 //-----------------------------------------------------------------------------
3067 void RAMFUNC SniffMifare(uint8_t param) {
3068 // param:
3069 // bit 0 - trigger from first card answer
3070 // bit 1 - trigger from first reader 7-bit request
3071 LEDsoff();
3072
3073 // init trace buffer
3074 clear_trace();
3075 set_tracing(TRUE);
3076
3077 // The command (reader -> tag) that we're receiving.
3078 // The length of a received command will in most cases be no more than 18 bytes.
3079 // So 32 should be enough!
3080 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
3081 uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
3082
3083 // The response (tag -> reader) that we're receiving.
3084 uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE] = {0x00};
3085 uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE] = {0x00};
3086
3087 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
3088
3089 // free eventually allocated BigBuf memory
3090 BigBuf_free();
3091
3092 // allocate the DMA buffer, used to stream samples from the FPGA
3093 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
3094 uint8_t *data = dmaBuf;
3095 uint8_t previous_data = 0;
3096 int maxDataLen = 0;
3097 int dataLen = 0;
3098 bool ReaderIsActive = FALSE;
3099 bool TagIsActive = FALSE;
3100
3101 // Set up the demodulator for tag -> reader responses.
3102 DemodInit(receivedResponse, receivedResponsePar);
3103
3104 // Set up the demodulator for the reader -> tag commands
3105 UartInit(receivedCmd, receivedCmdPar);
3106
3107 // Setup for the DMA.
3108 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
3109
3110 LED_D_OFF();
3111
3112 // init sniffer
3113 MfSniffInit();
3114
3115 // And now we loop, receiving samples.
3116 for(uint32_t sniffCounter = 0; TRUE; ) {
3117
3118 if(BUTTON_PRESS()) {
3119 DbpString("cancelled by button");
3120 break;
3121 }
3122
3123 LED_A_ON();
3124 WDT_HIT();
3125
3126 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
3127 // check if a transaction is completed (timeout after 2000ms).
3128 // if yes, stop the DMA transfer and send what we have so far to the client
3129 if (MfSniffSend(2000)) {
3130 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3131 sniffCounter = 0;
3132 data = dmaBuf;
3133 maxDataLen = 0;
3134 ReaderIsActive = FALSE;
3135 TagIsActive = FALSE;
3136 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
3137 }
3138 }
3139
3140 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
3141 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
3142
3143 if (readBufDataP <= dmaBufDataP) // we are processing the same block of data which is currently being transferred
3144 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
3145 else
3146 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
3147
3148 // test for length of buffer
3149 if(dataLen > maxDataLen) { // we are more behind than ever...
3150 maxDataLen = dataLen;
3151 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
3152 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
3153 break;
3154 }
3155 }
3156 if(dataLen < 1) continue;
3157
3158 // primary buffer was stopped ( <-- we lost data!
3159 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
3160 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
3161 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
3162 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
3163 }
3164 // secondary buffer sets as primary, secondary buffer was stopped
3165 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
3166 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
3167 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
3168 }
3169
3170 LED_A_OFF();
3171
3172 if (sniffCounter & 0x01) {
3173
3174 // no need to try decoding tag data if the reader is sending
3175 if(!TagIsActive) {
3176 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
3177 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
3178 LED_C_INV();
3179
3180 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
3181
3182 /* And ready to receive another command. */
3183 UartInit(receivedCmd, receivedCmdPar);
3184
3185 /* And also reset the demod code */
3186 DemodReset();
3187 }
3188 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
3189 }
3190
3191 // no need to try decoding tag data if the reader is sending
3192 if(!ReaderIsActive) {
3193 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
3194 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
3195 LED_C_INV();
3196
3197 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
3198
3199 // And ready to receive another response.
3200 DemodReset();
3201
3202 // And reset the Miller decoder including its (now outdated) input buffer
3203 UartInit(receivedCmd, receivedCmdPar);
3204 }
3205 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
3206 }
3207 }
3208
3209 previous_data = *data;
3210 sniffCounter++;
3211 data++;
3212
3213 if(data == dmaBuf + DMA_BUFFER_SIZE)
3214 data = dmaBuf;
3215
3216 } // main cycle
3217
3218 FpgaDisableSscDma();
3219 MfSniffEnd();
3220 LEDsoff();
3221 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
3222 set_tracing(FALSE);
3223 }
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